From: Thierry Reding <thierry.reding@gmail.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>,
Alexandre Courbot <gnurou@gmail.com>,
Benoit Cousson <bcousson@baylibre.com>,
Tony Lindgren <tony@atomide.com>, Nishanth Menon <nm@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Shawn Guo <shawn.guo@linaro.org>,
Sascha Hauer <kernel@pengutronix.de>,
Kukjin Kim <kgene.kim@samsung.com>,
Simon Horman <horms@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
Linus Walleij <linus.walleij@linaro.org>,
Michal Simek <michal.simek@xilinx.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
Thomas Gleixner <tglx@linutronix.de>,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-omap@vger.kernel.org
Subject: Re: [PATCH v2 06/21] ARM: tegra: remove old LIC support
Date: Thu, 8 Jan 2015 12:29:55 +0100 [thread overview]
Message-ID: <20150108112954.GK1987@ulmo.nvidia.com> (raw)
In-Reply-To: <1420652576-22309-7-git-send-email-marc.zyngier@arm.com>
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On Wed, Jan 07, 2015 at 05:42:41PM +0000, Marc Zyngier wrote:
[...]
> diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
[...]
> void __init tegra_init_irq(void)
> {
> - int i;
> - void __iomem *distbase;
> -
> - if (of_find_matching_node(NULL, tegra_ictlr_match))
> - goto skip_extn_setup;
> -
> - tegra_legacy_irq_syscore_init();
> -
> - distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
> - num_ictlrs = readl_relaxed(distbase + GIC_DIST_CTR) & 0x1f;
> -
> - if (num_ictlrs > ARRAY_SIZE(ictlr_reg_base)) {
> - WARN(1, "Too many (%d) interrupt controllers found. Maximum is %d.",
> - num_ictlrs, ARRAY_SIZE(ictlr_reg_base));
> - num_ictlrs = ARRAY_SIZE(ictlr_reg_base);
> - }
> -
> - for (i = 0; i < num_ictlrs; i++) {
> - void __iomem *ictlr = ictlr_reg_base[i];
> - writel(~0, ictlr + ICTLR_CPU_IER_CLR);
> - writel(0, ictlr + ICTLR_CPU_IEP_CLASS);
> - }
> -
> - gic_arch_extn.irq_ack = tegra_ack;
> - gic_arch_extn.irq_eoi = tegra_eoi;
> - gic_arch_extn.irq_mask = tegra_mask;
> - gic_arch_extn.irq_unmask = tegra_unmask;
> - gic_arch_extn.irq_retrigger = tegra_retrigger;
> - gic_arch_extn.irq_set_wake = tegra_set_wake;
> - gic_arch_extn.flags = IRQCHIP_MASK_ON_SUSPEND;
> + if (!of_find_matching_node(NULL, tegra_ictlr_match))
> + pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
I'm not very happy about the ABI breakage here, but I also realize that
we need this change to properly describe the hardware. To make it more
obvious that people really should update their DTBs, maybe turn this
into a WARN()?
> -skip_extn_setup:
> tegra114_gic_cpu_pm_registration();
I'm not intimately familiar with the GIC, but is this really SoC
specific? Doesn't anybody else need this? Comparing to the GIC spec the
write of 0x1e0 to the GIC_CPU_CTRL register (which I assume corresponds
to GICC_CTLR in the spec), this simply disables the IRQ and FIQ bypass
signals for both group 0 and group 1.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 06/21] ARM: tegra: remove old LIC support
Date: Thu, 8 Jan 2015 12:29:55 +0100 [thread overview]
Message-ID: <20150108112954.GK1987@ulmo.nvidia.com> (raw)
In-Reply-To: <1420652576-22309-7-git-send-email-marc.zyngier@arm.com>
On Wed, Jan 07, 2015 at 05:42:41PM +0000, Marc Zyngier wrote:
[...]
> diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
[...]
> void __init tegra_init_irq(void)
> {
> - int i;
> - void __iomem *distbase;
> -
> - if (of_find_matching_node(NULL, tegra_ictlr_match))
> - goto skip_extn_setup;
> -
> - tegra_legacy_irq_syscore_init();
> -
> - distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
> - num_ictlrs = readl_relaxed(distbase + GIC_DIST_CTR) & 0x1f;
> -
> - if (num_ictlrs > ARRAY_SIZE(ictlr_reg_base)) {
> - WARN(1, "Too many (%d) interrupt controllers found. Maximum is %d.",
> - num_ictlrs, ARRAY_SIZE(ictlr_reg_base));
> - num_ictlrs = ARRAY_SIZE(ictlr_reg_base);
> - }
> -
> - for (i = 0; i < num_ictlrs; i++) {
> - void __iomem *ictlr = ictlr_reg_base[i];
> - writel(~0, ictlr + ICTLR_CPU_IER_CLR);
> - writel(0, ictlr + ICTLR_CPU_IEP_CLASS);
> - }
> -
> - gic_arch_extn.irq_ack = tegra_ack;
> - gic_arch_extn.irq_eoi = tegra_eoi;
> - gic_arch_extn.irq_mask = tegra_mask;
> - gic_arch_extn.irq_unmask = tegra_unmask;
> - gic_arch_extn.irq_retrigger = tegra_retrigger;
> - gic_arch_extn.irq_set_wake = tegra_set_wake;
> - gic_arch_extn.flags = IRQCHIP_MASK_ON_SUSPEND;
> + if (!of_find_matching_node(NULL, tegra_ictlr_match))
> + pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
I'm not very happy about the ABI breakage here, but I also realize that
we need this change to properly describe the hardware. To make it more
obvious that people really should update their DTBs, maybe turn this
into a WARN()?
> -skip_extn_setup:
> tegra114_gic_cpu_pm_registration();
I'm not intimately familiar with the GIC, but is this really SoC
specific? Doesn't anybody else need this? Comparing to the GIC spec the
write of 0x1e0 to the GIC_CPU_CTRL register (which I assume corresponds
to GICC_CTLR in the spec), this simply disables the IRQ and FIQ bypass
signals for both group 0 and group 1.
Thierry
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next prev parent reply other threads:[~2015-01-08 11:29 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-07 17:42 [PATCH v2 00/21] irqchip: gic: killing gic_arch_extn and co, slowly Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 01/21] ARM: tegra: irq: nuke leftovers from non-DT support Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 8:56 ` Thierry Reding
2015-01-08 8:56 ` Thierry Reding
2015-01-07 17:42 ` [PATCH v2 02/21] irqchip: tegra: add DT-based support for legacy interrupt controller Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 10:13 ` Thierry Reding
2015-01-08 10:13 ` Thierry Reding
2015-01-08 15:06 ` Nishanth Menon
2015-01-08 15:06 ` Nishanth Menon
2015-01-10 12:28 ` Marc Zyngier
2015-01-10 12:28 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 03/21] ARM: tegra: skip gic_arch_extn setup if DT has a LIC node Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 10:16 ` Thierry Reding
2015-01-08 10:16 ` Thierry Reding
2015-01-07 17:42 ` [PATCH v2 04/21] ARM: tegra: update DTs to expose legacy interrupt controller Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 10:41 ` Thierry Reding
2015-01-08 10:41 ` Thierry Reding
2015-01-10 12:37 ` Marc Zyngier
2015-01-10 12:37 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 05/21] DT: tegra: add binding for the " Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 10:51 ` Thierry Reding
2015-01-08 10:51 ` Thierry Reding
2015-01-08 15:12 ` Nishanth Menon
2015-01-08 15:12 ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 06/21] ARM: tegra: remove old LIC support Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 11:29 ` Thierry Reding [this message]
2015-01-08 11:29 ` Thierry Reding
2015-01-10 12:43 ` Marc Zyngier
2015-01-10 12:43 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 07/21] genirq: Add irqchip_set_wake_parent Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 15:15 ` Nishanth Menon
2015-01-08 15:15 ` Nishanth Menon
2015-01-10 12:46 ` Marc Zyngier
2015-01-10 12:46 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 08/21] irqchip: crossbar: convert dra7 crossbar to stacked domains Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 14:39 ` Nishanth Menon
2015-01-08 14:39 ` Nishanth Menon
2015-01-10 12:59 ` Marc Zyngier
2015-01-10 12:59 ` Marc Zyngier
2015-01-08 15:20 ` Nishanth Menon
2015-01-08 15:20 ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 09/21] DT: update ti,irq-crossbar binding Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 10/21] irqchip: GIC: get rid of routable domain Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:13 ` Nishanth Menon
2015-01-08 16:13 ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 11/21] DT: arm,gic: kill arm,routable-irqs Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 12/21] ARM: omap: convert wakeupgen to stacked domains Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:44 ` Nishanth Menon
2015-01-08 16:44 ` Nishanth Menon
2015-01-10 13:17 ` Marc Zyngier
2015-01-10 13:17 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 13/21] DT: omap4/5: add binding for the wake-up generator Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:52 ` Nishanth Menon
2015-01-08 16:52 ` Nishanth Menon
2015-01-10 13:22 ` Marc Zyngier
2015-01-10 13:22 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 14/21] ARM: imx6: convert GPC to stacked domains Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:57 ` Nishanth Menon
2015-01-08 16:57 ` Nishanth Menon
2015-01-09 17:40 ` Stefan Agner
2015-01-09 17:40 ` Stefan Agner
2015-01-10 13:34 ` Marc Zyngier
2015-01-10 13:34 ` Marc Zyngier
2015-01-10 14:16 ` Stefan Agner
2015-01-10 14:16 ` Stefan Agner
2015-01-07 17:42 ` [PATCH v2 15/21] ARM: exynos4/5: convert pmu wakeup " Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:58 ` Nishanth Menon
2015-01-08 16:58 ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 16/21] DT: exynos: update PMU binding Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 17/21] irqchip: gic: add an entry point to set up irqchip flags Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 18/21] ARM: shmobile: remove use of gic_arch_extn.irq_set_wake Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 19/21] ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 20/21] ARM: zynq: " Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 21/21] irqchip: gic: Drop support for gic_arch_extn Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 18:45 ` [PATCH v2 00/21] irqchip: gic: killing gic_arch_extn and co, slowly santosh shilimkar
2015-01-07 18:45 ` santosh shilimkar
2015-01-08 3:31 ` Nishanth Menon
2015-01-08 3:31 ` Nishanth Menon
2015-01-10 13:45 ` Marc Zyngier
2015-01-10 13:45 ` Marc Zyngier
2015-01-12 14:14 ` Rob Herring
2015-01-12 14:14 ` Rob Herring
2015-01-12 15:39 ` Marc Zyngier
2015-01-12 15:39 ` Marc Zyngier
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