From: Nishanth Menon <nm@ti.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Alexandre Courbot <gnurou@gmail.com>,
Kukjin Kim <kgene.kim@samsung.com>,
Sascha Hauer <kernel@pengutronix.de>,
Simon Horman <horms@verge.net.au>,
Stephen Warren <swarren@wwwdotorg.org>,
Tony Lindgren <tony@atomide.com>,
Linus Walleij <linus.walleij@linaro.org>,
Magnus Damm <magnus.damm@gmail.com>,
Michal Simek <michal.simek@xilinx.com>,
Rob Herring <robh+dt@kernel.org>,
linux-samsung-soc@vger.kernel.org, linux-omap@vger.kernel.org,
Thierry Reding <thierry.reding@gmail.com>,
Benoit Cousson <bcousson@baylibre.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Shawn Guo <shawn.guo@linaro.org>,
linux-arm-kernel@lists.infradead.org,
Jason Cooper <jason@lakedaemon.net>
Subject: Re: [PATCH v2 02/21] irqchip: tegra: add DT-based support for legacy interrupt controller
Date: Thu, 8 Jan 2015 09:06:09 -0600 [thread overview]
Message-ID: <20150108150608.GA24654@kahuna> (raw)
In-Reply-To: <1420652576-22309-3-git-send-email-marc.zyngier@arm.com>
On 17:42-20150107, Marc Zyngier wrote:
> Tegra's LIC (Legacy Interrupt Controller) has been so far only
> supported as a weird extension of the GIC, which is not exactly
> pretty.
>
> The stacked irq domain framework fits this pretty well, and allows
> the LIC code to be turned into a standalone irqchip. In the process,
> make the driver DT aware, something that was sorely missing from
> the mach-tegra implementation.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
Saw a few checkpatch warnings as below: all of them seem minors.
@@ -0,0 +1,35 @@
+WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
+#36:
+new file mode 100644
+WARNING: line over 80 characters
+#169: FILE: drivers/irqchip/irq-tegra.c:129:
++ tegra_ictlr_info->cpu_ier[i] = readl_relaxed(ictlr + ICTLR_CPU_IER);
+WARNING: line over 80 characters
+#170: FILE: drivers/irqchip/irq-tegra.c:130:
++ tegra_ictlr_info->cpu_iep[i] = readl_relaxed(ictlr + ICTLR_CPU_IEP_CLASS);
+WARNING: line over 80 characters
+#171: FILE: drivers/irqchip/irq-tegra.c:131:
++ tegra_ictlr_info->cop_ier[i] = readl_relaxed(ictlr + ICTLR_COP_IER);
+WARNING: line over 80 characters
+#172: FILE: drivers/irqchip/irq-tegra.c:132:
++ tegra_ictlr_info->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
+WARNING: line over 80 characters
+#181: FILE: drivers/irqchip/irq-tegra.c:141:
++ writel_relaxed(tegra_ictlr_info->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET);
+WARNING: Missing a blank line after declarations
+#196: FILE: drivers/irqchip/irq-tegra.c:156:
++ void __iomem *ictlr = tegra_ictlr_info->ictlr_reg_base[i];
++ writel_relaxed(tegra_ictlr_info->cpu_iep[i],
+WARNING: line over 80 characters
+#284: FILE: drivers/irqchip/irq-tegra.c:244:
++ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &parent_args);
+CHECK: Please don't use multiple blank lines
+#287: FILE: drivers/irqchip/irq-tegra.c:247:
++
++
+WARNING: Missing a blank line after declarations
+#296: FILE: drivers/irqchip/irq-tegra.c:256:
++ struct irq_data *d = irq_domain_get_irq_data(domain, virq + i);
++ irq_domain_reset_irq_data(d);
`
--
Regards,
Nishanth Menon
WARNING: multiple messages have this Message-ID (diff)
From: nm@ti.com (Nishanth Menon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 02/21] irqchip: tegra: add DT-based support for legacy interrupt controller
Date: Thu, 8 Jan 2015 09:06:09 -0600 [thread overview]
Message-ID: <20150108150608.GA24654@kahuna> (raw)
In-Reply-To: <1420652576-22309-3-git-send-email-marc.zyngier@arm.com>
On 17:42-20150107, Marc Zyngier wrote:
> Tegra's LIC (Legacy Interrupt Controller) has been so far only
> supported as a weird extension of the GIC, which is not exactly
> pretty.
>
> The stacked irq domain framework fits this pretty well, and allows
> the LIC code to be turned into a standalone irqchip. In the process,
> make the driver DT aware, something that was sorely missing from
> the mach-tegra implementation.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
Saw a few checkpatch warnings as below: all of them seem minors.
@@ -0,0 +1,35 @@
+WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
+#36:
+new file mode 100644
+WARNING: line over 80 characters
+#169: FILE: drivers/irqchip/irq-tegra.c:129:
++ tegra_ictlr_info->cpu_ier[i] = readl_relaxed(ictlr + ICTLR_CPU_IER);
+WARNING: line over 80 characters
+#170: FILE: drivers/irqchip/irq-tegra.c:130:
++ tegra_ictlr_info->cpu_iep[i] = readl_relaxed(ictlr + ICTLR_CPU_IEP_CLASS);
+WARNING: line over 80 characters
+#171: FILE: drivers/irqchip/irq-tegra.c:131:
++ tegra_ictlr_info->cop_ier[i] = readl_relaxed(ictlr + ICTLR_COP_IER);
+WARNING: line over 80 characters
+#172: FILE: drivers/irqchip/irq-tegra.c:132:
++ tegra_ictlr_info->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
+WARNING: line over 80 characters
+#181: FILE: drivers/irqchip/irq-tegra.c:141:
++ writel_relaxed(tegra_ictlr_info->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET);
+WARNING: Missing a blank line after declarations
+#196: FILE: drivers/irqchip/irq-tegra.c:156:
++ void __iomem *ictlr = tegra_ictlr_info->ictlr_reg_base[i];
++ writel_relaxed(tegra_ictlr_info->cpu_iep[i],
+WARNING: line over 80 characters
+#284: FILE: drivers/irqchip/irq-tegra.c:244:
++ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &parent_args);
+CHECK: Please don't use multiple blank lines
+#287: FILE: drivers/irqchip/irq-tegra.c:247:
++
++
+WARNING: Missing a blank line after declarations
+#296: FILE: drivers/irqchip/irq-tegra.c:256:
++ struct irq_data *d = irq_domain_get_irq_data(domain, virq + i);
++ irq_domain_reset_irq_data(d);
`
--
Regards,
Nishanth Menon
next prev parent reply other threads:[~2015-01-08 15:06 UTC|newest]
Thread overview: 107+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-07 17:42 [PATCH v2 00/21] irqchip: gic: killing gic_arch_extn and co, slowly Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 01/21] ARM: tegra: irq: nuke leftovers from non-DT support Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 8:56 ` Thierry Reding
2015-01-08 8:56 ` Thierry Reding
2015-01-07 17:42 ` [PATCH v2 02/21] irqchip: tegra: add DT-based support for legacy interrupt controller Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 10:13 ` Thierry Reding
2015-01-08 10:13 ` Thierry Reding
2015-01-08 15:06 ` Nishanth Menon [this message]
2015-01-08 15:06 ` Nishanth Menon
2015-01-10 12:28 ` Marc Zyngier
2015-01-10 12:28 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 03/21] ARM: tegra: skip gic_arch_extn setup if DT has a LIC node Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 10:16 ` Thierry Reding
2015-01-08 10:16 ` Thierry Reding
2015-01-07 17:42 ` [PATCH v2 04/21] ARM: tegra: update DTs to expose legacy interrupt controller Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 10:41 ` Thierry Reding
2015-01-08 10:41 ` Thierry Reding
2015-01-10 12:37 ` Marc Zyngier
2015-01-10 12:37 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 05/21] DT: tegra: add binding for the " Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 10:51 ` Thierry Reding
2015-01-08 10:51 ` Thierry Reding
2015-01-08 15:12 ` Nishanth Menon
2015-01-08 15:12 ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 06/21] ARM: tegra: remove old LIC support Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 11:29 ` Thierry Reding
2015-01-08 11:29 ` Thierry Reding
2015-01-10 12:43 ` Marc Zyngier
2015-01-10 12:43 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 07/21] genirq: Add irqchip_set_wake_parent Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 15:15 ` Nishanth Menon
2015-01-08 15:15 ` Nishanth Menon
2015-01-10 12:46 ` Marc Zyngier
2015-01-10 12:46 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 08/21] irqchip: crossbar: convert dra7 crossbar to stacked domains Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 14:39 ` Nishanth Menon
2015-01-08 14:39 ` Nishanth Menon
2015-01-10 12:59 ` Marc Zyngier
2015-01-10 12:59 ` Marc Zyngier
2015-01-08 15:20 ` Nishanth Menon
2015-01-08 15:20 ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 09/21] DT: update ti,irq-crossbar binding Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 10/21] irqchip: GIC: get rid of routable domain Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:13 ` Nishanth Menon
2015-01-08 16:13 ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 11/21] DT: arm,gic: kill arm,routable-irqs Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 12/21] ARM: omap: convert wakeupgen to stacked domains Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:44 ` Nishanth Menon
2015-01-08 16:44 ` Nishanth Menon
2015-01-10 13:17 ` Marc Zyngier
2015-01-10 13:17 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 13/21] DT: omap4/5: add binding for the wake-up generator Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:52 ` Nishanth Menon
2015-01-08 16:52 ` Nishanth Menon
2015-01-10 13:22 ` Marc Zyngier
2015-01-10 13:22 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 14/21] ARM: imx6: convert GPC to stacked domains Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:57 ` Nishanth Menon
2015-01-08 16:57 ` Nishanth Menon
2015-01-09 17:40 ` Stefan Agner
2015-01-09 17:40 ` Stefan Agner
2015-01-10 13:34 ` Marc Zyngier
2015-01-10 13:34 ` Marc Zyngier
2015-01-10 14:16 ` Stefan Agner
2015-01-10 14:16 ` Stefan Agner
2015-01-07 17:42 ` [PATCH v2 15/21] ARM: exynos4/5: convert pmu wakeup " Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-08 16:58 ` Nishanth Menon
2015-01-08 16:58 ` Nishanth Menon
2015-01-07 17:42 ` [PATCH v2 16/21] DT: exynos: update PMU binding Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 17/21] irqchip: gic: add an entry point to set up irqchip flags Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 18/21] ARM: shmobile: remove use of gic_arch_extn.irq_set_wake Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 19/21] ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 20/21] ARM: zynq: " Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 17:42 ` [PATCH v2 21/21] irqchip: gic: Drop support for gic_arch_extn Marc Zyngier
2015-01-07 17:42 ` Marc Zyngier
2015-01-07 18:45 ` [PATCH v2 00/21] irqchip: gic: killing gic_arch_extn and co, slowly santosh shilimkar
2015-01-07 18:45 ` santosh shilimkar
2015-01-08 3:31 ` Nishanth Menon
2015-01-08 3:31 ` Nishanth Menon
2015-01-10 13:45 ` Marc Zyngier
2015-01-10 13:45 ` Marc Zyngier
2015-01-12 14:14 ` Rob Herring
2015-01-12 14:14 ` Rob Herring
2015-01-12 15:39 ` Marc Zyngier
2015-01-12 15:39 ` Marc Zyngier
-- strict thread matches above, loose matches on Subject: below --
2015-01-10 12:24 [PATCH v2 02/21] irqchip: tegra: add DT-based support for legacy interrupt controller Marc Zyngier
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