Re: Next round: revised futex(2) man page for review

[Darren Hart <dvhart-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>]

On Thu, Aug 20, 2015 at 01:17:03AM +0200, Thomas Gleixner wrote:

...

> > >> .\" FIXME XXX In discussing errors for FUTEX_CMP_REQUEUE_PI, Darren Hart
> > >> .\"       made the observation that "EINVAL is returned if the non-pi 
> > >> .\"       to pi or op pairing semantics are violated."
> > >> .\"       Probably there needs to be a general statement about this
> > >> .\"       requirement, probably located at about this point in the page.
> > >> .\"       Darren (or someone else), care to take a shot at this?
> > > 
> > > Well, that's hard to describe because the kernel only has a limited
> > > way of detecting such mismatches. It only can detect it when there are
> > > non PI waiters on a futex and a PI function is called or vice versa.
> > 
> > Hmmm. Okay, I filed your comments away for reference, but
> > hopefully someone can help with some actual text.
> 
> I let Darren come up with something sensible :)

Heh, right, no pressure then...

I responded to Michael on this recently, copied here for reference:


FUTEX_WAIT_REQUEUE_PI can return -EINVAL if called with invalid parameters, such
as uaddr==uaddr2, or (in the case of SHARED futexes), the associated keys match
(meaning it's the same futex word - shared memory, inode, etc.). This can't
happen if the stated policy of requeueing from non-pi to pi is followed as the
same word cannot be both non-pi and pi at the same time, requiring them to be
unique futex words.

FUTEX_CMP_REQUEUE_PI will fail similarly if uaddr and uaddr2 are the same futex
word. Also, if nr_wake != 1.

But, to the point I was making above, FUTEX_CMP_REQUEUE_PI must requeue uaddr to
the same uaddr2 specified in the previous FUTEX_WAIT_REQUEUE_PI call.
FUTEX_WAIT_REQUEUE_PI sets up the operation, FUTEX_CMP_REQUEUE_PI completes it,
and they must agree on uaddr and uaddr2.


Michael, are you still looking for something more from me, or is this FIXME now
complete?



-- 
Darren Hart
Intel Open Source Technology Center