From: Robin Gong <b38343@freescale.com>
To: "Bondarenko, Anton" <Anton_Bondarenko@mentor.com>
Cc: "Wang, Jiada \(ESD\)" <Jiada_Wang@mentor.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
"broonie@kernel.org" <broonie@kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"Zapolskiy, Vladimir" <Vladimir_Zapolskiy@mentor.com>
Subject: Re: [PATCH v2 3/8] spi: imx: add support for all SPI word width for DMA transfer
Date: Thu, 8 Oct 2015 17:51:03 +0800 [thread overview]
Message-ID: <20151008095102.GC6101@shlinux2> (raw)
In-Reply-To: <04376A3D786BD947B28569C998A374A62E280E21@NA-MBX-02.mgc.mentorg.com>
On Thu, Oct 01, 2015 at 12:34:54AM +0000, Bondarenko, Anton wrote:
> On 30.09.2015 10:35, Robin Gong wrote:
> > On Fri, Sep 25, 2015 at 07:57:10PM +0200, Anton Bondarenko wrote:
> >> @@ -91,11 +91,15 @@ struct spi_imx_data {
> >>
> >> struct completion xfer_done;
> >> void __iomem *base;
> >> + unsigned long base_phys;
> >> +
> >> struct clk *clk_per;
> >> struct clk *clk_ipg;
> >> unsigned long spi_clk;
> >> unsigned int spi_bus_clk;
> >>
> >> + unsigned int bpw_w;
> >> +
> > It's better to change bytes_per_word for clear understanding,since bpw in spi means
> > bits_per_word...
> Agree. Fixed in V3
> >> unsigned int count;
> >> void (*tx)(struct spi_imx_data *);
> >> void (*rx)(struct spi_imx_data *);
> >> @@ -201,9 +205,13 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
> >> struct spi_transfer *transfer)
> >> {
> >> struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
> >> + unsigned int bpw_w = transfer->bits_per_word;
> >>
> >> - if (spi_imx->dma_is_inited &&
> >> - (transfer->len > spi_imx->wml * sizeof(u32)))
> >> + if (!bpw_w)
> >> + bpw_w = spi->bits_per_word;
> >> +
> >> + bpw_w = DIV_ROUND_UP(bpw_w, 8);
> >> + if (spi_imx->dma_is_inited && (transfer->len > spi_imx->wml * bpw_w))
> > Please remove bpw_w here as I talked in the first patch.
> As explained in patch1 we need to use SPI word size in calculation to decide
> if we want to go with DMA or PIO mode. Just a short example:
> We need to transfer 24 SPI words with BPW == 32. This will take ~ 24 PIO writes
> to FIFO (and same for reads). But transfer->len will be 24*4=96 bytes.
> WML is 32 SPI words. The decision will be incorrect if we do not take into account
> SPI bits per word.
Yes, you are right, but I'm thinking so many 'DIV_ROUND_UP()'in your patch to
get bpw, can you centralize it or just use the 'bpw_w' in 'struct spi_imx_data'?
> >> return true;
> >> return false;
> >> }
> >> @@ -1007,7 +1058,8 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx,
> >> DMA_FROM_DEVICE);
> >>
> >> spi_imx->rx_buf = pio_buffer;
> >> - spi_imx->txfifo = left;
> >> + spi_imx->txfifo = DIV_ROUND_UP(left, spi_imx->bpw_w);
> >> +
> > Looks not enough here, you have to set 'spi_imx->rx' per the right bpw.
> What do you mean? We have had bpw_w == 1 before so
> spi_imx->txfifo = DIV_ROUND_UP(left, spi_imx->bpw_w);
> is equivalent to
> spi_imx->txfifo = left;
> Now we could have bpw_w equal to 2 or 4 also. txfifo is number of SPI words
> and not number of bytes.
Sorry, please ignore this comment, since 'spi_imx->rx' will be correctly set
per the right bpw in spi_imx_setupxfer whatever in DMA or PIO mode.
> >> reinit_completion(&spi_imx->xfer_done);
> >>
> >> spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TCEN);
WARNING: multiple messages have this Message-ID (diff)
From: b38343@freescale.com (Robin Gong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/8] spi: imx: add support for all SPI word width for DMA transfer
Date: Thu, 8 Oct 2015 17:51:03 +0800 [thread overview]
Message-ID: <20151008095102.GC6101@shlinux2> (raw)
In-Reply-To: <04376A3D786BD947B28569C998A374A62E280E21@NA-MBX-02.mgc.mentorg.com>
On Thu, Oct 01, 2015 at 12:34:54AM +0000, Bondarenko, Anton wrote:
> On 30.09.2015 10:35, Robin Gong wrote:
> > On Fri, Sep 25, 2015 at 07:57:10PM +0200, Anton Bondarenko wrote:
> >> @@ -91,11 +91,15 @@ struct spi_imx_data {
> >>
> >> struct completion xfer_done;
> >> void __iomem *base;
> >> + unsigned long base_phys;
> >> +
> >> struct clk *clk_per;
> >> struct clk *clk_ipg;
> >> unsigned long spi_clk;
> >> unsigned int spi_bus_clk;
> >>
> >> + unsigned int bpw_w;
> >> +
> > It's better to change bytes_per_word for clear understanding,since bpw in spi means
> > bits_per_word...
> Agree. Fixed in V3
> >> unsigned int count;
> >> void (*tx)(struct spi_imx_data *);
> >> void (*rx)(struct spi_imx_data *);
> >> @@ -201,9 +205,13 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
> >> struct spi_transfer *transfer)
> >> {
> >> struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
> >> + unsigned int bpw_w = transfer->bits_per_word;
> >>
> >> - if (spi_imx->dma_is_inited &&
> >> - (transfer->len > spi_imx->wml * sizeof(u32)))
> >> + if (!bpw_w)
> >> + bpw_w = spi->bits_per_word;
> >> +
> >> + bpw_w = DIV_ROUND_UP(bpw_w, 8);
> >> + if (spi_imx->dma_is_inited && (transfer->len > spi_imx->wml * bpw_w))
> > Please remove bpw_w here as I talked in the first patch.
> As explained in patch1 we need to use SPI word size in calculation to decide
> if we want to go with DMA or PIO mode. Just a short example:
> We need to transfer 24 SPI words with BPW == 32. This will take ~ 24 PIO writes
> to FIFO (and same for reads). But transfer->len will be 24*4=96 bytes.
> WML is 32 SPI words. The decision will be incorrect if we do not take into account
> SPI bits per word.
Yes, you are right, but I'm thinking so many 'DIV_ROUND_UP()'in your patch to
get bpw, can you centralize it or just use the 'bpw_w' in 'struct spi_imx_data'?
> >> return true;
> >> return false;
> >> }
> >> @@ -1007,7 +1058,8 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx,
> >> DMA_FROM_DEVICE);
> >>
> >> spi_imx->rx_buf = pio_buffer;
> >> - spi_imx->txfifo = left;
> >> + spi_imx->txfifo = DIV_ROUND_UP(left, spi_imx->bpw_w);
> >> +
> > Looks not enough here, you have to set 'spi_imx->rx' per the right bpw.
> What do you mean? We have had bpw_w == 1 before so
> spi_imx->txfifo = DIV_ROUND_UP(left, spi_imx->bpw_w);
> is equivalent to
> spi_imx->txfifo = left;
> Now we could have bpw_w equal to 2 or 4 also. txfifo is number of SPI words
> and not number of bytes.
Sorry, please ignore this comment, since 'spi_imx->rx' will be correctly set
per the right bpw in spi_imx_setupxfer whatever in DMA or PIO mode.
> >> reinit_completion(&spi_imx->xfer_done);
> >>
> >> spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TCEN);
WARNING: multiple messages have this Message-ID (diff)
From: Robin Gong <b38343@freescale.com>
To: "Bondarenko, Anton" <Anton_Bondarenko@mentor.com>
Cc: "broonie@kernel.org" <broonie@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"Wang, Jiada (ESD)" <Jiada_Wang@mentor.com>,
"Zapolskiy, Vladimir" <Vladimir_Zapolskiy@mentor.com>
Subject: Re: [PATCH v2 3/8] spi: imx: add support for all SPI word width for DMA transfer
Date: Thu, 8 Oct 2015 17:51:03 +0800 [thread overview]
Message-ID: <20151008095102.GC6101@shlinux2> (raw)
In-Reply-To: <04376A3D786BD947B28569C998A374A62E280E21@NA-MBX-02.mgc.mentorg.com>
On Thu, Oct 01, 2015 at 12:34:54AM +0000, Bondarenko, Anton wrote:
> On 30.09.2015 10:35, Robin Gong wrote:
> > On Fri, Sep 25, 2015 at 07:57:10PM +0200, Anton Bondarenko wrote:
> >> @@ -91,11 +91,15 @@ struct spi_imx_data {
> >>
> >> struct completion xfer_done;
> >> void __iomem *base;
> >> + unsigned long base_phys;
> >> +
> >> struct clk *clk_per;
> >> struct clk *clk_ipg;
> >> unsigned long spi_clk;
> >> unsigned int spi_bus_clk;
> >>
> >> + unsigned int bpw_w;
> >> +
> > It's better to change bytes_per_word for clear understanding,since bpw in spi means
> > bits_per_word...
> Agree. Fixed in V3
> >> unsigned int count;
> >> void (*tx)(struct spi_imx_data *);
> >> void (*rx)(struct spi_imx_data *);
> >> @@ -201,9 +205,13 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
> >> struct spi_transfer *transfer)
> >> {
> >> struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
> >> + unsigned int bpw_w = transfer->bits_per_word;
> >>
> >> - if (spi_imx->dma_is_inited &&
> >> - (transfer->len > spi_imx->wml * sizeof(u32)))
> >> + if (!bpw_w)
> >> + bpw_w = spi->bits_per_word;
> >> +
> >> + bpw_w = DIV_ROUND_UP(bpw_w, 8);
> >> + if (spi_imx->dma_is_inited && (transfer->len > spi_imx->wml * bpw_w))
> > Please remove bpw_w here as I talked in the first patch.
> As explained in patch1 we need to use SPI word size in calculation to decide
> if we want to go with DMA or PIO mode. Just a short example:
> We need to transfer 24 SPI words with BPW == 32. This will take ~ 24 PIO writes
> to FIFO (and same for reads). But transfer->len will be 24*4=96 bytes.
> WML is 32 SPI words. The decision will be incorrect if we do not take into account
> SPI bits per word.
Yes, you are right, but I'm thinking so many 'DIV_ROUND_UP()'in your patch to
get bpw, can you centralize it or just use the 'bpw_w' in 'struct spi_imx_data'?
> >> return true;
> >> return false;
> >> }
> >> @@ -1007,7 +1058,8 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx,
> >> DMA_FROM_DEVICE);
> >>
> >> spi_imx->rx_buf = pio_buffer;
> >> - spi_imx->txfifo = left;
> >> + spi_imx->txfifo = DIV_ROUND_UP(left, spi_imx->bpw_w);
> >> +
> > Looks not enough here, you have to set 'spi_imx->rx' per the right bpw.
> What do you mean? We have had bpw_w == 1 before so
> spi_imx->txfifo = DIV_ROUND_UP(left, spi_imx->bpw_w);
> is equivalent to
> spi_imx->txfifo = left;
> Now we could have bpw_w equal to 2 or 4 also. txfifo is number of SPI words
> and not number of bytes.
Sorry, please ignore this comment, since 'spi_imx->rx' will be correctly set
per the right bpw in spi_imx_setupxfer whatever in DMA or PIO mode.
> >> reinit_completion(&spi_imx->xfer_done);
> >>
> >> spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TCEN);
next prev parent reply other threads:[~2015-10-08 9:51 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-25 17:57 [PATCH v2 0/8] Improvements for SPI IMX driver for Freescale IMX53 and IMX6 families Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` [PATCH v2 1/8] spi: imx: Fix DMA transfer Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-28 3:48 ` kbuild test robot
2015-09-28 3:48 ` kbuild test robot
[not found] ` <d61ed8cc9e13b0890e6243135c613edea1234698.1442923630.git.anton_bondarenko-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2015-09-30 8:23 ` Robin Gong
2015-09-30 8:23 ` Robin Gong
2015-09-30 8:23 ` Robin Gong
2015-10-01 0:02 ` Bondarenko, Anton
2015-10-01 0:02 ` Bondarenko, Anton
2015-10-01 0:02 ` Bondarenko, Anton
2015-10-08 9:19 ` Robin Gong
2015-10-08 9:19 ` Robin Gong
2015-10-08 9:19 ` Robin Gong
2015-10-20 23:03 ` Anton Bondarenko
2015-10-20 23:03 ` Anton Bondarenko
2015-10-20 23:03 ` Anton Bondarenko
2015-09-25 17:57 ` [PATCH v2 2/8] spi: imx: replace fixed timeout with calculated one Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-30 8:31 ` Robin Gong
2015-09-30 8:31 ` Robin Gong
2015-09-30 8:31 ` Robin Gong
2015-10-01 0:08 ` Bondarenko, Anton
2015-10-01 0:08 ` Bondarenko, Anton
2015-10-01 0:08 ` Bondarenko, Anton
2015-09-25 17:57 ` [PATCH v2 3/8] spi: imx: add support for all SPI word width for DMA transfer Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-30 8:35 ` Robin Gong
2015-09-30 8:35 ` Robin Gong
2015-10-01 0:34 ` Bondarenko, Anton
2015-10-01 0:34 ` Bondarenko, Anton
2015-10-01 0:34 ` Bondarenko, Anton
2015-10-08 9:51 ` Robin Gong [this message]
2015-10-08 9:51 ` Robin Gong
2015-10-08 9:51 ` Robin Gong
2015-10-20 23:28 ` Anton Bondarenko
2015-10-20 23:28 ` Anton Bondarenko
2015-09-25 17:57 ` [PATCH v2 4/8] spi: imx: add selection for iMX53 and iMX6 controller type Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` [PATCH v2 5/8] spi: imx: Add support for loopback for ECSPI controllers Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-30 8:42 ` Robin Gong
2015-09-30 8:42 ` Robin Gong
2015-09-30 8:42 ` Robin Gong
2015-10-01 0:16 ` Bondarenko, Anton
2015-10-01 0:16 ` Bondarenko, Anton
[not found] ` <04376A3D786BD947B28569C998A374A62E280E0F-0dz9ie/QGrkPOGHby5MvPNQH9K4/4qFeAL8bYrjMMd8@public.gmane.org>
2015-10-08 9:28 ` Robin Gong
2015-10-08 9:28 ` Robin Gong
2015-10-08 9:28 ` Robin Gong
2015-10-20 23:08 ` Anton Bondarenko
2015-10-20 23:08 ` Anton Bondarenko
2015-10-20 23:08 ` Anton Bondarenko
2015-09-25 17:57 ` [PATCH v2 6/8] spi: imx: return error from dma channel request Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-30 8:51 ` Robin Gong
2015-09-30 8:51 ` Robin Gong
2015-09-25 17:57 ` [PATCH v2 7/8] spi: imx: defer spi initialization, if DMA engine is pending Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-30 8:54 ` Robin Gong
2015-09-30 8:54 ` Robin Gong
2015-09-30 8:54 ` Robin Gong
[not found] ` <cover.1442923630.git.anton_bondarenko-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2015-09-25 17:57 ` [PATCH v2 8/8] spi: imx: Add support for SPI Slave mode for imx53 and imx6 chips Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
2015-09-25 17:57 ` Anton Bondarenko
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