* [PATCH 0/3] Futher cpuid handling cleanup
@ 2015-11-02 17:59 Andrew Cooper
2015-11-02 17:59 ` [PATCH 1/3] xen/x86: Correct {a, m}perf check in generic_identify() Andrew Cooper
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Andrew Cooper @ 2015-11-02 17:59 UTC (permalink / raw)
To: Xen-devel; +Cc: Andrew Cooper
Andrew Cooper (3):
xen/x86: Correct {a,m}perf check in generic_identify()
xen/x86: Query for paddr_bits in early_cpu_detect()
xen/x86: Cleanup of early cpuid handling
xen/arch/x86/cpu/common.c | 76 +++++++++++++++++++++++------------------------
1 file changed, 38 insertions(+), 38 deletions(-)
--
2.1.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 1/3] xen/x86: Correct {a, m}perf check in generic_identify() 2015-11-02 17:59 [PATCH 0/3] Futher cpuid handling cleanup Andrew Cooper @ 2015-11-02 17:59 ` Andrew Cooper 2015-11-03 14:31 ` Konrad Rzeszutek Wilk 2015-11-02 17:59 ` [PATCH 2/3] xen/x86: Query for paddr_bits in early_cpu_detect() Andrew Cooper 2015-11-02 17:59 ` [PATCH 3/3] xen/x86: Cleanup of early cpuid handling Andrew Cooper 2 siblings, 1 reply; 9+ messages in thread From: Andrew Cooper @ 2015-11-02 17:59 UTC (permalink / raw) To: Xen-devel; +Cc: Andrew Cooper, Jan Beulich Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Jan Beulich <JBeulich@suse.com> --- xen/arch/x86/cpu/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 653b052..02f2504 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -239,7 +239,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) if ( cpu_has(c, X86_FEATURE_CLFLSH) ) c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8; - if ( (c->cpuid_level > CPUID_PM_LEAF) && + if ( (c->cpuid_level >= CPUID_PM_LEAF) && (cpuid_ecx(CPUID_PM_LEAF) & CPUID6_ECX_APERFMPERF_CAPABILITY) ) set_bit(X86_FEATURE_APERFMPERF, c->x86_capability); -- 2.1.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] xen/x86: Correct {a, m}perf check in generic_identify() 2015-11-02 17:59 ` [PATCH 1/3] xen/x86: Correct {a, m}perf check in generic_identify() Andrew Cooper @ 2015-11-03 14:31 ` Konrad Rzeszutek Wilk 0 siblings, 0 replies; 9+ messages in thread From: Konrad Rzeszutek Wilk @ 2015-11-03 14:31 UTC (permalink / raw) To: Andrew Cooper; +Cc: Jan Beulich, Xen-devel On Mon, Nov 02, 2015 at 05:59:43PM +0000, Andrew Cooper wrote: Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> > Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> > --- > CC: Jan Beulich <JBeulich@suse.com> > --- > xen/arch/x86/cpu/common.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c > index 653b052..02f2504 100644 > --- a/xen/arch/x86/cpu/common.c > +++ b/xen/arch/x86/cpu/common.c > @@ -239,7 +239,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) > if ( cpu_has(c, X86_FEATURE_CLFLSH) ) > c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8; > > - if ( (c->cpuid_level > CPUID_PM_LEAF) && > + if ( (c->cpuid_level >= CPUID_PM_LEAF) && > (cpuid_ecx(CPUID_PM_LEAF) & CPUID6_ECX_APERFMPERF_CAPABILITY) ) > set_bit(X86_FEATURE_APERFMPERF, c->x86_capability); > > -- > 2.1.4 > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/3] xen/x86: Query for paddr_bits in early_cpu_detect() 2015-11-02 17:59 [PATCH 0/3] Futher cpuid handling cleanup Andrew Cooper 2015-11-02 17:59 ` [PATCH 1/3] xen/x86: Correct {a, m}perf check in generic_identify() Andrew Cooper @ 2015-11-02 17:59 ` Andrew Cooper 2015-11-03 14:37 ` Konrad Rzeszutek Wilk 2015-11-02 17:59 ` [PATCH 3/3] xen/x86: Cleanup of early cpuid handling Andrew Cooper 2 siblings, 1 reply; 9+ messages in thread From: Andrew Cooper @ 2015-11-02 17:59 UTC (permalink / raw) To: Xen-devel; +Cc: Andrew Cooper, Jan Beulich It is __read_mostly, so repeatedly writing to it is suboptiomal. As the MTRRs have already been set up, nothing good will come from its value changing across CPUs. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Jan Beulich <JBeulich@suse.com> --- xen/arch/x86/cpu/common.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 02f2504..ac8a258 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -207,6 +207,9 @@ static void __init early_cpu_detect(void) /* Leaf 0x1 capabilities filled in early for Xen. */ c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = cap0; c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = cap4; + + if ( cpuid_eax(0x80000000) >= 0x80000008 ) + paddr_bits = cpuid_eax(0x80000008) & 0xff; } static void __cpuinit generic_identify(struct cpuinfo_x86 *c) @@ -254,8 +257,6 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) } if ( c->extended_cpuid_level >= 0x80000004 ) get_model_name(c); /* Default name */ - if ( c->extended_cpuid_level >= 0x80000008 ) - paddr_bits = cpuid_eax(0x80000008) & 0xff; } /* Might lift BIOS max_leaf=3 limit. */ -- 2.1.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] xen/x86: Query for paddr_bits in early_cpu_detect() 2015-11-02 17:59 ` [PATCH 2/3] xen/x86: Query for paddr_bits in early_cpu_detect() Andrew Cooper @ 2015-11-03 14:37 ` Konrad Rzeszutek Wilk 0 siblings, 0 replies; 9+ messages in thread From: Konrad Rzeszutek Wilk @ 2015-11-03 14:37 UTC (permalink / raw) To: Andrew Cooper; +Cc: Jan Beulich, Xen-devel On Mon, Nov 02, 2015 at 05:59:44PM +0000, Andrew Cooper wrote: > It is __read_mostly, so repeatedly writing to it is suboptiomal. As the > MTRRs have already been set up, nothing good will come from its value > changing across CPUs. Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> > > Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> > --- > CC: Jan Beulich <JBeulich@suse.com> > --- > xen/arch/x86/cpu/common.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c > index 02f2504..ac8a258 100644 > --- a/xen/arch/x86/cpu/common.c > +++ b/xen/arch/x86/cpu/common.c > @@ -207,6 +207,9 @@ static void __init early_cpu_detect(void) > /* Leaf 0x1 capabilities filled in early for Xen. */ > c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = cap0; > c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = cap4; > + > + if ( cpuid_eax(0x80000000) >= 0x80000008 ) > + paddr_bits = cpuid_eax(0x80000008) & 0xff; > } > > static void __cpuinit generic_identify(struct cpuinfo_x86 *c) > @@ -254,8 +257,6 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) > } > if ( c->extended_cpuid_level >= 0x80000004 ) > get_model_name(c); /* Default name */ > - if ( c->extended_cpuid_level >= 0x80000008 ) > - paddr_bits = cpuid_eax(0x80000008) & 0xff; > } > > /* Might lift BIOS max_leaf=3 limit. */ > -- > 2.1.4 > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/3] xen/x86: Cleanup of early cpuid handling 2015-11-02 17:59 [PATCH 0/3] Futher cpuid handling cleanup Andrew Cooper 2015-11-02 17:59 ` [PATCH 1/3] xen/x86: Correct {a, m}perf check in generic_identify() Andrew Cooper 2015-11-02 17:59 ` [PATCH 2/3] xen/x86: Query for paddr_bits in early_cpu_detect() Andrew Cooper @ 2015-11-02 17:59 ` Andrew Cooper 2015-11-03 14:41 ` Konrad Rzeszutek Wilk 2015-11-03 14:59 ` Andrew Cooper 2 siblings, 2 replies; 9+ messages in thread From: Andrew Cooper @ 2015-11-02 17:59 UTC (permalink / raw) To: Xen-devel; +Cc: Andrew Cooper, Jan Beulich Use register names for variables, rather than their content for leaf 1. Reduce the number of cpuid instructions issued. Also drop some trailing whitespace. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Jan Beulich <JBeulich@suse.com> --- xen/arch/x86/cpu/common.c | 69 +++++++++++++++++++++++------------------------ 1 file changed, 34 insertions(+), 35 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index ac8a258..c71fb13 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -180,7 +180,7 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) static void __init early_cpu_detect(void) { struct cpuinfo_x86 *c = &boot_cpu_data; - u32 cap4, tfms, cap0, misc; + u32 eax, ebx, ecx, edx; c->x86_cache_alignment = 32; @@ -192,21 +192,21 @@ static void __init early_cpu_detect(void) c->x86_vendor = get_cpu_vendor(c->x86_vendor_id, gcv_host_early); - cpuid(0x00000001, &tfms, &misc, &cap4, &cap0); - c->x86 = (tfms >> 8) & 15; - c->x86_model = (tfms >> 4) & 15; + cpuid(0x00000001, &eax, &ebx, &ecx, &edx); + c->x86 = (eax >> 8) & 15; + c->x86_model = (eax >> 4) & 15; if (c->x86 == 0xf) - c->x86 += (tfms >> 20) & 0xff; + c->x86 += (eax >> 20) & 0xff; if (c->x86 >= 0x6) - c->x86_model += ((tfms >> 16) & 0xF) << 4; - c->x86_mask = tfms & 15; - cap0 &= ~cleared_caps[cpufeat_word(X86_FEATURE_FPU)]; - cap4 &= ~cleared_caps[cpufeat_word(X86_FEATURE_XMM3)]; - if (cap0 & cpufeat_mask(X86_FEATURE_CLFLSH)) - c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8; + c->x86_model += ((eax >> 16) & 0xF) << 4; + c->x86_mask = eax & 15; + edx &= ~cleared_caps[cpufeat_word(X86_FEATURE_FPU)]; + ecx &= ~cleared_caps[cpufeat_word(X86_FEATURE_XMM3)]; + if (edx & cpufeat_mask(X86_FEATURE_CLFLSH)) + c->x86_cache_alignment = ((ebx >> 8) & 0xff) * 8; /* Leaf 0x1 capabilities filled in early for Xen. */ - c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = cap0; - c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = cap4; + c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = edx; + c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = ecx; if ( cpuid_eax(0x80000000) >= 0x80000008 ) paddr_bits = cpuid_eax(0x80000008) & 0xff; @@ -214,29 +214,29 @@ static void __init early_cpu_detect(void) static void __cpuinit generic_identify(struct cpuinfo_x86 *c) { - u32 tfms, capability, excap, ebx; + u32 eax, ebx, ecx, edx, tmp; /* Get vendor name */ cpuid(0x00000000, &c->cpuid_level, (int *)&c->x86_vendor_id[0], (int *)&c->x86_vendor_id[8], (int *)&c->x86_vendor_id[4]); - + c->x86_vendor = get_cpu_vendor(c->x86_vendor_id, gcv_host_late); /* Initialize the standard set of capabilities */ /* Note that the vendor-specific code below might override */ - + /* Intel-defined flags: level 0x00000001 */ - cpuid(0x00000001, &tfms, &ebx, &excap, &capability); - c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = capability; - c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = excap; - c->x86 = (tfms >> 8) & 15; - c->x86_model = (tfms >> 4) & 15; + cpuid(0x00000001, &eax, &ebx, &ecx, &edx); + c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = edx; + c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = ecx; + c->x86 = (eax >> 8) & 15; + c->x86_model = (eax >> 4) & 15; if (c->x86 == 0xf) - c->x86 += (tfms >> 20) & 0xff; + c->x86 += (eax >> 20) & 0xff; if (c->x86 >= 0x6) - c->x86_model += ((tfms >> 16) & 0xF) << 4; - c->x86_mask = tfms & 15; + c->x86_model += ((eax >> 16) & 0xF) << 4; + c->x86_mask = eax & 15; c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); c->phys_proc_id = c->apicid; if ( cpu_has(c, X86_FEATURE_CLFLSH) ) @@ -249,12 +249,12 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) /* AMD-defined flags: level 0x80000001 */ c->extended_cpuid_level = cpuid_eax(0x80000000); if ( (c->extended_cpuid_level & 0xffff0000) == 0x80000000 ) { - if ( c->extended_cpuid_level >= 0x80000001 ) { - c->x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)] - = cpuid_edx(0x80000001); - c->x86_capability[cpufeat_word(X86_FEATURE_LAHF_LM)] - = cpuid_ecx(0x80000001); - } + if ( c->extended_cpuid_level >= 0x80000001 ) + cpuid(0x80000001, &tmp, + &c->x86_capability[cpufeat_word(X86_FEATURE_LAHF_LM)], + &c->x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)], + &tmp); + if ( c->extended_cpuid_level >= 0x80000004 ) get_model_name(c); /* Default name */ } @@ -263,11 +263,10 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) early_intel_workaround(c); /* Intel-defined flags: level 0x00000007 */ - if ( c->cpuid_level >= 0x00000007 ) { - u32 dummy; - cpuid_count(0x00000007, 0, &dummy, &ebx, &dummy, &dummy); - c->x86_capability[cpufeat_word(X86_FEATURE_FSGSBASE)] = ebx; - } + if ( c->cpuid_level >= 0x00000007 ) + cpuid_count(0x00000007, 0, &tmp, + &c->x86_capability[cpufeat_word(X86_FEATURE_FSGSBASE)], + &tmp, &tmp); } /* -- 2.1.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 3/3] xen/x86: Cleanup of early cpuid handling 2015-11-02 17:59 ` [PATCH 3/3] xen/x86: Cleanup of early cpuid handling Andrew Cooper @ 2015-11-03 14:41 ` Konrad Rzeszutek Wilk 2015-11-03 14:59 ` Andrew Cooper 1 sibling, 0 replies; 9+ messages in thread From: Konrad Rzeszutek Wilk @ 2015-11-03 14:41 UTC (permalink / raw) To: Andrew Cooper; +Cc: Jan Beulich, Xen-devel On Mon, Nov 02, 2015 at 05:59:45PM +0000, Andrew Cooper wrote: > Use register names for variables, rather than their content for leaf 1. > Reduce the number of cpuid instructions issued. Also drop some trailing > whitespace. > > No functional change. I checked for that and: Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> > > Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> > --- > CC: Jan Beulich <JBeulich@suse.com> > --- > xen/arch/x86/cpu/common.c | 69 +++++++++++++++++++++++------------------------ > 1 file changed, 34 insertions(+), 35 deletions(-) > > diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c > index ac8a258..c71fb13 100644 > --- a/xen/arch/x86/cpu/common.c > +++ b/xen/arch/x86/cpu/common.c > @@ -180,7 +180,7 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) > static void __init early_cpu_detect(void) > { > struct cpuinfo_x86 *c = &boot_cpu_data; > - u32 cap4, tfms, cap0, misc; > + u32 eax, ebx, ecx, edx; > > c->x86_cache_alignment = 32; > > @@ -192,21 +192,21 @@ static void __init early_cpu_detect(void) > > c->x86_vendor = get_cpu_vendor(c->x86_vendor_id, gcv_host_early); > > - cpuid(0x00000001, &tfms, &misc, &cap4, &cap0); > - c->x86 = (tfms >> 8) & 15; > - c->x86_model = (tfms >> 4) & 15; > + cpuid(0x00000001, &eax, &ebx, &ecx, &edx); > + c->x86 = (eax >> 8) & 15; > + c->x86_model = (eax >> 4) & 15; > if (c->x86 == 0xf) > - c->x86 += (tfms >> 20) & 0xff; > + c->x86 += (eax >> 20) & 0xff; > if (c->x86 >= 0x6) > - c->x86_model += ((tfms >> 16) & 0xF) << 4; > - c->x86_mask = tfms & 15; > - cap0 &= ~cleared_caps[cpufeat_word(X86_FEATURE_FPU)]; > - cap4 &= ~cleared_caps[cpufeat_word(X86_FEATURE_XMM3)]; > - if (cap0 & cpufeat_mask(X86_FEATURE_CLFLSH)) > - c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8; > + c->x86_model += ((eax >> 16) & 0xF) << 4; > + c->x86_mask = eax & 15; > + edx &= ~cleared_caps[cpufeat_word(X86_FEATURE_FPU)]; > + ecx &= ~cleared_caps[cpufeat_word(X86_FEATURE_XMM3)]; > + if (edx & cpufeat_mask(X86_FEATURE_CLFLSH)) > + c->x86_cache_alignment = ((ebx >> 8) & 0xff) * 8; > /* Leaf 0x1 capabilities filled in early for Xen. */ > - c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = cap0; > - c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = cap4; > + c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = edx; > + c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = ecx; > > if ( cpuid_eax(0x80000000) >= 0x80000008 ) > paddr_bits = cpuid_eax(0x80000008) & 0xff; > @@ -214,29 +214,29 @@ static void __init early_cpu_detect(void) > > static void __cpuinit generic_identify(struct cpuinfo_x86 *c) > { > - u32 tfms, capability, excap, ebx; > + u32 eax, ebx, ecx, edx, tmp; > > /* Get vendor name */ > cpuid(0x00000000, &c->cpuid_level, > (int *)&c->x86_vendor_id[0], > (int *)&c->x86_vendor_id[8], > (int *)&c->x86_vendor_id[4]); > - > + > c->x86_vendor = get_cpu_vendor(c->x86_vendor_id, gcv_host_late); > /* Initialize the standard set of capabilities */ > /* Note that the vendor-specific code below might override */ > - > + > /* Intel-defined flags: level 0x00000001 */ > - cpuid(0x00000001, &tfms, &ebx, &excap, &capability); > - c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = capability; > - c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = excap; > - c->x86 = (tfms >> 8) & 15; > - c->x86_model = (tfms >> 4) & 15; > + cpuid(0x00000001, &eax, &ebx, &ecx, &edx); > + c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = edx; > + c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = ecx; > + c->x86 = (eax >> 8) & 15; > + c->x86_model = (eax >> 4) & 15; > if (c->x86 == 0xf) > - c->x86 += (tfms >> 20) & 0xff; > + c->x86 += (eax >> 20) & 0xff; > if (c->x86 >= 0x6) > - c->x86_model += ((tfms >> 16) & 0xF) << 4; > - c->x86_mask = tfms & 15; > + c->x86_model += ((eax >> 16) & 0xF) << 4; > + c->x86_mask = eax & 15; > c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); > c->phys_proc_id = c->apicid; > if ( cpu_has(c, X86_FEATURE_CLFLSH) ) > @@ -249,12 +249,12 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) > /* AMD-defined flags: level 0x80000001 */ > c->extended_cpuid_level = cpuid_eax(0x80000000); > if ( (c->extended_cpuid_level & 0xffff0000) == 0x80000000 ) { > - if ( c->extended_cpuid_level >= 0x80000001 ) { > - c->x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)] > - = cpuid_edx(0x80000001); > - c->x86_capability[cpufeat_word(X86_FEATURE_LAHF_LM)] > - = cpuid_ecx(0x80000001); > - } > + if ( c->extended_cpuid_level >= 0x80000001 ) > + cpuid(0x80000001, &tmp, > + &c->x86_capability[cpufeat_word(X86_FEATURE_LAHF_LM)], > + &c->x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)], > + &tmp); > + > if ( c->extended_cpuid_level >= 0x80000004 ) > get_model_name(c); /* Default name */ > } > @@ -263,11 +263,10 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) > early_intel_workaround(c); > > /* Intel-defined flags: level 0x00000007 */ > - if ( c->cpuid_level >= 0x00000007 ) { > - u32 dummy; > - cpuid_count(0x00000007, 0, &dummy, &ebx, &dummy, &dummy); > - c->x86_capability[cpufeat_word(X86_FEATURE_FSGSBASE)] = ebx; > - } > + if ( c->cpuid_level >= 0x00000007 ) > + cpuid_count(0x00000007, 0, &tmp, > + &c->x86_capability[cpufeat_word(X86_FEATURE_FSGSBASE)], > + &tmp, &tmp); > } > > /* > -- > 2.1.4 > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 3/3] xen/x86: Cleanup of early cpuid handling 2015-11-02 17:59 ` [PATCH 3/3] xen/x86: Cleanup of early cpuid handling Andrew Cooper 2015-11-03 14:41 ` Konrad Rzeszutek Wilk @ 2015-11-03 14:59 ` Andrew Cooper 2015-11-03 18:14 ` [PATCH v2 " Andrew Cooper 1 sibling, 1 reply; 9+ messages in thread From: Andrew Cooper @ 2015-11-03 14:59 UTC (permalink / raw) To: Xen-devel; +Cc: Jan Beulich On 02/11/15 17:59, Andrew Cooper wrote: > Use register names for variables, rather than their content for leaf 1. > Reduce the number of cpuid instructions issued. Also drop some trailing > whitespace. > > No functional change. > > Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Apologies - this patch is broken and causes a failure on boot. v2 on its way. ~Andrew ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 3/3] xen/x86: Cleanup of early cpuid handling 2015-11-03 14:59 ` Andrew Cooper @ 2015-11-03 18:14 ` Andrew Cooper 0 siblings, 0 replies; 9+ messages in thread From: Andrew Cooper @ 2015-11-03 18:14 UTC (permalink / raw) To: Xen-devel; +Cc: Andrew Cooper, Jan Beulich Use register names for variables, rather than their content for leaf 1. Reduce the number of cpuid instructions issued. Also drop some trailing whitespace. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Jan Beulich <JBeulich@suse.com> v2: Record the correct registers for the 0x80000001 feature leaves --- xen/arch/x86/cpu/common.c | 68 +++++++++++++++++++++++------------------------ 1 file changed, 33 insertions(+), 35 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index ac8a258..a111ed6 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -180,7 +180,7 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) static void __init early_cpu_detect(void) { struct cpuinfo_x86 *c = &boot_cpu_data; - u32 cap4, tfms, cap0, misc; + u32 eax, ebx, ecx, edx; c->x86_cache_alignment = 32; @@ -192,21 +192,21 @@ static void __init early_cpu_detect(void) c->x86_vendor = get_cpu_vendor(c->x86_vendor_id, gcv_host_early); - cpuid(0x00000001, &tfms, &misc, &cap4, &cap0); - c->x86 = (tfms >> 8) & 15; - c->x86_model = (tfms >> 4) & 15; + cpuid(0x00000001, &eax, &ebx, &ecx, &edx); + c->x86 = (eax >> 8) & 15; + c->x86_model = (eax >> 4) & 15; if (c->x86 == 0xf) - c->x86 += (tfms >> 20) & 0xff; + c->x86 += (eax >> 20) & 0xff; if (c->x86 >= 0x6) - c->x86_model += ((tfms >> 16) & 0xF) << 4; - c->x86_mask = tfms & 15; - cap0 &= ~cleared_caps[cpufeat_word(X86_FEATURE_FPU)]; - cap4 &= ~cleared_caps[cpufeat_word(X86_FEATURE_XMM3)]; - if (cap0 & cpufeat_mask(X86_FEATURE_CLFLSH)) - c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8; + c->x86_model += ((eax >> 16) & 0xF) << 4; + c->x86_mask = eax & 15; + edx &= ~cleared_caps[cpufeat_word(X86_FEATURE_FPU)]; + ecx &= ~cleared_caps[cpufeat_word(X86_FEATURE_XMM3)]; + if (edx & cpufeat_mask(X86_FEATURE_CLFLSH)) + c->x86_cache_alignment = ((ebx >> 8) & 0xff) * 8; /* Leaf 0x1 capabilities filled in early for Xen. */ - c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = cap0; - c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = cap4; + c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = edx; + c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = ecx; if ( cpuid_eax(0x80000000) >= 0x80000008 ) paddr_bits = cpuid_eax(0x80000008) & 0xff; @@ -214,29 +214,29 @@ static void __init early_cpu_detect(void) static void __cpuinit generic_identify(struct cpuinfo_x86 *c) { - u32 tfms, capability, excap, ebx; + u32 eax, ebx, ecx, edx, tmp; /* Get vendor name */ cpuid(0x00000000, &c->cpuid_level, (int *)&c->x86_vendor_id[0], (int *)&c->x86_vendor_id[8], (int *)&c->x86_vendor_id[4]); - + c->x86_vendor = get_cpu_vendor(c->x86_vendor_id, gcv_host_late); /* Initialize the standard set of capabilities */ /* Note that the vendor-specific code below might override */ - + /* Intel-defined flags: level 0x00000001 */ - cpuid(0x00000001, &tfms, &ebx, &excap, &capability); - c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = capability; - c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = excap; - c->x86 = (tfms >> 8) & 15; - c->x86_model = (tfms >> 4) & 15; + cpuid(0x00000001, &eax, &ebx, &ecx, &edx); + c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = edx; + c->x86_capability[cpufeat_word(X86_FEATURE_XMM3)] = ecx; + c->x86 = (eax >> 8) & 15; + c->x86_model = (eax >> 4) & 15; if (c->x86 == 0xf) - c->x86 += (tfms >> 20) & 0xff; + c->x86 += (eax >> 20) & 0xff; if (c->x86 >= 0x6) - c->x86_model += ((tfms >> 16) & 0xF) << 4; - c->x86_mask = tfms & 15; + c->x86_model += ((eax >> 16) & 0xF) << 4; + c->x86_mask = eax & 15; c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); c->phys_proc_id = c->apicid; if ( cpu_has(c, X86_FEATURE_CLFLSH) ) @@ -249,12 +249,11 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) /* AMD-defined flags: level 0x80000001 */ c->extended_cpuid_level = cpuid_eax(0x80000000); if ( (c->extended_cpuid_level & 0xffff0000) == 0x80000000 ) { - if ( c->extended_cpuid_level >= 0x80000001 ) { - c->x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)] - = cpuid_edx(0x80000001); - c->x86_capability[cpufeat_word(X86_FEATURE_LAHF_LM)] - = cpuid_ecx(0x80000001); - } + if ( c->extended_cpuid_level >= 0x80000001 ) + cpuid(0x80000001, &tmp, &tmp, + &c->x86_capability[cpufeat_word(X86_FEATURE_LAHF_LM)], + &c->x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)]); + if ( c->extended_cpuid_level >= 0x80000004 ) get_model_name(c); /* Default name */ } @@ -263,11 +262,10 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) early_intel_workaround(c); /* Intel-defined flags: level 0x00000007 */ - if ( c->cpuid_level >= 0x00000007 ) { - u32 dummy; - cpuid_count(0x00000007, 0, &dummy, &ebx, &dummy, &dummy); - c->x86_capability[cpufeat_word(X86_FEATURE_FSGSBASE)] = ebx; - } + if ( c->cpuid_level >= 0x00000007 ) + cpuid_count(0x00000007, 0, &tmp, + &c->x86_capability[cpufeat_word(X86_FEATURE_FSGSBASE)], + &tmp, &tmp); } /* -- 2.1.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2015-11-03 18:14 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-11-02 17:59 [PATCH 0/3] Futher cpuid handling cleanup Andrew Cooper
2015-11-02 17:59 ` [PATCH 1/3] xen/x86: Correct {a, m}perf check in generic_identify() Andrew Cooper
2015-11-03 14:31 ` Konrad Rzeszutek Wilk
2015-11-02 17:59 ` [PATCH 2/3] xen/x86: Query for paddr_bits in early_cpu_detect() Andrew Cooper
2015-11-03 14:37 ` Konrad Rzeszutek Wilk
2015-11-02 17:59 ` [PATCH 3/3] xen/x86: Cleanup of early cpuid handling Andrew Cooper
2015-11-03 14:41 ` Konrad Rzeszutek Wilk
2015-11-03 14:59 ` Andrew Cooper
2015-11-03 18:14 ` [PATCH v2 " Andrew Cooper
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.