From: Nicolin Chen <nicoleotsuka-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Caleb Crome <caleb-EebDDntmC0DYtjvyW6yDsg@public.gmane.org>
Cc: Timur Tabi <timur-N01EOCouUvQ@public.gmane.org>,
Xiubo Li <Xiubo.Lee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Liam Girdwood <lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Jaroslav Kysela <perex-/Fr2/VpizcU@public.gmane.org>,
Takashi Iwai <tiwai-IBi9RG/b67k@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
alsa-devel-K7yf7f+aM1XWsZ/bQMPhNw@public.gmane.org
Subject: Re: [PATCH RFC 1/1] ASoC: fsl_ssi: Make fifo watermark and maxburst settings device tree options
Date: Thu, 14 Jan 2016 12:18:59 -0800 [thread overview]
Message-ID: <20160114201858.GA17567@Asurada-Nvidia> (raw)
In-Reply-To: <1452788982-11583-1-git-send-email-caleb-EebDDntmC0DYtjvyW6yDsg@public.gmane.org>
On Thu, Jan 14, 2016 at 08:29:42AM -0800, Caleb Crome wrote:
> Tuning the SSI fifo watermark & maxburst settings needs to be
> optimized differently depending on the demands on the system. The
> current default of 2 is too low for high data-rate systems. This
> patch maintains exactly the same behavior by default (i.e defaults to
> 2), but adds device tree options to set maxburst & fifo depth from the
> device tree. This is necessary because a setting of 2 simply doesn't
> work at higher data rates.
> @@ -61,6 +61,16 @@ Optional properties:
> - fsl,mode: The operating mode for the AC97 interface only.
> "ac97-slave" - AC97 mode, SSI is clock slave
> "ac97-master" - AC97 mode, SSI is clock master
> +- fsl,fifo-watermark: Sets the fifo watermark. The default is
> + fifo_depth-2 words, meaning 'initiate dma transfer
> + when 2 words are left in the fifo'. At higher
> + data rates (48kHz, 16-channels for example), this
> + causes silent but deadly DMA xruns and channel
> + slips. For 15 word FIFOs (like on MX5, MX6) 8 is
> + a good value when running at high data rates
> +- fsl,dma-maxburst: sets the max number of words to transfer in DMA.
> + This defaults to the same value as
> + fsl,fifo-watermark.
I think DT maintainers may not give a consent towards these two
properties as they are not to describe the hardware but to hack
software configurations. (And it seems you haven't CCed them.)
I forgot which values you've figured out for these two properties,
but I think those two values should work for normal cases as well:
as SSI only has limited FIFO depth, it won't hurt (increasing too
much latency) even if using a higher watermark configuration imo.
So it could be a good idea to use optimized settings for all use
cases and let other users test it.
Nicolin
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WARNING: multiple messages have this Message-ID (diff)
From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Caleb Crome <caleb@crome.org>
Cc: Timur Tabi <timur@tabi.org>, Xiubo Li <Xiubo.Lee@gmail.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
alsa-devel@alsa-project.org
Subject: Re: [PATCH RFC 1/1] ASoC: fsl_ssi: Make fifo watermark and maxburst settings device tree options
Date: Thu, 14 Jan 2016 12:18:59 -0800 [thread overview]
Message-ID: <20160114201858.GA17567@Asurada-Nvidia> (raw)
In-Reply-To: <1452788982-11583-1-git-send-email-caleb@crome.org>
On Thu, Jan 14, 2016 at 08:29:42AM -0800, Caleb Crome wrote:
> Tuning the SSI fifo watermark & maxburst settings needs to be
> optimized differently depending on the demands on the system. The
> current default of 2 is too low for high data-rate systems. This
> patch maintains exactly the same behavior by default (i.e defaults to
> 2), but adds device tree options to set maxburst & fifo depth from the
> device tree. This is necessary because a setting of 2 simply doesn't
> work at higher data rates.
> @@ -61,6 +61,16 @@ Optional properties:
> - fsl,mode: The operating mode for the AC97 interface only.
> "ac97-slave" - AC97 mode, SSI is clock slave
> "ac97-master" - AC97 mode, SSI is clock master
> +- fsl,fifo-watermark: Sets the fifo watermark. The default is
> + fifo_depth-2 words, meaning 'initiate dma transfer
> + when 2 words are left in the fifo'. At higher
> + data rates (48kHz, 16-channels for example), this
> + causes silent but deadly DMA xruns and channel
> + slips. For 15 word FIFOs (like on MX5, MX6) 8 is
> + a good value when running at high data rates
> +- fsl,dma-maxburst: sets the max number of words to transfer in DMA.
> + This defaults to the same value as
> + fsl,fifo-watermark.
I think DT maintainers may not give a consent towards these two
properties as they are not to describe the hardware but to hack
software configurations. (And it seems you haven't CCed them.)
I forgot which values you've figured out for these two properties,
but I think those two values should work for normal cases as well:
as SSI only has limited FIFO depth, it won't hurt (increasing too
much latency) even if using a higher watermark configuration imo.
So it could be a good idea to use optimized settings for all use
cases and let other users test it.
Nicolin
next prev parent reply other threads:[~2016-01-14 20:18 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-14 16:29 [PATCH RFC 1/1] ASoC: fsl_ssi: Make fifo watermark and maxburst settings device tree options Caleb Crome
[not found] ` <1452788982-11583-1-git-send-email-caleb-EebDDntmC0DYtjvyW6yDsg@public.gmane.org>
2016-01-14 20:18 ` Nicolin Chen [this message]
2016-01-14 20:18 ` Nicolin Chen
2016-01-14 21:26 ` Caleb Crome
2016-01-14 21:26 ` Caleb Crome
2016-01-15 2:45 ` Nicolin Chen
2016-01-15 4:56 ` Caleb Crome
2016-01-15 4:56 ` Caleb Crome
2016-01-15 18:12 ` Nicolin Chen
2016-01-15 1:31 ` Timur Tabi
2016-01-15 2:33 ` Nicolin Chen
2016-01-15 3:25 ` Rob Herring
2016-01-15 3:25 ` Rob Herring
[not found] ` <56984BE7.2050303-N01EOCouUvQ@public.gmane.org>
2016-01-15 13:13 ` Mark Brown
2016-01-15 13:13 ` Mark Brown
[not found] ` <20160115131325.GW6588-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-01-15 13:46 ` Timur Tabi
2016-01-15 13:46 ` Timur Tabi
2016-01-15 17:03 ` Caleb Crome
2016-01-15 17:03 ` Caleb Crome
2016-01-15 18:38 ` Nicolin Chen
2016-01-15 18:49 ` Caleb Crome
2016-01-15 18:57 ` Nicolin Chen
2016-01-15 19:10 ` Caleb Crome
2016-01-15 19:23 ` Nicolin Chen
2016-01-15 19:23 ` Nicolin Chen
2016-01-15 19:49 ` Timur Tabi
[not found] ` <CAG5mAdyUfSuCqA4_342MS2AyshvuyeiYsjQyRqifmqVhn4T2xA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-01-16 14:15 ` Timur Tabi
2016-01-16 14:15 ` Timur Tabi
2016-01-17 23:34 ` Caleb Crome
2016-01-15 19:51 ` Timur Tabi
2016-01-15 19:51 ` Timur Tabi
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