From: Pranith Kumar <bobby.prani@gmail.com>
To: Claudio Fontana <claudio.fontana@huawei.com>,
Richard Henderson <rth@twiddle.net>,
qemu-arm@nongnu.org (open list:AArch64 target),
qemu-devel@nongnu.org (open list:All patches CC here)
Cc: qemu-devel@nongnu.org, alex.bennee@linaro.org,
serge.fdrv@gmail.com, pbonzini@redhat.com,
peter.maydell@linaro.org,
Claudio Fontana <claudio.fontana@gmail.com>
Subject: [PATCH v4 03/14] tcg/aarch64: Add support for fence
Date: Thu, 14 Jul 2016 16:20:15 -0400 [thread overview]
Message-ID: <20160714202026.9727-4-bobby.prani@gmail.com> (raw)
In-Reply-To: <20160714202026.9727-1-bobby.prani@gmail.com>
Cc: Claudio Fontana <claudio.fontana@gmail.com>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
---
tcg/aarch64/tcg-target.inc.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 08b2d03..1d220b7 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -372,6 +372,11 @@ typedef enum {
I3510_EOR = 0x4a000000,
I3510_EON = 0x4a200000,
I3510_ANDS = 0x6a000000,
+
+ /* System instructions. */
+ DMB_ISH = 0xd50338bf,
+ DMB_LD = 0x00000100,
+ DMB_ST = 0x00000200,
} AArch64Insn;
static inline uint32_t tcg_in32(TCGContext *s)
@@ -981,6 +986,22 @@ static inline void tcg_out_addsub2(TCGContext *s, int ext, TCGReg rl,
tcg_out_mov(s, ext, orig_rl, rl);
}
+static inline void tcg_out_mb(TCGContext *s, TCGArg a0)
+{
+ uint32_t dmb_type = DMB_ISH;
+ if (a0 & (TCG_MO_LD_ST | TCG_MO_ST_LD)) {
+ tcg_out32(s, dmb_type | DMB_LD | DMB_ST);
+ return;
+ }
+ if (a0 & TCG_MO_LD_LD) {
+ dmb_type |= DMB_LD;
+ }
+ if (a0 & TCG_MO_ST_ST) {
+ dmb_type |= DMB_ST;
+ }
+ tcg_out32(s, dmb_type);
+}
+
#ifdef CONFIG_SOFTMMU
/* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
* TCGMemOpIdx oi, uintptr_t ra)
@@ -1648,6 +1669,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_insn(s, 3508, SMULH, TCG_TYPE_I64, a0, a1, a2);
break;
+ case INDEX_op_mb:
+ tcg_out_mb(s, a0);
+ break;
+
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
@@ -1772,6 +1797,7 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
{ INDEX_op_muluh_i64, { "r", "r", "r" } },
{ INDEX_op_mulsh_i64, { "r", "r", "r" } },
+ { INDEX_op_mb, { } },
{ -1 },
};
--
2.9.0
WARNING: multiple messages have this Message-ID (diff)
From: Pranith Kumar <bobby.prani@gmail.com>
To: Claudio Fontana <claudio.fontana@huawei.com>,
Richard Henderson <rth@twiddle.net>,
"open list:AArch64 target" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: alex.bennee@linaro.org, serge.fdrv@gmail.com,
pbonzini@redhat.com, peter.maydell@linaro.org,
Claudio Fontana <claudio.fontana@gmail.com>
Subject: [Qemu-devel] [PATCH v4 03/14] tcg/aarch64: Add support for fence
Date: Thu, 14 Jul 2016 16:20:15 -0400 [thread overview]
Message-ID: <20160714202026.9727-4-bobby.prani@gmail.com> (raw)
In-Reply-To: <20160714202026.9727-1-bobby.prani@gmail.com>
Cc: Claudio Fontana <claudio.fontana@gmail.com>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
---
tcg/aarch64/tcg-target.inc.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 08b2d03..1d220b7 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -372,6 +372,11 @@ typedef enum {
I3510_EOR = 0x4a000000,
I3510_EON = 0x4a200000,
I3510_ANDS = 0x6a000000,
+
+ /* System instructions. */
+ DMB_ISH = 0xd50338bf,
+ DMB_LD = 0x00000100,
+ DMB_ST = 0x00000200,
} AArch64Insn;
static inline uint32_t tcg_in32(TCGContext *s)
@@ -981,6 +986,22 @@ static inline void tcg_out_addsub2(TCGContext *s, int ext, TCGReg rl,
tcg_out_mov(s, ext, orig_rl, rl);
}
+static inline void tcg_out_mb(TCGContext *s, TCGArg a0)
+{
+ uint32_t dmb_type = DMB_ISH;
+ if (a0 & (TCG_MO_LD_ST | TCG_MO_ST_LD)) {
+ tcg_out32(s, dmb_type | DMB_LD | DMB_ST);
+ return;
+ }
+ if (a0 & TCG_MO_LD_LD) {
+ dmb_type |= DMB_LD;
+ }
+ if (a0 & TCG_MO_ST_ST) {
+ dmb_type |= DMB_ST;
+ }
+ tcg_out32(s, dmb_type);
+}
+
#ifdef CONFIG_SOFTMMU
/* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
* TCGMemOpIdx oi, uintptr_t ra)
@@ -1648,6 +1669,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_insn(s, 3508, SMULH, TCG_TYPE_I64, a0, a1, a2);
break;
+ case INDEX_op_mb:
+ tcg_out_mb(s, a0);
+ break;
+
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
@@ -1772,6 +1797,7 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
{ INDEX_op_muluh_i64, { "r", "r", "r" } },
{ INDEX_op_mulsh_i64, { "r", "r", "r" } },
+ { INDEX_op_mb, { } },
{ -1 },
};
--
2.9.0
next prev parent reply other threads:[~2016-07-14 20:20 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-14 20:20 [Qemu-devel] [PATCH v4 00/14] tcg: Add support for fence generation Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 01/14] Introduce TCGOpcode for memory barrier Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 02/14] tcg/i386: Add support for fence Pranith Kumar
2016-07-14 20:20 ` Pranith Kumar [this message]
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 03/14] tcg/aarch64: " Pranith Kumar
2016-07-14 20:20 ` [PATCH v4 04/14] tcg/arm: " Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] " Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 05/14] tcg/ia64: " Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 06/14] tcg/mips: " Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 07/14] tcg/ppc: " Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 08/14] tcg/s390: " Pranith Kumar
2016-10-16 8:47 ` Stefan Hajnoczi
2016-10-16 16:17 ` Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 09/14] tcg/sparc: " Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 10/14] tcg/tci: " Pranith Kumar
2016-07-14 20:20 ` [PATCH v4 11/14] target-arm: Generate fences in ARMv7 frontend Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] " Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 12/14] target-alpha: Generate fence op Pranith Kumar
2016-07-14 20:20 ` [PATCH v4 13/14] target-aarch64: Generate fences for aarch64 Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] " Pranith Kumar
2016-07-14 20:20 ` [Qemu-devel] [PATCH v4 14/14] target-i386: Generate fences for x86 Pranith Kumar
2016-07-23 16:08 ` [Qemu-devel] [PATCH v4 00/14] tcg: Add support for fence generation Pranith Kumar
2016-07-23 17:34 ` Paolo Bonzini
2016-07-23 18:00 ` Pranith Kumar
2016-08-08 14:05 ` Pranith Kumar
2016-09-07 17:33 ` Richard Henderson
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