From: Vinod Koul <vinod.koul@intel.com>
To: Sinan Kaya <okaya@codeaurora.org>
Cc: dmaengine@vger.kernel.org, timur@codeaurora.org,
devicetree@vger.kernel.org, cov@codeaurora.org, jcm@redhat.com,
agross@codeaurora.org, arnd@arndb.de,
linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Dan Williams <dan.j.williams@intel.com>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH V4 05/10] dmaengine: qcom_hidma: make pending_tre_count atomic
Date: Mon, 3 Oct 2016 09:09:24 +0530 [thread overview]
Message-ID: <20161003033923.GQ2467@localhost> (raw)
In-Reply-To: <e5782331-0dc6-9e0e-777c-372dc88f38e3@codeaurora.org>
On Sat, Oct 01, 2016 at 11:19:43AM -0400, Sinan Kaya wrote:
> On 10/1/2016 2:19 AM, Vinod Koul wrote:
> >> Making it atomic so that it can be updated from multiple contexts.
> > How is it multiple contexts? It's either existing context of MSI, not both!
> >
>
> I was trying to mean multiple processor contexts here. The driver allocates 11
> MSI interrupts. Each MSI interrupt can be assigned to a different CPU. Then,
> we have a race condition for common variables as they share the same interrupt
> handler with a different cause bit.
>
> I will put the above description into the commit text.
Sounds better :)
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: vinod.koul@intel.com (Vinod Koul)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V4 05/10] dmaengine: qcom_hidma: make pending_tre_count atomic
Date: Mon, 3 Oct 2016 09:09:24 +0530 [thread overview]
Message-ID: <20161003033923.GQ2467@localhost> (raw)
In-Reply-To: <e5782331-0dc6-9e0e-777c-372dc88f38e3@codeaurora.org>
On Sat, Oct 01, 2016 at 11:19:43AM -0400, Sinan Kaya wrote:
> On 10/1/2016 2:19 AM, Vinod Koul wrote:
> >> Making it atomic so that it can be updated from multiple contexts.
> > How is it multiple contexts? It's either existing context of MSI, not both!
> >
>
> I was trying to mean multiple processor contexts here. The driver allocates 11
> MSI interrupts. Each MSI interrupt can be assigned to a different CPU. Then,
> we have a race condition for common variables as they share the same interrupt
> handler with a different cause bit.
>
> I will put the above description into the commit text.
Sounds better :)
--
~Vinod
next prev parent reply other threads:[~2016-10-03 3:30 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-29 2:12 [PATCH V4 00/10] dmaengine: qcom_hidma: add MSI interrupt support Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
[not found] ` <1475115167-5898-1-git-send-email-okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-09-29 2:12 ` [PATCH V4 01/10] Documentation: DT: qcom_hidma: update binding for MSI Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` [PATCH V4 03/10] of: irq: make of_msi_configure accessible from modules Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` [PATCH V4 04/10] dmaengine: qcom_hidma: configure DMA and MSI for OF Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-10-01 6:17 ` Vinod Koul
2016-10-01 6:17 ` Vinod Koul
2016-10-01 15:15 ` Sinan Kaya
2016-10-01 15:15 ` Sinan Kaya
2016-10-03 3:38 ` Vinod Koul
2016-10-03 3:38 ` Vinod Koul
2016-10-03 13:39 ` Sinan Kaya
2016-10-03 13:39 ` Sinan Kaya
2016-10-03 13:39 ` Sinan Kaya
2016-09-29 2:12 ` [PATCH V4 05/10] dmaengine: qcom_hidma: make pending_tre_count atomic Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-10-01 6:19 ` Vinod Koul
2016-10-01 6:19 ` Vinod Koul
2016-10-01 15:19 ` Sinan Kaya
2016-10-01 15:19 ` Sinan Kaya
2016-10-03 3:39 ` Vinod Koul [this message]
2016-10-03 3:39 ` Vinod Koul
2016-09-29 2:12 ` [PATCH V4 08/10] dmaengine: qcom_hidma: add a common API to setup the interrupt Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` [PATCH V4 09/10] dmaengine: qcom_hidma: protect common data structures Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` [PATCH V4 02/10] Documentation: DT: qcom_hidma: correct spelling mistakes Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` [PATCH V4 06/10] dmaengine: qcom_hidma: make error and success path common Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` [PATCH V4 07/10] dmaengine: qcom_hidma: bring out interrupt cause Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
2016-09-29 2:12 ` [PATCH V4 10/10] dmaengine: qcom_hidma: add MSI support for interrupts Sinan Kaya
2016-09-29 2:12 ` Sinan Kaya
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