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From: Niklas Cassel <niklas.cassel@axis.com>
To: Niklas Cassel <niklass@axis.com>,
	Jesper Nilsson <jespern@axis.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: lorenzo.pieralisi@arm.com, linux-arm-kernel@axis.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v6 17/18] bindings: PCI: artpec: Add support for the ARTPEC-7 SoC
Date: Wed, 20 Dec 2017 00:29:38 +0100	[thread overview]
Message-ID: <20171219232940.659-18-niklas.cassel@axis.com> (raw)
In-Reply-To: <20171219232940.659-1-niklas.cassel@axis.com>

Add support for the ARTPEC-7 SoC in the artpec6 driver.
The ARTPEC-6 SoC and the ARTPEC-7 SoC are very similar.
Unfortunately, some fields in the PCIECFG and PCIESTAT
register have changed.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
index 33eef7ae5a23..979dc7b6cfe8 100644
--- a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
@@ -6,6 +6,8 @@ and thus inherits all the common properties defined in designware-pcie.txt.
 Required properties:
 - compatible: "axis,artpec6-pcie", "snps,dw-pcie" for ARTPEC-6 in RC mode;
 	      "axis,artpec6-pcie-ep", "snps,dw-pcie" for ARTPEC-6 in EP mode;
+	      "axis,artpec7-pcie", "snps,dw-pcie" for ARTPEC-7 in RC mode;
+	      "axis,artpec7-pcie-ep", "snps,dw-pcie" for ARTPEC-7 in EP mode;
 - reg: base addresses and lengths of the PCIe controller (DBI),
 	the PHY controller, and configuration address space.
 - reg-names: Must include the following entries:
-- 
2.14.2

  parent reply	other threads:[~2017-12-19 23:31 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-19 23:29 [PATCH v6 00/18] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-12-19 23:29 ` Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 01/18] PCI: dwc: Use the DMA-API to get the MSI address Niklas Cassel
2017-12-20 19:10   ` Joao Pinto
2017-12-21 16:43     ` Jingoo Han
2017-12-21 16:43       ` Jingoo Han
2020-09-23 23:18   ` Rob Herring
2017-12-19 23:29 ` [PATCH v6 02/18] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Niklas Cassel
2017-12-20 19:17   ` Joao Pinto
2017-12-21 16:44     ` Jingoo Han
2017-12-21 16:44       ` Jingoo Han
2017-12-19 23:29 ` [PATCH v6 03/18] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-12-20 19:18   ` Joao Pinto
2017-12-21 16:45     ` Jingoo Han
2017-12-21 16:45       ` Jingoo Han
2017-12-19 23:29 ` [PATCH v6 04/18] PCI: designware-ep: Pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-12-20 19:30   ` Joao Pinto
2017-12-21 16:46     ` Jingoo Han
2017-12-21 16:46       ` Jingoo Han
2017-12-19 23:29 ` [PATCH v6 05/18] PCI: designware-ep: Remove static keyword from dw_pcie_ep_reset_bar() Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 06/18] PCI: designware-ep: Add generic function for raising MSI irq Niklas Cassel
2017-12-20 19:32   ` Joao Pinto
2017-12-21 16:47     ` Jingoo Han
2017-12-21 16:47       ` Jingoo Han
2017-12-26 12:50   ` Kishon Vijay Abraham I
2017-12-27 22:29     ` Niklas Cassel
2017-12-28  8:06       ` Kishon Vijay Abraham I
2017-12-28 14:39         ` Kishon Vijay Abraham I
2017-12-28 22:43           ` Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 07/18] PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 08/18] PCI: dwc: dra7xx: Assign pp->ops in dra7xx_add_pcie_port() rather than in probe Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 09/18] PCI: dwc: dra7xx: Help compiler to remove unused code Niklas Cassel
2017-12-20  5:58   ` Kishon Vijay Abraham I
2017-12-20  5:58     ` Kishon Vijay Abraham I
2017-12-19 23:29 ` [PATCH v6 10/18] PCI: dwc: artpec6: Remove unused defines Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 11/18] PCI: dwc: artpec6: Use BIT and GENMASK macros Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 12/18] PCI: dwc: artpec6: Split artpec6_pcie_establish_link() into smaller functions Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 13/18] bindings: PCI: artpec: Add support for endpoint mode Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 14/18] PCI: dwc: artpec6: " Niklas Cassel
2017-12-19 23:29 ` [PATCH v6 15/18] PCI: dwc: Make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-12-20  5:52   ` Kishon Vijay Abraham I
2017-12-20  5:52     ` Kishon Vijay Abraham I
2017-12-19 23:29 ` [PATCH v6 16/18] PCI: dwc: artpec6: Deassert the core before waiting for PHY Niklas Cassel
2017-12-19 23:29 ` Niklas Cassel [this message]
2017-12-19 23:29 ` [PATCH v6 18/18] PCI: dwc: artpec6: Add support for the ARTPEC-7 SoC Niklas Cassel
2017-12-20 17:34 ` [PATCH v6 00/18] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Lorenzo Pieralisi
2017-12-20 19:47   ` Joao Pinto
2017-12-20 19:47     ` Joao Pinto
2017-12-20 23:22     ` Niklas Cassel
2017-12-21  9:23       ` Joao Pinto
2017-12-21  9:23         ` Joao Pinto
     [not found] ` <20171219232940.659-1-niklas.cassel-VrBV9hrLPhE@public.gmane.org>
2017-12-21 10:02   ` Lorenzo Pieralisi
2017-12-21 10:02     ` Lorenzo Pieralisi

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