From: hch@infradead.org (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 4/5] RISC-V: Change variable type for 32-bit compatible
Date: Wed, 20 Jun 2018 23:41:35 -0700 [thread overview]
Message-ID: <20180621064135.GD19319@infradead.org> (raw)
In-Reply-To: <3f86f9eb853380686a86a8abe6bda0dd3720ee10.1529506497.git.zong@andestech.com>
> - s64 offset = (void *)v - (void *)location;
> + uintptr_t offset = (void *)v - (void *)location;
s64 is signed, uintptr is not, so this might change behavior and needs
an explanation.
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Zong Li <zong@andestech.com>
Cc: palmer@sifive.com, aou@eecs.berkeley.edu,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
greentime@adnestech.com
Subject: Re: [PATCH 4/5] RISC-V: Change variable type for 32-bit compatible
Date: Wed, 20 Jun 2018 23:41:35 -0700 [thread overview]
Message-ID: <20180621064135.GD19319@infradead.org> (raw)
In-Reply-To: <3f86f9eb853380686a86a8abe6bda0dd3720ee10.1529506497.git.zong@andestech.com>
> - s64 offset = (void *)v - (void *)location;
> + uintptr_t offset = (void *)v - (void *)location;
s64 is signed, uintptr is not, so this might change behavior and needs
an explanation.
next prev parent reply other threads:[~2018-06-21 6:41 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-21 1:41 [PATCH 0/5] Building for 32-bit RISC-V kernel Zong Li
2018-06-21 1:41 ` Zong Li
2018-06-21 1:41 ` [PATCH 1/5] RISC-V: Add conditional macro for zone of DMA32 Zong Li
2018-06-21 1:41 ` Zong Li
2018-06-21 6:40 ` Christoph Hellwig
2018-06-21 6:40 ` Christoph Hellwig
2018-06-21 7:06 ` Zong Li
2018-06-21 7:06 ` Zong Li
2018-06-21 1:41 ` [PATCH] RISC-V: Add conditional marco for boot_sec_cpu Zong Li
2018-06-21 1:41 ` Zong Li
2018-06-21 1:41 ` [PATCH 2/5] RISC-V: Select GENERIC_UCMPDI2 on RV32I Zong Li
2018-06-21 1:41 ` Zong Li
2018-06-21 1:41 ` [PATCH 3/5] RISC-V: Add definiion of extract symbol's index and type for 32-bit Zong Li
2018-06-21 1:41 ` Zong Li
2018-06-21 1:41 ` [PATCH 4/5] RISC-V: Change variable type for 32-bit compatible Zong Li
2018-06-21 1:41 ` Zong Li
2018-06-21 6:41 ` Christoph Hellwig [this message]
2018-06-21 6:41 ` Christoph Hellwig
2018-06-21 7:12 ` Zong Li
2018-06-21 7:12 ` Zong Li
2018-06-21 15:19 ` Zong Li
2018-06-21 15:19 ` Zong Li
2018-06-21 1:41 ` [PATCH 5/5] RISC-V: Use fixed width integer types " Zong Li
2018-06-21 1:41 ` Zong Li
2018-06-21 6:43 ` Christoph Hellwig
2018-06-21 6:43 ` Christoph Hellwig
2018-06-21 10:13 ` Zong Li
2018-06-21 10:13 ` Zong Li
2018-06-21 10:21 ` Andreas Schwab
2018-06-21 10:21 ` Andreas Schwab
2018-06-21 14:53 ` Christoph Hellwig
2018-06-21 14:53 ` Christoph Hellwig
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