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From: zong@andestech.com (Zong Li)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 0/5] Building for 32-bit RISC-V kernel
Date: Thu, 21 Jun 2018 09:41:40 +0800	[thread overview]
Message-ID: <cover.1529506497.git.zong@andestech.com> (raw)

These patches are for building 32-bit RISC-V kernel.
 - Fix the compile errors and warnings on RV32I.
 - Fix some incompatible problem on RV32I.
 - Add format.h for compatible of print format.


Zong Li (5):
  RISC-V: Add conditional macro for zone of DMA32
  RISC-V: Select GENERIC_UCMPDI2 on RV32I
  RISC-V: Add definiion of extract symbol's index and type for 32-bit
  RISC-V: Change variable type for 32-bit compatible
  RISC-V: Use fixed width integer types for 32-bit compatible

 arch/riscv/Kconfig                |  1 +
 arch/riscv/include/asm/format.h   | 20 ++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h |  9 +++++++--
 arch/riscv/kernel/module.c        | 35 ++++++++++++++++++-----------------
 arch/riscv/mm/init.c              |  3 +++
 5 files changed, 49 insertions(+), 19 deletions(-)
 create mode 100644 arch/riscv/include/asm/format.h

-- 
2.16.1

WARNING: multiple messages have this Message-ID (diff)
From: Zong Li <zong@andestech.com>
To: <palmer@sifive.com>, <aou@eecs.berkeley.edu>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: Zong Li <zong@andestech.com>, <greentime@adnestech.com>
Subject: [PATCH 0/5] Building for 32-bit RISC-V kernel
Date: Thu, 21 Jun 2018 09:41:40 +0800	[thread overview]
Message-ID: <cover.1529506497.git.zong@andestech.com> (raw)

These patches are for building 32-bit RISC-V kernel.
 - Fix the compile errors and warnings on RV32I.
 - Fix some incompatible problem on RV32I.
 - Add format.h for compatible of print format.


Zong Li (5):
  RISC-V: Add conditional macro for zone of DMA32
  RISC-V: Select GENERIC_UCMPDI2 on RV32I
  RISC-V: Add definiion of extract symbol's index and type for 32-bit
  RISC-V: Change variable type for 32-bit compatible
  RISC-V: Use fixed width integer types for 32-bit compatible

 arch/riscv/Kconfig                |  1 +
 arch/riscv/include/asm/format.h   | 20 ++++++++++++++++++++
 arch/riscv/include/uapi/asm/elf.h |  9 +++++++--
 arch/riscv/kernel/module.c        | 35 ++++++++++++++++++-----------------
 arch/riscv/mm/init.c              |  3 +++
 5 files changed, 49 insertions(+), 19 deletions(-)
 create mode 100644 arch/riscv/include/asm/format.h

-- 
2.16.1


             reply	other threads:[~2018-06-21  1:41 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-21  1:41 Zong Li [this message]
2018-06-21  1:41 ` [PATCH 0/5] Building for 32-bit RISC-V kernel Zong Li
2018-06-21  1:41 ` [PATCH 1/5] RISC-V: Add conditional macro for zone of DMA32 Zong Li
2018-06-21  1:41   ` Zong Li
2018-06-21  6:40   ` Christoph Hellwig
2018-06-21  6:40     ` Christoph Hellwig
2018-06-21  7:06     ` Zong Li
2018-06-21  7:06       ` Zong Li
2018-06-21  1:41 ` [PATCH] RISC-V: Add conditional marco for boot_sec_cpu Zong Li
2018-06-21  1:41   ` Zong Li
2018-06-21  1:41 ` [PATCH 2/5] RISC-V: Select GENERIC_UCMPDI2 on RV32I Zong Li
2018-06-21  1:41   ` Zong Li
2018-06-21  1:41 ` [PATCH 3/5] RISC-V: Add definiion of extract symbol's index and type for 32-bit Zong Li
2018-06-21  1:41   ` Zong Li
2018-06-21  1:41 ` [PATCH 4/5] RISC-V: Change variable type for 32-bit compatible Zong Li
2018-06-21  1:41   ` Zong Li
2018-06-21  6:41   ` Christoph Hellwig
2018-06-21  6:41     ` Christoph Hellwig
2018-06-21  7:12     ` Zong Li
2018-06-21  7:12       ` Zong Li
2018-06-21 15:19       ` Zong Li
2018-06-21 15:19         ` Zong Li
2018-06-21  1:41 ` [PATCH 5/5] RISC-V: Use fixed width integer types " Zong Li
2018-06-21  1:41   ` Zong Li
2018-06-21  6:43   ` Christoph Hellwig
2018-06-21  6:43     ` Christoph Hellwig
2018-06-21 10:13     ` Zong Li
2018-06-21 10:13       ` Zong Li
2018-06-21 10:21     ` Andreas Schwab
2018-06-21 10:21       ` Andreas Schwab
2018-06-21 14:53       ` Christoph Hellwig
2018-06-21 14:53         ` Christoph Hellwig

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