From: Rob Herring <robh@kernel.org>
To: Andrea Merello <andrea.merello@gmail.com>
Cc: vkoul@kernel.org, dan.j.williams@intel.com,
michal.simek@xilinx.com, appana.durga.rao@xilinx.com,
dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, devicetree@vger.kernel.org,
radhey.shyam.pandey@xilinx.com
Subject: [v5,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
Date: Mon, 10 Sep 2018 13:19:13 -0500 [thread overview]
Message-ID: <20180910181913.GA13764@bogus> (raw)
On Fri, 7 Sep 2018 08:24:58 +0200, Andrea Merello wrote:
> The width of the "length register" cannot be autodetected, and it is now
> specified with a DT property. Add documentation for it.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree@vger.kernel.org
> Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
> Changes in v2:
> - change property name
> - property is now optional
> - cc DT maintainer
> Changes in v3:
> - reword
> - cc DT maintainerS and ML
> Changes in v4:
> - specify the unit, the valid range and the default value
> Changes in v5:
> - commit message trivial fix
> - fix spaces before tab
> ---
> Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
Date: Mon, 10 Sep 2018 13:19:13 -0500 [thread overview]
Message-ID: <20180910181913.GA13764@bogus> (raw)
In-Reply-To: <20180907062502.8241-3-andrea.merello@gmail.com>
On Fri, 7 Sep 2018 08:24:58 +0200, Andrea Merello wrote:
> The width of the "length register" cannot be autodetected, and it is now
> specified with a DT property. Add documentation for it.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree at vger.kernel.org
> Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
> Changes in v2:
> - change property name
> - property is now optional
> - cc DT maintainer
> Changes in v3:
> - reword
> - cc DT maintainerS and ML
> Changes in v4:
> - specify the unit, the valid range and the default value
> Changes in v5:
> - commit message trivial fix
> - fix spaces before tab
> ---
> Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
Cc: vkoul@kernel.org, dan.j.williams@intel.com,
michal.simek@xilinx.com, appana.durga.rao@xilinx.com,
dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, devicetree@vger.kernel.org,
radhey.shyam.pandey@xilinx.com,
Andrea Merello <andrea.merello@gmail.com>
Subject: Re: [PATCH v5 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
Date: Mon, 10 Sep 2018 13:19:13 -0500 [thread overview]
Message-ID: <20180910181913.GA13764@bogus> (raw)
In-Reply-To: <20180907062502.8241-3-andrea.merello@gmail.com>
On Fri, 7 Sep 2018 08:24:58 +0200, Andrea Merello wrote:
> The width of the "length register" cannot be autodetected, and it is now
> specified with a DT property. Add documentation for it.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree@vger.kernel.org
> Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
> Changes in v2:
> - change property name
> - property is now optional
> - cc DT maintainer
> Changes in v3:
> - reword
> - cc DT maintainerS and ML
> Changes in v4:
> - specify the unit, the valid range and the default value
> Changes in v5:
> - commit message trivial fix
> - fix spaces before tab
> ---
> Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Andrea Merello <andrea.merello@gmail.com>
Cc: vkoul@kernel.org, dan.j.williams@intel.com,
michal.simek@xilinx.com, appana.durga.rao@xilinx.com,
dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, devicetree@vger.kernel.org,
radhey.shyam.pandey@xilinx.com,
Andrea Merello <andrea.merello@gmail.com>
Subject: Re: [PATCH v5 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property
Date: Mon, 10 Sep 2018 13:19:13 -0500 [thread overview]
Message-ID: <20180910181913.GA13764@bogus> (raw)
In-Reply-To: <20180907062502.8241-3-andrea.merello@gmail.com>
On Fri, 7 Sep 2018 08:24:58 +0200, Andrea Merello wrote:
> The width of the "length register" cannot be autodetected, and it is now
> specified with a DT property. Add documentation for it.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree@vger.kernel.org
> Cc: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
> Changes in v2:
> - change property name
> - property is now optional
> - cc DT maintainer
> Changes in v3:
> - reword
> - cc DT maintainerS and ML
> Changes in v4:
> - specify the unit, the valid range and the default value
> Changes in v5:
> - commit message trivial fix
> - fix spaces before tab
> ---
> Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
next reply other threads:[~2018-09-10 18:19 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-10 18:19 Rob Herring [this message]
2018-09-10 18:19 ` [PATCH v5 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Rob Herring
2018-09-10 18:19 ` Rob Herring
2018-09-10 18:19 ` Rob Herring
-- strict thread matches above, loose matches on Subject: below --
2018-10-08 6:46 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-10-08 6:46 ` [PATCH v5 4/7] " Andrea Merello
2018-10-08 6:46 ` Andrea Merello
2018-10-02 14:58 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Vinod Koul
2018-10-02 14:58 ` [PATCH v5 2/7] " Vinod
2018-10-02 14:58 ` Vinod
2018-10-02 14:56 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Vinod Koul
2018-10-02 14:56 ` [PATCH v5 4/7] " Vinod
2018-10-02 14:56 ` Vinod
2018-09-28 7:11 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Andrea Merello
2018-09-28 7:11 ` [PATCH v5 2/7] " Andrea Merello
2018-09-28 7:11 ` Andrea Merello
2018-09-28 6:53 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-09-28 6:53 ` [PATCH v5 4/7] " Andrea Merello
2018-09-28 6:53 ` Andrea Merello
2018-09-18 16:25 [v5,4/7] " Vinod Koul
2018-09-18 16:25 ` [PATCH v5 4/7] " Vinod
2018-09-18 16:25 ` Vinod
2018-09-18 16:21 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Vinod Koul
2018-09-18 16:21 ` [PATCH v5 2/7] " Vinod
2018-09-18 16:21 ` Vinod
2018-09-07 6:25 [v5,7/7] dmaengine: xilinx_dma: Drop SG support for VDMA IP Andrea Merello
2018-09-07 6:25 ` [PATCH v5 7/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:25 [v5,6/7] dt-bindings: dmaengine: xilinx_dma: drop has-sg property Andrea Merello
2018-09-07 6:25 ` [PATCH v5 6/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:25 [v5,5/7] dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather Andrea Merello
2018-09-07 6:25 ` [PATCH v5 5/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:24 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-09-07 6:24 ` [PATCH v5 4/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
2018-09-07 6:24 [v5,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Andrea Merello
2018-09-07 6:24 ` [PATCH v5 3/7] " Andrea Merello
2018-09-07 6:24 ` [PATCH v5 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx, sg-length-width property Andrea Merello
2018-09-07 6:24 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Andrea Merello
2018-09-07 6:24 ` [PATCH v5 2/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
2018-09-07 6:24 [v5,1/7] dmaengine: xilinx_dma: commonize DMA copy size calculation Andrea Merello
2018-09-07 6:24 ` [PATCH v5 1/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
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