From: Vinod Koul <vkoul@kernel.org>
To: Andrea Merello <andrea.merello@gmail.com>
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
devicetree <devicetree@vger.kernel.org>,
Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Subject: [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors
Date: Tue, 2 Oct 2018 20:28:20 +0530 [thread overview]
Message-ID: <20181002145820.GH19792@vkoul-mobl> (raw)
On 28-09-18, 09:11, Andrea Merello wrote:
> On Tue, Sep 18, 2018 at 6:21 PM Vinod <vkoul@kernel.org> wrote:
> > > @@ -1804,7 +1817,7 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_slave_sg(
> > > * Calculate the maximum number of bytes to transfer,
> > > * making sure it is less than the hw limit
> > > */
> > > - copy = xilinx_dma_calc_copysize(sg_dma_len(sg),
> > > + copy = xilinx_dma_calc_copysize(chan, sg_dma_len(sg),
> >
> > why not keep chan in patch 1 and add only handling in patch 2, seems
> > less churn to me..
>
> Indeed this was something I was unsure about.. I ended up in feeling
> better not to add introduce a function that takes an unused (yet)
> argument, but I can change this of course :)
IMO It is fine to add a user in subsequent patch in a series. Not fine to
add something and not use in "that" series :)
WARNING: multiple messages have this Message-ID (diff)
From: vkoul@kernel.org (Vinod)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors
Date: Tue, 2 Oct 2018 20:28:20 +0530 [thread overview]
Message-ID: <20181002145820.GH19792@vkoul-mobl> (raw)
In-Reply-To: <CAN8YU5PWB0sRskcirCcYnY5vG5A_W6pcOMpgyOD3faWfMeu5Rg@mail.gmail.com>
On 28-09-18, 09:11, Andrea Merello wrote:
> On Tue, Sep 18, 2018 at 6:21 PM Vinod <vkoul@kernel.org> wrote:
> > > @@ -1804,7 +1817,7 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_slave_sg(
> > > * Calculate the maximum number of bytes to transfer,
> > > * making sure it is less than the hw limit
> > > */
> > > - copy = xilinx_dma_calc_copysize(sg_dma_len(sg),
> > > + copy = xilinx_dma_calc_copysize(chan, sg_dma_len(sg),
> >
> > why not keep chan in patch 1 and add only handling in patch 2, seems
> > less churn to me..
>
> Indeed this was something I was unsure about.. I ended up in feeling
> better not to add introduce a function that takes an unused (yet)
> argument, but I can change this of course :)
IMO It is fine to add a user in subsequent patch in a series. Not fine to
add something and not use in "that" series :)
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: Vinod <vkoul@kernel.org>
To: Andrea Merello <andrea.merello@gmail.com>
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
devicetree <devicetree@vger.kernel.org>,
Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Subject: Re: [PATCH v5 2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors
Date: Tue, 2 Oct 2018 20:28:20 +0530 [thread overview]
Message-ID: <20181002145820.GH19792@vkoul-mobl> (raw)
In-Reply-To: <CAN8YU5PWB0sRskcirCcYnY5vG5A_W6pcOMpgyOD3faWfMeu5Rg@mail.gmail.com>
On 28-09-18, 09:11, Andrea Merello wrote:
> On Tue, Sep 18, 2018 at 6:21 PM Vinod <vkoul@kernel.org> wrote:
> > > @@ -1804,7 +1817,7 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_slave_sg(
> > > * Calculate the maximum number of bytes to transfer,
> > > * making sure it is less than the hw limit
> > > */
> > > - copy = xilinx_dma_calc_copysize(sg_dma_len(sg),
> > > + copy = xilinx_dma_calc_copysize(chan, sg_dma_len(sg),
> >
> > why not keep chan in patch 1 and add only handling in patch 2, seems
> > less churn to me..
>
> Indeed this was something I was unsure about.. I ended up in feeling
> better not to add introduce a function that takes an unused (yet)
> argument, but I can change this of course :)
IMO It is fine to add a user in subsequent patch in a series. Not fine to
add something and not use in "that" series :)
--
~Vinod
next reply other threads:[~2018-10-02 14:58 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-02 14:58 Vinod Koul [this message]
2018-10-02 14:58 ` [PATCH v5 2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Vinod
2018-10-02 14:58 ` Vinod
-- strict thread matches above, loose matches on Subject: below --
2018-10-08 6:46 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-10-08 6:46 ` [PATCH v5 4/7] " Andrea Merello
2018-10-08 6:46 ` Andrea Merello
2018-10-02 14:56 [v5,4/7] " Vinod Koul
2018-10-02 14:56 ` [PATCH v5 4/7] " Vinod
2018-10-02 14:56 ` Vinod
2018-09-28 7:11 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Andrea Merello
2018-09-28 7:11 ` [PATCH v5 2/7] " Andrea Merello
2018-09-28 7:11 ` Andrea Merello
2018-09-28 6:53 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-09-28 6:53 ` [PATCH v5 4/7] " Andrea Merello
2018-09-28 6:53 ` Andrea Merello
2018-09-18 16:25 [v5,4/7] " Vinod Koul
2018-09-18 16:25 ` [PATCH v5 4/7] " Vinod
2018-09-18 16:25 ` Vinod
2018-09-18 16:21 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Vinod Koul
2018-09-18 16:21 ` [PATCH v5 2/7] " Vinod
2018-09-18 16:21 ` Vinod
2018-09-10 18:19 [v5,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Rob Herring
2018-09-10 18:19 ` [PATCH v5 3/7] " Rob Herring
2018-09-10 18:19 ` Rob Herring
2018-09-10 18:19 ` Rob Herring
2018-09-07 6:25 [v5,7/7] dmaengine: xilinx_dma: Drop SG support for VDMA IP Andrea Merello
2018-09-07 6:25 ` [PATCH v5 7/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:25 [v5,6/7] dt-bindings: dmaengine: xilinx_dma: drop has-sg property Andrea Merello
2018-09-07 6:25 ` [PATCH v5 6/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:25 [v5,5/7] dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather Andrea Merello
2018-09-07 6:25 ` [PATCH v5 5/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:24 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-09-07 6:24 ` [PATCH v5 4/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
2018-09-07 6:24 [v5,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Andrea Merello
2018-09-07 6:24 ` [PATCH v5 3/7] " Andrea Merello
2018-09-07 6:24 ` [PATCH v5 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx, sg-length-width property Andrea Merello
2018-09-07 6:24 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Andrea Merello
2018-09-07 6:24 ` [PATCH v5 2/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
2018-09-07 6:24 [v5,1/7] dmaengine: xilinx_dma: commonize DMA copy size calculation Andrea Merello
2018-09-07 6:24 ` [PATCH v5 1/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
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