From: Vinod Koul <vkoul@kernel.org>
To: Andrea Merello <andrea.merello@gmail.com>
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
devicetree <devicetree@vger.kernel.org>,
Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Subject: [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length
Date: Tue, 2 Oct 2018 20:26:47 +0530 [thread overview]
Message-ID: <20181002145647.GG19792@vkoul-mobl> (raw)
On 28-09-18, 08:53, Andrea Merello wrote:
> On Tue, Sep 18, 2018 at 6:25 PM Vinod <vkoul@kernel.org> wrote:
> > > @@ -964,7 +968,7 @@ static int xilinx_dma_calc_copysize(struct xilinx_dma_chan *chan,
> > > int size, int done)
> > > {
> > > size_t copy = min_t(size_t, size - done,
> > > - XILINX_DMA_MAX_TRANS_LEN);
> > > + chan->xdev->max_buffer_len);
> >
> > hmm why not add max_buffer_len in patch 1 again, and then use default
> > len as XILINX_DMA_MAX_TRANS_LEN and add multiple lengths here :)
>
> Sorry, I'm not getting your point. Could you please elaborate the "add
> multiple lengths here" thing ?
IIRC (sorry been travelling and vacation), add
chan->xdev->max_buffer_len in patch 1 and initialize it to
XILINX_DMA_MAX_TRANS_LEN. Then in subsequent patches update the length.
WARNING: multiple messages have this Message-ID (diff)
From: vkoul@kernel.org (Vinod)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 4/7] dmaengine: xilinx_dma: program hardware supported buffer length
Date: Tue, 2 Oct 2018 20:26:47 +0530 [thread overview]
Message-ID: <20181002145647.GG19792@vkoul-mobl> (raw)
In-Reply-To: <CAN8YU5OySuzAyQ=Buad=Jidhes28koV52Gi-QJ-qOiG5TFBO=Q@mail.gmail.com>
On 28-09-18, 08:53, Andrea Merello wrote:
> On Tue, Sep 18, 2018 at 6:25 PM Vinod <vkoul@kernel.org> wrote:
> > > @@ -964,7 +968,7 @@ static int xilinx_dma_calc_copysize(struct xilinx_dma_chan *chan,
> > > int size, int done)
> > > {
> > > size_t copy = min_t(size_t, size - done,
> > > - XILINX_DMA_MAX_TRANS_LEN);
> > > + chan->xdev->max_buffer_len);
> >
> > hmm why not add max_buffer_len in patch 1 again, and then use default
> > len as XILINX_DMA_MAX_TRANS_LEN and add multiple lengths here :)
>
> Sorry, I'm not getting your point. Could you please elaborate the "add
> multiple lengths here" thing ?
IIRC (sorry been travelling and vacation), add
chan->xdev->max_buffer_len in patch 1 and initialize it to
XILINX_DMA_MAX_TRANS_LEN. Then in subsequent patches update the length.
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: Vinod <vkoul@kernel.org>
To: Andrea Merello <andrea.merello@gmail.com>
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
devicetree <devicetree@vger.kernel.org>,
Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Subject: Re: [PATCH v5 4/7] dmaengine: xilinx_dma: program hardware supported buffer length
Date: Tue, 2 Oct 2018 20:26:47 +0530 [thread overview]
Message-ID: <20181002145647.GG19792@vkoul-mobl> (raw)
In-Reply-To: <CAN8YU5OySuzAyQ=Buad=Jidhes28koV52Gi-QJ-qOiG5TFBO=Q@mail.gmail.com>
On 28-09-18, 08:53, Andrea Merello wrote:
> On Tue, Sep 18, 2018 at 6:25 PM Vinod <vkoul@kernel.org> wrote:
> > > @@ -964,7 +968,7 @@ static int xilinx_dma_calc_copysize(struct xilinx_dma_chan *chan,
> > > int size, int done)
> > > {
> > > size_t copy = min_t(size_t, size - done,
> > > - XILINX_DMA_MAX_TRANS_LEN);
> > > + chan->xdev->max_buffer_len);
> >
> > hmm why not add max_buffer_len in patch 1 again, and then use default
> > len as XILINX_DMA_MAX_TRANS_LEN and add multiple lengths here :)
>
> Sorry, I'm not getting your point. Could you please elaborate the "add
> multiple lengths here" thing ?
IIRC (sorry been travelling and vacation), add
chan->xdev->max_buffer_len in patch 1 and initialize it to
XILINX_DMA_MAX_TRANS_LEN. Then in subsequent patches update the length.
--
~Vinod
next reply other threads:[~2018-10-02 14:56 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-02 14:56 Vinod Koul [this message]
2018-10-02 14:56 ` [PATCH v5 4/7] dmaengine: xilinx_dma: program hardware supported buffer length Vinod
2018-10-02 14:56 ` Vinod
-- strict thread matches above, loose matches on Subject: below --
2018-10-08 6:46 [v5,4/7] " Andrea Merello
2018-10-08 6:46 ` [PATCH v5 4/7] " Andrea Merello
2018-10-08 6:46 ` Andrea Merello
2018-10-02 14:58 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Vinod Koul
2018-10-02 14:58 ` [PATCH v5 2/7] " Vinod
2018-10-02 14:58 ` Vinod
2018-09-28 7:11 [v5,2/7] " Andrea Merello
2018-09-28 7:11 ` [PATCH v5 2/7] " Andrea Merello
2018-09-28 7:11 ` Andrea Merello
2018-09-28 6:53 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-09-28 6:53 ` [PATCH v5 4/7] " Andrea Merello
2018-09-28 6:53 ` Andrea Merello
2018-09-18 16:25 [v5,4/7] " Vinod Koul
2018-09-18 16:25 ` [PATCH v5 4/7] " Vinod
2018-09-18 16:25 ` Vinod
2018-09-18 16:21 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Vinod Koul
2018-09-18 16:21 ` [PATCH v5 2/7] " Vinod
2018-09-18 16:21 ` Vinod
2018-09-10 18:19 [v5,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Rob Herring
2018-09-10 18:19 ` [PATCH v5 3/7] " Rob Herring
2018-09-10 18:19 ` Rob Herring
2018-09-10 18:19 ` Rob Herring
2018-09-07 6:25 [v5,7/7] dmaengine: xilinx_dma: Drop SG support for VDMA IP Andrea Merello
2018-09-07 6:25 ` [PATCH v5 7/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:25 [v5,6/7] dt-bindings: dmaengine: xilinx_dma: drop has-sg property Andrea Merello
2018-09-07 6:25 ` [PATCH v5 6/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:25 [v5,5/7] dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather Andrea Merello
2018-09-07 6:25 ` [PATCH v5 5/7] " Andrea Merello
2018-09-07 6:25 ` Andrea Merello
2018-09-07 6:24 [v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-09-07 6:24 ` [PATCH v5 4/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
2018-09-07 6:24 [v5,3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Andrea Merello
2018-09-07 6:24 ` [PATCH v5 3/7] " Andrea Merello
2018-09-07 6:24 ` [PATCH v5 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx, sg-length-width property Andrea Merello
2018-09-07 6:24 [v5,2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors Andrea Merello
2018-09-07 6:24 ` [PATCH v5 2/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
2018-09-07 6:24 [v5,1/7] dmaengine: xilinx_dma: commonize DMA copy size calculation Andrea Merello
2018-09-07 6:24 ` [PATCH v5 1/7] " Andrea Merello
2018-09-07 6:24 ` Andrea Merello
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