From: Ram Pai <linuxram@us.ibm.com>
To: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: maddy <maddy@linux.vnet.ibm.com>,
Michael Anderson <andmike@linux.ibm.com>,
Claudio Carvalho <cclaudio@linux.ibm.com>,
kvm-ppc@vger.kernel.org, Bharata B Rao <bharata@linux.ibm.com>,
linuxppc-dev@ozlabs.org, Ryan Grimm <grimm@linux.ibm.com>,
Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>,
Thiago Bauermann <bauerman@linux.ibm.com>,
Anshuman Khandual <khandual@linux.vnet.ibm.com>
Subject: Re: Re: [PATCH v4 6/8] KVM: PPC: Ultravisor: Restrict LDBAR access
Date: Mon, 01 Jul 2019 06:46:42 +0000 [thread overview]
Message-ID: <20190701064642.GA5009@ram.ibm.com> (raw)
In-Reply-To: <abe23edf-e593-ca98-8047-39ecb6cf16b5@ozlabs.ru>
On Mon, Jul 01, 2019 at 04:30:55PM +1000, Alexey Kardashevskiy wrote:
>
>
> On 01/07/2019 16:17, maddy wrote:
> >
> > On 01/07/19 11:24 AM, Alexey Kardashevskiy wrote:
> >>
> >> On 29/06/2019 06:08, Claudio Carvalho wrote:
> >>> When the ultravisor firmware is available, it takes control over the
> >>> LDBAR register. In this case, thread-imc updates and save/restore
> >>> operations on the LDBAR register are handled by ultravisor.
> >> What does LDBAR do? "Power ISA™ Version 3.0 B" or "User’s Manual POWER9
> >> Processor" do not tell.
> > LDBAR is a per-thread SPR used by thread-imc pmu to dump the counter
> > data into memory.
> > LDBAR contains memory address along with few other configuration bits
> > (it is populated
> > by the thread-imc pmu driver). It is populated and enabled only when any
> > of the thread
> > imc pmu events are monitored.
>
>
> I was actually looking for a spec for this register, what is the
> document name?
Its not a architected register. Its documented in the Power9
workbook.
RP
WARNING: multiple messages have this Message-ID (diff)
From: Ram Pai <linuxram@us.ibm.com>
To: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: maddy <maddy@linux.vnet.ibm.com>,
Michael Anderson <andmike@linux.ibm.com>,
Claudio Carvalho <cclaudio@linux.ibm.com>,
kvm-ppc@vger.kernel.org, Bharata B Rao <bharata@linux.ibm.com>,
linuxppc-dev@ozlabs.org, Ryan Grimm <grimm@linux.ibm.com>,
Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>,
Thiago Bauermann <bauerman@linux.ibm.com>,
Anshuman Khandual <khandual@linux.vnet.ibm.com>
Subject: Re: Re: [PATCH v4 6/8] KVM: PPC: Ultravisor: Restrict LDBAR access
Date: Sun, 30 Jun 2019 23:46:42 -0700 [thread overview]
Message-ID: <20190701064642.GA5009@ram.ibm.com> (raw)
In-Reply-To: <abe23edf-e593-ca98-8047-39ecb6cf16b5@ozlabs.ru>
On Mon, Jul 01, 2019 at 04:30:55PM +1000, Alexey Kardashevskiy wrote:
>
>
> On 01/07/2019 16:17, maddy wrote:
> >
> > On 01/07/19 11:24 AM, Alexey Kardashevskiy wrote:
> >>
> >> On 29/06/2019 06:08, Claudio Carvalho wrote:
> >>> When the ultravisor firmware is available, it takes control over the
> >>> LDBAR register. In this case, thread-imc updates and save/restore
> >>> operations on the LDBAR register are handled by ultravisor.
> >> What does LDBAR do? "Power ISA™ Version 3.0 B" or "User’s Manual POWER9
> >> Processor" do not tell.
> > LDBAR is a per-thread SPR used by thread-imc pmu to dump the counter
> > data into memory.
> > LDBAR contains memory address along with few other configuration bits
> > (it is populated
> > by the thread-imc pmu driver). It is populated and enabled only when any
> > of the thread
> > imc pmu events are monitored.
>
>
> I was actually looking for a spec for this register, what is the
> document name?
Its not a architected register. Its documented in the Power9
workbook.
RP
next prev parent reply other threads:[~2019-07-01 6:46 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-28 20:08 [PATCH v4 0/8] kvmppc: Paravirtualize KVM to support ultravisor Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-06-28 20:08 ` [PATCH v4 1/8] KVM: PPC: Ultravisor: Introduce the MSR_S bit Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-07-08 17:38 ` janani
2019-07-08 17:38 ` janani
2019-07-11 12:57 ` Michael Ellerman
2019-07-11 12:57 ` Michael Ellerman
2019-07-12 0:59 ` Nicholas Piggin
2019-07-12 0:59 ` Nicholas Piggin
2019-07-12 0:57 ` Nicholas Piggin
2019-07-12 0:57 ` Nicholas Piggin
2019-07-12 6:29 ` Michael Ellerman
2019-07-12 6:29 ` Michael Ellerman
2019-07-12 21:07 ` Claudio Carvalho
2019-07-12 21:07 ` Claudio Carvalho
2019-06-28 20:08 ` [PATCH v4 2/8] powerpc: Introduce FW_FEATURE_ULTRAVISOR Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-07-08 17:40 ` janani
2019-07-08 17:40 ` janani
2019-07-11 12:57 ` Michael Ellerman
2019-07-11 12:57 ` Michael Ellerman
2019-07-12 18:01 ` Claudio Carvalho
2019-07-15 4:10 ` Michael Ellerman
2019-07-15 4:10 ` Michael Ellerman
2019-06-28 20:08 ` [PATCH v4 3/8] KVM: PPC: Ultravisor: Add generic ultravisor call handler Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-07-08 17:55 ` janani
2019-07-08 17:55 ` janani
2019-07-11 12:57 ` Michael Ellerman
2019-07-11 12:57 ` Michael Ellerman
2019-07-13 17:42 ` Claudio Carvalho
2019-07-13 17:42 ` Claudio Carvalho
2019-07-15 4:46 ` Michael Ellerman
2019-07-15 4:46 ` Michael Ellerman
2019-07-12 1:18 ` Nicholas Piggin
2019-07-12 1:18 ` Nicholas Piggin
2019-06-28 20:08 ` [PATCH v4 4/8] KVM: PPC: Ultravisor: Use UV_WRITE_PATE ucall to register a PATE Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-07-08 17:57 ` janani
2019-07-08 17:57 ` janani
2019-07-11 12:57 ` Michael Ellerman
2019-07-11 12:57 ` Michael Ellerman
2019-07-17 14:59 ` Ryan Grimm
2019-07-17 14:59 ` Ryan Grimm
2019-07-18 21:25 ` Claudio Carvalho
2019-07-18 21:25 ` Claudio Carvalho
2019-07-19 2:25 ` Michael Ellerman
2019-07-19 2:25 ` Michael Ellerman
2019-06-28 20:08 ` [PATCH v4 5/8] KVM: PPC: Ultravisor: Restrict flush of the partition tlb cache Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-07-01 5:54 ` Alexey Kardashevskiy
2019-07-01 5:54 ` Alexey Kardashevskiy
2019-07-08 20:05 ` Claudio Carvalho
2019-07-08 20:05 ` Claudio Carvalho
2019-07-08 19:54 ` janani
2019-07-08 19:54 ` janani
2019-07-10 17:09 ` Ram Pai
2019-07-10 17:09 ` Ram Pai
2019-06-28 20:08 ` [PATCH v4 6/8] KVM: PPC: Ultravisor: Restrict LDBAR access Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-07-01 5:54 ` Alexey Kardashevskiy
2019-07-01 5:54 ` Alexey Kardashevskiy
2019-07-01 6:17 ` maddy
2019-07-01 6:29 ` maddy
2019-07-01 6:30 ` Alexey Kardashevskiy
2019-07-01 6:30 ` Alexey Kardashevskiy
2019-07-01 6:46 ` Ram Pai [this message]
2019-07-01 6:46 ` Ram Pai
2019-07-13 17:56 ` Claudio Carvalho
2019-07-13 17:56 ` Claudio Carvalho
2019-07-08 20:22 ` janani
2019-07-08 20:22 ` janani
2019-07-11 12:57 ` Michael Ellerman
2019-07-11 12:57 ` Michael Ellerman
2019-07-15 0:38 ` Claudio Carvalho
2019-07-15 0:38 ` Claudio Carvalho
2019-06-28 20:08 ` [PATCH v4 7/8] KVM: PPC: Ultravisor: Enter a secure guest Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-07-08 20:53 ` janani
2019-07-08 20:53 ` janani
2019-07-08 20:52 ` Claudio Carvalho
2019-07-08 20:52 ` Claudio Carvalho
2019-07-11 12:57 ` Michael Ellerman
2019-07-11 12:57 ` Michael Ellerman
2019-07-18 2:47 ` Sukadev Bhattiprolu
2019-07-18 2:47 ` Sukadev Bhattiprolu
2019-07-22 11:05 ` Michael Ellerman
2019-07-22 11:05 ` Michael Ellerman
2019-07-12 2:03 ` Nicholas Piggin
2019-07-12 2:03 ` Nicholas Piggin
2019-06-28 20:08 ` [PATCH v4 8/8] KVM: PPC: Ultravisor: Check for MSR_S during hv_reset_msr Claudio Carvalho
2019-06-28 20:08 ` Claudio Carvalho
2019-07-08 20:54 ` janani
2019-07-08 20:54 ` janani
2019-07-11 12:57 ` Michael Ellerman
2019-07-11 12:57 ` Michael Ellerman
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