* [PATCH 1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
@ 2019-09-09 11:00 ` Chris Wilson
2019-09-10 10:57 ` Matthew Auld
2019-09-09 11:00 ` [PATCH 2/6] drm/i915/selftests: Tighten the timeout testing for partial mmaps Chris Wilson
` (6 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2019-09-09 11:00 UTC (permalink / raw)
To: intel-gfx
Being a "low-level" test, we opt to bypass the normal bind/unbind hooks
for the lower level insert_entries/clear_range. For ggtt, the
bind/unbind hooks provide the runtime wakeref and so we must also handle
this in exercising the low level hooks.
<4> [538.151672] RPM raw-wakeref not held
<4> [538.151825] WARNING: CPU: 0 PID: 11 at ./drivers/gpu/drm/i915/intel_runtime_pm.h:107 fwtable_read32+0x1be/0x300 [i915]
<4> [538.151830] Modules linked in: i915(+) amdgpu gpu_sched ttm vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic mei_hdcp btusb btrtl btbcm x86_pkg_temp_thermal coretemp btintel crct10dif_pclmul bluetooth crc32_pclmul snd_intel_nhlt snd_hda_codec ecdh_generic ghash_clmulni_intel ecc snd_hwdep snd_hda_core lpc_ich r8169 realtek snd_pcm mei_me mei prime_numbers pinctrl_broxton pinctrl_intel [last unloaded: i915]
<4> [538.151861] CPU: 0 PID: 11 Comm: migration/0 Tainted: G U 5.3.0-rc7-CI-Trybot_4938+ #1
<4> [538.151864] Hardware name: Intel corporation NUC6CAYS/NUC6CAYB, BIOS AYAPLCEL.86A.0056.2018.0926.1100 09/26/2018
<4> [538.151960] RIP: 0010:fwtable_read32+0x1be/0x300 [i915]
<4> [538.151965] Code: e8 e7 f9 5f e0 e9 0b ff ff ff 80 3d d5 8d 26 00 00 0f 85 81 fe ff ff 48 c7 c7 ef 01 bd a0 c6 05 c1 8d 26 00 01 e8 b2 e4 6a e0 <0f> 0b e9 67 fe ff ff 80 3d ad 8d 26 00 00 0f 85 65 fe ff ff 48 c7
<4> [538.151969] RSP: 0018:ffffc9000007be10 EFLAGS: 00010086
<4> [538.151972] RAX: 0000000000000000 RBX: ffff88826be10d50 RCX: 0000000000000002
<4> [538.151975] RDX: 0000000080000002 RSI: 0000000000000000 RDI: 00000000ffffffff
<4> [538.151978] RBP: 0000000000000000 R08: 0000000000000000 R09: 0000000000000000
<4> [538.151981] R10: 0000000000000000 R11: ffffc9000007bcb0 R12: 0000000000101008
<4> [538.151984] R13: 0000000000000000 R14: ffffc9000036f638 R15: 0000000000000002
<4> [538.151987] FS: 0000000000000000(0000) GS:ffff888277a00000(0000) knlGS:0000000000000000
<4> [538.151990] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4> [538.151993] CR2: 00007fd48e7052f8 CR3: 0000000005210000 CR4: 00000000003406f0
<4> [538.151995] Call Trace:
<4> [538.152106] bxt_vtd_ggtt_clear_range__cb+0x38/0x40 [i915]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 31a51ca1ddcb..598c18d10640 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -293,18 +293,20 @@ static int lowlevel_hole(struct drm_i915_private *i915,
mock_vma.node.size = BIT_ULL(size);
mock_vma.node.start = addr;
- wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- vm->insert_entries(vm, &mock_vma, I915_CACHE_NONE, 0);
- intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ with_intel_runtime_pm(&i915->runtime_pm, wakeref)
+ vm->insert_entries(vm, &mock_vma,
+ I915_CACHE_NONE, 0);
}
count = n;
i915_random_reorder(order, count, &prng);
for (n = 0; n < count; n++) {
u64 addr = hole_start + order[n] * BIT_ULL(size);
+ intel_wakeref_t wakeref;
GEM_BUG_ON(addr + BIT_ULL(size) > vm->total);
- vm->clear_range(vm, addr, BIT_ULL(size));
+ with_intel_runtime_pm(&i915->runtime_pm, wakeref)
+ vm->clear_range(vm, addr, BIT_ULL(size));
}
i915_gem_object_unpin_pages(obj);
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel
2019-09-09 11:00 ` [PATCH 1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel Chris Wilson
@ 2019-09-10 10:57 ` Matthew Auld
0 siblings, 0 replies; 17+ messages in thread
From: Matthew Auld @ 2019-09-10 10:57 UTC (permalink / raw)
To: Chris Wilson; +Cc: Intel Graphics Development
On Mon, 9 Sep 2019 at 12:00, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> Being a "low-level" test, we opt to bypass the normal bind/unbind hooks
> for the lower level insert_entries/clear_range. For ggtt, the
> bind/unbind hooks provide the runtime wakeref and so we must also handle
> this in exercising the low level hooks.
>
> <4> [538.151672] RPM raw-wakeref not held
> <4> [538.151825] WARNING: CPU: 0 PID: 11 at ./drivers/gpu/drm/i915/intel_runtime_pm.h:107 fwtable_read32+0x1be/0x300 [i915]
> <4> [538.151830] Modules linked in: i915(+) amdgpu gpu_sched ttm vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic mei_hdcp btusb btrtl btbcm x86_pkg_temp_thermal coretemp btintel crct10dif_pclmul bluetooth crc32_pclmul snd_intel_nhlt snd_hda_codec ecdh_generic ghash_clmulni_intel ecc snd_hwdep snd_hda_core lpc_ich r8169 realtek snd_pcm mei_me mei prime_numbers pinctrl_broxton pinctrl_intel [last unloaded: i915]
> <4> [538.151861] CPU: 0 PID: 11 Comm: migration/0 Tainted: G U 5.3.0-rc7-CI-Trybot_4938+ #1
> <4> [538.151864] Hardware name: Intel corporation NUC6CAYS/NUC6CAYB, BIOS AYAPLCEL.86A.0056.2018.0926.1100 09/26/2018
> <4> [538.151960] RIP: 0010:fwtable_read32+0x1be/0x300 [i915]
> <4> [538.151965] Code: e8 e7 f9 5f e0 e9 0b ff ff ff 80 3d d5 8d 26 00 00 0f 85 81 fe ff ff 48 c7 c7 ef 01 bd a0 c6 05 c1 8d 26 00 01 e8 b2 e4 6a e0 <0f> 0b e9 67 fe ff ff 80 3d ad 8d 26 00 00 0f 85 65 fe ff ff 48 c7
> <4> [538.151969] RSP: 0018:ffffc9000007be10 EFLAGS: 00010086
> <4> [538.151972] RAX: 0000000000000000 RBX: ffff88826be10d50 RCX: 0000000000000002
> <4> [538.151975] RDX: 0000000080000002 RSI: 0000000000000000 RDI: 00000000ffffffff
> <4> [538.151978] RBP: 0000000000000000 R08: 0000000000000000 R09: 0000000000000000
> <4> [538.151981] R10: 0000000000000000 R11: ffffc9000007bcb0 R12: 0000000000101008
> <4> [538.151984] R13: 0000000000000000 R14: ffffc9000036f638 R15: 0000000000000002
> <4> [538.151987] FS: 0000000000000000(0000) GS:ffff888277a00000(0000) knlGS:0000000000000000
> <4> [538.151990] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> <4> [538.151993] CR2: 00007fd48e7052f8 CR3: 0000000005210000 CR4: 00000000003406f0
> <4> [538.151995] Call Trace:
> <4> [538.152106] bxt_vtd_ggtt_clear_range__cb+0x38/0x40 [i915]
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 2/6] drm/i915/selftests: Tighten the timeout testing for partial mmaps
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
2019-09-09 11:00 ` [PATCH 1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel Chris Wilson
@ 2019-09-09 11:00 ` Chris Wilson
2019-09-09 11:00 ` [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume Chris Wilson
` (5 subsequent siblings)
7 siblings, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2019-09-09 11:00 UTC (permalink / raw)
To: intel-gfx
Currently, if there is time remaining before the start of the loop, we
do one full iteration over many possible different chunks within the
object. A full loop may take 50+s (depending on speed of indirect GTT
mmapings) and we try separately with LINEAR, X and Y -- at which point
igt times out. If we check more frequently, we will interrupt the loop
upon our timeout -- it is hard to argue that significantly reduces the
test coverage despite the dramatic contraction in runtime. In practical
terms, the coverage we should prioritise is using different fence
setups, forcing verification of the tile row computations over the
current preference of checking extracting chunks. Though the exhaustive
search is great given an infinite timeout, to improve our current
coverage, we also add a randomised smoketest of partial mmaps.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
.../drm/i915/gem/selftests/i915_gem_mman.c | 253 +++++++++++++++---
1 file changed, 222 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 1d27babff0ce..685726c85991 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -10,6 +10,7 @@
#include "gt/intel_gt_pm.h"
#include "huge_gem_object.h"
#include "i915_selftest.h"
+#include "selftests/i915_random.h"
#include "selftests/igt_flush_test.h"
struct tile {
@@ -75,6 +76,96 @@ static u64 tiled_offset(const struct tile *tile, u64 v)
}
static int check_partial_mapping(struct drm_i915_gem_object *obj,
+ const struct tile *tile,
+ struct rnd_state *prng)
+{
+ const unsigned long npages = obj->base.size / PAGE_SIZE;
+ struct i915_ggtt_view view;
+ struct i915_vma *vma;
+ unsigned long page;
+ u32 __iomem *io;
+ struct page *p;
+ unsigned int n;
+ u64 offset;
+ u32 *cpu;
+ int err;
+
+ err = i915_gem_object_set_tiling(obj, tile->tiling, tile->stride);
+ if (err) {
+ pr_err("Failed to set tiling mode=%u, stride=%u, err=%d\n",
+ tile->tiling, tile->stride, err);
+ return err;
+ }
+
+ GEM_BUG_ON(i915_gem_object_get_tiling(obj) != tile->tiling);
+ GEM_BUG_ON(i915_gem_object_get_stride(obj) != tile->stride);
+
+ i915_gem_object_lock(obj);
+ err = i915_gem_object_set_to_gtt_domain(obj, true);
+ i915_gem_object_unlock(obj);
+ if (err) {
+ pr_err("Failed to flush to GTT write domain; err=%d\n", err);
+ return err;
+ }
+
+ page = i915_prandom_u32_max_state(npages, prng);
+ view = compute_partial_view(obj, page, MIN_CHUNK_PAGES);
+
+ vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE);
+ if (IS_ERR(vma)) {
+ pr_err("Failed to pin partial view: offset=%lu; err=%d\n",
+ page, (int)PTR_ERR(vma));
+ return PTR_ERR(vma);
+ }
+
+ n = page - view.partial.offset;
+ GEM_BUG_ON(n >= view.partial.size);
+
+ io = i915_vma_pin_iomap(vma);
+ i915_vma_unpin(vma);
+ if (IS_ERR(io)) {
+ pr_err("Failed to iomap partial view: offset=%lu; err=%d\n",
+ page, (int)PTR_ERR(io));
+ err = PTR_ERR(io);
+ goto out;
+ }
+
+ iowrite32(page, io + n * PAGE_SIZE / sizeof(*io));
+ i915_vma_unpin_iomap(vma);
+
+ offset = tiled_offset(tile, page << PAGE_SHIFT);
+ if (offset >= obj->base.size)
+ goto out;
+
+ intel_gt_flush_ggtt_writes(&to_i915(obj->base.dev)->gt);
+
+ p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);
+ cpu = kmap(p) + offset_in_page(offset);
+ drm_clflush_virt_range(cpu, sizeof(*cpu));
+ if (*cpu != (u32)page) {
+ pr_err("Partial view for %lu [%u] (offset=%llu, size=%u [%llu, row size %u], fence=%d, tiling=%d, stride=%d) misalignment, expected write to page (%llu + %u [0x%llx]) of 0x%x, found 0x%x\n",
+ page, n,
+ view.partial.offset,
+ view.partial.size,
+ vma->size >> PAGE_SHIFT,
+ tile->tiling ? tile_row_pages(obj) : 0,
+ vma->fence ? vma->fence->id : -1, tile->tiling, tile->stride,
+ offset >> PAGE_SHIFT,
+ (unsigned int)offset_in_page(offset),
+ offset,
+ (u32)page, *cpu);
+ err = -EINVAL;
+ }
+ *cpu = 0;
+ drm_clflush_virt_range(cpu, sizeof(*cpu));
+ kunmap(p);
+
+out:
+ i915_vma_destroy(vma);
+ return err;
+}
+
+static int check_partial_mappings(struct drm_i915_gem_object *obj,
const struct tile *tile,
unsigned long end_time)
{
@@ -84,11 +175,6 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj,
unsigned long page;
int err;
- if (igt_timeout(end_time,
- "%s: timed out before tiling=%d stride=%d\n",
- __func__, tile->tiling, tile->stride))
- return -EINTR;
-
err = i915_gem_object_set_tiling(obj, tile->tiling, tile->stride);
if (err) {
pr_err("Failed to set tiling mode=%u, stride=%u, err=%d\n",
@@ -170,11 +256,42 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj,
return err;
i915_vma_destroy(vma);
+
+ if (igt_timeout(end_time,
+ "%s: timed out after tiling=%d stride=%d\n",
+ __func__, tile->tiling, tile->stride))
+ return -EINTR;
}
return 0;
}
+static unsigned int
+setup_tile_size(struct tile *tile, struct drm_i915_private *i915)
+{
+ if (INTEL_GEN(i915) <= 2) {
+ tile->height = 16;
+ tile->width = 128;
+ tile->size = 11;
+ } else if (tile->tiling == I915_TILING_Y &&
+ HAS_128_BYTE_Y_TILING(i915)) {
+ tile->height = 32;
+ tile->width = 128;
+ tile->size = 12;
+ } else {
+ tile->height = 8;
+ tile->width = 512;
+ tile->size = 12;
+ }
+
+ if (INTEL_GEN(i915) < 4)
+ return 8192 / tile->width;
+ else if (INTEL_GEN(i915) < 7)
+ return 128 * I965_FENCE_MAX_PITCH_VAL / tile->width;
+ else
+ return 128 * GEN7_FENCE_MAX_PITCH_VAL / tile->width;
+}
+
static int igt_partial_tiling(void *arg)
{
const unsigned int nreal = 1 << 12; /* largest tile row x2 */
@@ -219,7 +336,7 @@ static int igt_partial_tiling(void *arg)
tile.swizzle = I915_BIT_6_SWIZZLE_NONE;
tile.tiling = I915_TILING_NONE;
- err = check_partial_mapping(obj, &tile, end);
+ err = check_partial_mappings(obj, &tile, end);
if (err && err != -EINTR)
goto out_unlock;
}
@@ -253,31 +370,11 @@ static int igt_partial_tiling(void *arg)
tile.swizzle == I915_BIT_6_SWIZZLE_9_10_17)
continue;
- if (INTEL_GEN(i915) <= 2) {
- tile.height = 16;
- tile.width = 128;
- tile.size = 11;
- } else if (tile.tiling == I915_TILING_Y &&
- HAS_128_BYTE_Y_TILING(i915)) {
- tile.height = 32;
- tile.width = 128;
- tile.size = 12;
- } else {
- tile.height = 8;
- tile.width = 512;
- tile.size = 12;
- }
-
- if (INTEL_GEN(i915) < 4)
- max_pitch = 8192 / tile.width;
- else if (INTEL_GEN(i915) < 7)
- max_pitch = 128 * I965_FENCE_MAX_PITCH_VAL / tile.width;
- else
- max_pitch = 128 * GEN7_FENCE_MAX_PITCH_VAL / tile.width;
+ max_pitch = setup_tile_size(&tile, i915);
for (pitch = max_pitch; pitch; pitch >>= 1) {
tile.stride = tile.width * pitch;
- err = check_partial_mapping(obj, &tile, end);
+ err = check_partial_mappings(obj, &tile, end);
if (err == -EINTR)
goto next_tiling;
if (err)
@@ -285,7 +382,7 @@ static int igt_partial_tiling(void *arg)
if (pitch > 2 && INTEL_GEN(i915) >= 4) {
tile.stride = tile.width * (pitch - 1);
- err = check_partial_mapping(obj, &tile, end);
+ err = check_partial_mappings(obj, &tile, end);
if (err == -EINTR)
goto next_tiling;
if (err)
@@ -294,7 +391,7 @@ static int igt_partial_tiling(void *arg)
if (pitch < max_pitch && INTEL_GEN(i915) >= 4) {
tile.stride = tile.width * (pitch + 1);
- err = check_partial_mapping(obj, &tile, end);
+ err = check_partial_mappings(obj, &tile, end);
if (err == -EINTR)
goto next_tiling;
if (err)
@@ -305,7 +402,7 @@ static int igt_partial_tiling(void *arg)
if (INTEL_GEN(i915) >= 4) {
for_each_prime_number(pitch, max_pitch) {
tile.stride = tile.width * pitch;
- err = check_partial_mapping(obj, &tile, end);
+ err = check_partial_mappings(obj, &tile, end);
if (err == -EINTR)
goto next_tiling;
if (err)
@@ -325,6 +422,99 @@ next_tiling: ;
return err;
}
+static int igt_smoke_tiling(void *arg)
+{
+ const unsigned int nreal = 1 << 12; /* largest tile row x2 */
+ struct drm_i915_private *i915 = arg;
+ struct drm_i915_gem_object *obj;
+ intel_wakeref_t wakeref;
+ I915_RND_STATE(prng);
+ unsigned long count;
+ IGT_TIMEOUT(end);
+ int err;
+
+ /*
+ * igt_partial_tiling() does an exhastive check of partial tiling
+ * chunking, but will undoubtably run out of time. Here, we do a
+ * randomised search and hope over many runs of 1s with different
+ * seeds we will do a thorough check.
+ *
+ * Remember to look at the st_seed if we see a flip-flop in BAT!
+ */
+
+ if (i915->quirks & QUIRK_PIN_SWIZZLED_PAGES)
+ return 0;
+
+ obj = huge_gem_object(i915,
+ nreal << PAGE_SHIFT,
+ (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
+ if (IS_ERR(obj))
+ return PTR_ERR(obj);
+
+ err = i915_gem_object_pin_pages(obj);
+ if (err) {
+ pr_err("Failed to allocate %u pages (%lu total), err=%d\n",
+ nreal, obj->base.size / PAGE_SIZE, err);
+ goto out;
+ }
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ count = 0;
+ do {
+ struct tile tile;
+
+ tile.tiling =
+ i915_prandom_u32_max_state(I915_TILING_Y + 1, &prng);
+ switch (tile.tiling) {
+ case I915_TILING_NONE:
+ tile.height = 1;
+ tile.width = 1;
+ tile.size = 0;
+ tile.stride = 0;
+ tile.swizzle = I915_BIT_6_SWIZZLE_NONE;
+ break;
+
+ case I915_TILING_X:
+ tile.swizzle = i915->mm.bit_6_swizzle_x;
+ break;
+ case I915_TILING_Y:
+ tile.swizzle = i915->mm.bit_6_swizzle_y;
+ break;
+ }
+
+ if (tile.swizzle == I915_BIT_6_SWIZZLE_9_17 ||
+ tile.swizzle == I915_BIT_6_SWIZZLE_9_10_17)
+ continue;
+
+ if (tile.tiling != I915_TILING_NONE) {
+ unsigned int max_pitch = setup_tile_size(&tile, i915);
+
+ tile.stride =
+ i915_prandom_u32_max_state(max_pitch, &prng);
+ tile.stride = (1 + tile.stride) * tile.width;
+ if (INTEL_GEN(i915) < 4)
+ tile.stride = rounddown_pow_of_two(tile.stride);
+ }
+
+ err = check_partial_mapping(obj, &tile, &prng);
+ if (err)
+ break;
+
+ count++;
+ } while (!__igt_timeout(end, NULL));
+
+ pr_info("%s: Completed %lu trials\n", __func__, count);
+
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ i915_gem_object_unpin_pages(obj);
+out:
+ i915_gem_object_put(obj);
+ return err;
+}
+
static int make_obj_busy(struct drm_i915_gem_object *obj)
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
@@ -515,6 +705,7 @@ int i915_gem_mman_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(igt_partial_tiling),
+ SUBTEST(igt_smoke_tiling),
SUBTEST(igt_mmap_offset_exhaustion),
};
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
2019-09-09 11:00 ` [PATCH 1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel Chris Wilson
2019-09-09 11:00 ` [PATCH 2/6] drm/i915/selftests: Tighten the timeout testing for partial mmaps Chris Wilson
@ 2019-09-09 11:00 ` Chris Wilson
2019-09-10 10:39 ` Mika Kuoppala
2019-09-09 11:00 ` [PATCH 4/6] drm/i915: Force compilation with intel-iommu for CI validation Chris Wilson
` (4 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2019-09-09 11:00 UTC (permalink / raw)
To: intel-gfx
Cc: Chris Wilson, Mika Kuoppala, Martin Peres, Joonas Lahtinen,
stable
As soon as we re-enable the various functions within the HW, they may go
off and read data via a GGTT offset. Hence, if we have not yet restored
the GGTT PTE before then, they may read and even *write* random locations
in memory.
Detected by DMAR faults during resume.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Martin Peres <martin.peres@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: stable@vger.kernel.org
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 3 ---
drivers/gpu/drm/i915/i915_drv.c | 5 +++++
drivers/gpu/drm/i915/selftests/i915_gem.c | 6 ++++++
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index b3993d24b83d..9b1129aaacfe 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -242,9 +242,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
mutex_lock(&i915->drm.struct_mutex);
intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
- i915_gem_restore_gtt_mappings(i915);
- i915_gem_restore_fences(i915);
-
if (i915_gem_init_hw(i915))
goto err_wedged;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7b2c81a8bbaa..1af4eba968c0 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1877,6 +1877,11 @@ static int i915_drm_resume(struct drm_device *dev)
if (ret)
DRM_ERROR("failed to re-enable GGTT\n");
+ mutex_lock(&dev_priv->drm.struct_mutex);
+ i915_gem_restore_gtt_mappings(dev_priv);
+ i915_gem_restore_fences(dev_priv);
+ mutex_unlock(&dev_priv->drm.struct_mutex);
+
intel_csr_ucode_resume(dev_priv);
i915_restore_state(dev_priv);
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
index bb6dd54a6ff3..37593831b539 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915)
with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
intel_gt_sanitize(&i915->gt, false);
i915_gem_sanitize(i915);
+
+ mutex_lock(&i915->drm.struct_mutex);
+ i915_gem_restore_gtt_mappings(i915);
+ i915_gem_restore_fences(i915);
+ mutex_unlock(&i915->drm.struct_mutex);
+
i915_gem_resume(i915);
}
}
--
2.23.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume
2019-09-09 11:00 ` [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume Chris Wilson
@ 2019-09-10 10:39 ` Mika Kuoppala
0 siblings, 0 replies; 17+ messages in thread
From: Mika Kuoppala @ 2019-09-10 10:39 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson, Martin Peres, Joonas Lahtinen, stable
Chris Wilson <chris@chris-wilson.co.uk> writes:
> As soon as we re-enable the various functions within the HW, they may go
> off and read data via a GGTT offset. Hence, if we have not yet restored
> the GGTT PTE before then, they may read and even *write* random locations
> in memory.
>
> Detected by DMAR faults during resume.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Martin Peres <martin.peres@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: stable@vger.kernel.org
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_pm.c | 3 ---
> drivers/gpu/drm/i915/i915_drv.c | 5 +++++
> drivers/gpu/drm/i915/selftests/i915_gem.c | 6 ++++++
> 3 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index b3993d24b83d..9b1129aaacfe 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -242,9 +242,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
> mutex_lock(&i915->drm.struct_mutex);
> intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
>
> - i915_gem_restore_gtt_mappings(i915);
> - i915_gem_restore_fences(i915);
> -
> if (i915_gem_init_hw(i915))
> goto err_wedged;
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 7b2c81a8bbaa..1af4eba968c0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1877,6 +1877,11 @@ static int i915_drm_resume(struct drm_device *dev)
> if (ret)
> DRM_ERROR("failed to re-enable GGTT\n");
>
> + mutex_lock(&dev_priv->drm.struct_mutex);
> + i915_gem_restore_gtt_mappings(dev_priv);
> + i915_gem_restore_fences(dev_priv);
> + mutex_unlock(&dev_priv->drm.struct_mutex);
> +
> intel_csr_ucode_resume(dev_priv);
>
> i915_restore_state(dev_priv);
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
> index bb6dd54a6ff3..37593831b539 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
> @@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915)
> with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
> intel_gt_sanitize(&i915->gt, false);
> i915_gem_sanitize(i915);
> +
> + mutex_lock(&i915->drm.struct_mutex);
> + i915_gem_restore_gtt_mappings(i915);
> + i915_gem_restore_fences(i915);
> + mutex_unlock(&i915->drm.struct_mutex);
> +
> i915_gem_resume(i915);
> }
> }
> --
> 2.23.0
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume
@ 2019-09-10 10:39 ` Mika Kuoppala
0 siblings, 0 replies; 17+ messages in thread
From: Mika Kuoppala @ 2019-09-10 10:39 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Cc: Chris Wilson, Martin Peres, Joonas Lahtinen, stable
Chris Wilson <chris@chris-wilson.co.uk> writes:
> As soon as we re-enable the various functions within the HW, they may go
> off and read data via a GGTT offset. Hence, if we have not yet restored
> the GGTT PTE before then, they may read and even *write* random locations
> in memory.
>
> Detected by DMAR faults during resume.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Martin Peres <martin.peres@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: stable@vger.kernel.org
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_pm.c | 3 ---
> drivers/gpu/drm/i915/i915_drv.c | 5 +++++
> drivers/gpu/drm/i915/selftests/i915_gem.c | 6 ++++++
> 3 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index b3993d24b83d..9b1129aaacfe 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -242,9 +242,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
> mutex_lock(&i915->drm.struct_mutex);
> intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
>
> - i915_gem_restore_gtt_mappings(i915);
> - i915_gem_restore_fences(i915);
> -
> if (i915_gem_init_hw(i915))
> goto err_wedged;
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 7b2c81a8bbaa..1af4eba968c0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1877,6 +1877,11 @@ static int i915_drm_resume(struct drm_device *dev)
> if (ret)
> DRM_ERROR("failed to re-enable GGTT\n");
>
> + mutex_lock(&dev_priv->drm.struct_mutex);
> + i915_gem_restore_gtt_mappings(dev_priv);
> + i915_gem_restore_fences(dev_priv);
> + mutex_unlock(&dev_priv->drm.struct_mutex);
> +
> intel_csr_ucode_resume(dev_priv);
>
> i915_restore_state(dev_priv);
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
> index bb6dd54a6ff3..37593831b539 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
> @@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915)
> with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
> intel_gt_sanitize(&i915->gt, false);
> i915_gem_sanitize(i915);
> +
> + mutex_lock(&i915->drm.struct_mutex);
> + i915_gem_restore_gtt_mappings(i915);
> + i915_gem_restore_fences(i915);
> + mutex_unlock(&i915->drm.struct_mutex);
> +
> i915_gem_resume(i915);
> }
> }
> --
> 2.23.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 4/6] drm/i915: Force compilation with intel-iommu for CI validation
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
` (2 preceding siblings ...)
2019-09-09 11:00 ` [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume Chris Wilson
@ 2019-09-09 11:00 ` Chris Wilson
2019-09-09 16:32 ` kbuild test robot
2019-09-09 19:55 ` kbuild test robot
2019-09-09 11:00 ` [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu Chris Wilson
` (3 subsequent siblings)
7 siblings, 2 replies; 17+ messages in thread
From: Chris Wilson @ 2019-09-09 11:00 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/Kconfig.debug | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug
index 00786a142ff0..ebcb6dbc2393 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -20,6 +20,8 @@ config DRM_I915_WERROR
config DRM_I915_DEBUG
bool "Enable additional driver debugging"
depends on DRM_I915
+ select PCI_MSI
+ select INTEL_IOMMU
select DEBUG_FS
select PREEMPT_COUNT
select REFCOUNT_FULL
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 4/6] drm/i915: Force compilation with intel-iommu for CI validation
2019-09-09 11:00 ` [PATCH 4/6] drm/i915: Force compilation with intel-iommu for CI validation Chris Wilson
@ 2019-09-09 16:32 ` kbuild test robot
2019-09-09 19:55 ` kbuild test robot
1 sibling, 0 replies; 17+ messages in thread
From: kbuild test robot @ 2019-09-09 16:32 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 27590 bytes --]
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to v5.3-rc8 next-20190904]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-selftests-Take-runtime-wakeref-for-igt_ggtt_lowlevel/20190909-201355
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-s2-201936 (attached as .config)
compiler: gcc-7 (Debian 7.4.0-11) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
drivers/iommu/intel-iommu.c: In function 'domain_update_iommu_coherency':
>> drivers/iommu/intel-iommu.c:622:2: error: implicit declaration of function 'for_each_active_iommu'; did you mean 'for_each_active_irq'? [-Werror=implicit-function-declaration]
for_each_active_iommu(iommu, drhd) {
^~~~~~~~~~~~~~~~~~~~~
for_each_active_irq
>> drivers/iommu/intel-iommu.c:622:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'domain_update_iommu_snooping':
drivers/iommu/intel-iommu.c:638:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'domain_update_iommu_superpage':
drivers/iommu/intel-iommu.c:663:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'device_to_iommu':
drivers/iommu/intel-iommu.c:781:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:812:2: warning: label 'out' defined but not used [-Wunused-label]
out:
^~~
drivers/iommu/intel-iommu.c:756:6: warning: unused variable 'i' [-Wunused-variable]
int i;
^
drivers/iommu/intel-iommu.c:753:17: warning: unused variable 'tmp' [-Wunused-variable]
struct device *tmp;
^~~
drivers/iommu/intel-iommu.c: In function 'si_domain_init':
>> drivers/iommu/intel-iommu.c:2731:3: error: implicit declaration of function 'for_each_active_dev_scope'; did you mean 'for_each_active_irq'? [-Werror=implicit-function-declaration]
for_each_active_dev_scope(rmrr->devices, rmrr->devices_cnt,
^~~~~~~~~~~~~~~~~~~~~~~~~
for_each_active_irq
drivers/iommu/intel-iommu.c:2732:16: error: expected ';' before '{' token
i, dev) {
^
drivers/iommu/intel-iommu.c: In function 'device_has_rmrr':
>> drivers/iommu/intel-iommu.c:2794:4: error: expected ';' before 'if'
if (tmp == dev ||
^~
drivers/iommu/intel-iommu.c: In function 'init_dmars':
>> drivers/iommu/intel-iommu.c:3157:2: error: implicit declaration of function 'for_each_drhd_unit'; did you mean 'for_each_rmrr_units'? [-Werror=implicit-function-declaration]
for_each_drhd_unit(drhd) {
^~~~~~~~~~~~~~~~~~
for_each_rmrr_units
drivers/iommu/intel-iommu.c:3157:27: error: expected ';' before '{' token
for_each_drhd_unit(drhd) {
^
drivers/iommu/intel-iommu.c:3182:2: error: implicit declaration of function 'for_each_iommu'; did you mean 'for_each_cpu'? [-Werror=implicit-function-declaration]
for_each_iommu(iommu, drhd) {
^~~~~~~~~~~~~~
for_each_cpu
drivers/iommu/intel-iommu.c:3182:30: error: expected ';' before '{' token
for_each_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:3293:30: error: expected ';' before '{' token
for_each_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:3327:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'get_private_domain_for_dev':
drivers/iommu/intel-iommu.c:3391:18: error: expected ';' before '{' token
i, i_dev) {
^
drivers/iommu/intel-iommu.c:3376:9: warning: unused variable 'ret' [-Wunused-variable]
int i, ret;
^~~
In file included from arch/x86/include/asm/bug.h:83:0,
from include/linux/bug.h:5,
from include/linux/jump_label.h:250,
from arch/x86/include/asm/string_64.h:6,
from arch/x86/include/asm/string.h:5,
from include/linux/string.h:20,
from include/linux/bitmap.h:9,
from drivers/iommu/intel-iommu.c:17:
drivers/iommu/intel-iommu.c: In function 'quirk_ioat_snb_local_iommu':
>> drivers/iommu/intel-iommu.c:3827:35: error: dereferencing pointer to incomplete type 'struct dmar_drhd_unit'
if (WARN_TAINT_ONCE(!drhd || drhd->reg_base_addr - vtbar != 0xa000,
^
include/asm-generic/bug.h:173:27: note: in definition of macro 'WARN_TAINT_ONCE'
int __ret_warn_once = !!(condition); \
^~~~~~~~~
drivers/iommu/intel-iommu.c: In function 'init_no_remapping_devices':
drivers/iommu/intel-iommu.c:3840:27: error: expected ';' before '{' token
for_each_drhd_unit(drhd) {
^
drivers/iommu/intel-iommu.c:3838:6: warning: unused variable 'i' [-Wunused-variable]
int i;
^
drivers/iommu/intel-iommu.c:3837:17: warning: unused variable 'dev' [-Wunused-variable]
struct device *dev;
^~~
drivers/iommu/intel-iommu.c: In function 'dmar_parse_one_rmrr':
>> drivers/iommu/intel-iommu.c:4023:19: error: implicit declaration of function 'dmar_alloc_dev_scope'; did you mean 'dmar_alloc_hwirq'? [-Werror=implicit-function-declaration]
rmrru->devices = dmar_alloc_dev_scope((void *)(rmrr + 1),
^~~~~~~~~~~~~~~~~~~~
dmar_alloc_hwirq
>> drivers/iommu/intel-iommu.c:4023:17: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
rmrru->devices = dmar_alloc_dev_scope((void *)(rmrr + 1),
^
drivers/iommu/intel-iommu.c: In function 'dmar_parse_one_atsr':
drivers/iommu/intel-iommu.c:4082:18: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
atsru->devices = dmar_alloc_dev_scope((void *)(atsr + 1),
^
drivers/iommu/intel-iommu.c: In function 'intel_iommu_free_atsr':
>> drivers/iommu/intel-iommu.c:4098:2: error: implicit declaration of function 'dmar_free_dev_scope'; did you mean 'dmi_memdev_size'? [-Werror=implicit-function-declaration]
dmar_free_dev_scope(&atsru->devices, &atsru->devices_cnt);
^~~~~~~~~~~~~~~~~~~
dmi_memdev_size
drivers/iommu/intel-iommu.c: In function 'dmar_check_one_atsr':
>> drivers/iommu/intel-iommu.c:4133:4: error: expected ';' before 'return'
return -EBUSY;
^~~~~~
drivers/iommu/intel-iommu.c: In function 'dmar_find_matched_atsr_unit':
>> drivers/iommu/intel-iommu.c:4288:3: error: implicit declaration of function 'for_each_dev_scope'; did you mean 'for_each_node_state'? [-Werror=implicit-function-declaration]
for_each_dev_scope(atsru->devices, atsru->devices_cnt, i, tmp)
^~~~~~~~~~~~~~~~~~
for_each_node_state
drivers/iommu/intel-iommu.c:4289:4: error: expected ';' before 'if'
if (tmp == &bridge->dev)
^~
drivers/iommu/intel-iommu.c: At top level:
>> drivers/iommu/intel-iommu.c:4302:40: warning: 'struct dmar_pci_notify_info' declared inside parameter list will not be visible outside of this definition or declaration
int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
^~~~~~~~~~~~~~~~~~~~
drivers/iommu/intel-iommu.c: In function 'dmar_iommu_notify_scope_dev':
>> drivers/iommu/intel-iommu.c:4316:11: error: dereferencing pointer to incomplete type 'struct dmar_pci_notify_info'
if (info->event == BUS_NOTIFY_ADD_DEVICE) {
^~
>> drivers/iommu/intel-iommu.c:4317:10: error: implicit declaration of function 'dmar_insert_dev_scope'; did you mean 'dmar_insert_one_dev_info'? [-Werror=implicit-function-declaration]
ret = dmar_insert_dev_scope(info, (void *)(rmrr + 1),
^~~~~~~~~~~~~~~~~~~~~
dmar_insert_one_dev_info
>> drivers/iommu/intel-iommu.c:4324:4: error: implicit declaration of function 'dmar_remove_dev_scope'; did you mean 'domain_remove_dev_info'? [-Werror=implicit-function-declaration]
dmar_remove_dev_scope(info, rmrr->segment,
^~~~~~~~~~~~~~~~~~~~~
domain_remove_dev_info
drivers/iommu/intel-iommu.c: In function 'intel_iommu_memory_notifier':
>> drivers/iommu/intel-iommu.c:4401:5: error: expected ';' before 'iommu_flush_iotlb_psi'
iommu_flush_iotlb_psi(iommu, si_domain,
^~~~~~~~~~~~~~~~~~~~~
drivers/iommu/intel-iommu.c: In function 'intel_disable_iommus':
>> drivers/iommu/intel-iommu.c:4455:3: error: expected ';' before 'iommu_disable_translation'
iommu_disable_translation(iommu);
^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/iommu/intel-iommu.c: In function 'probe_acpi_namespace_devices':
drivers/iommu/intel-iommu.c:4587:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:4585:9: warning: unused variable 'ret' [-Wunused-variable]
int i, ret = 0;
^~~
drivers/iommu/intel-iommu.c:4585:6: warning: unused variable 'i' [-Wunused-variable]
int i, ret = 0;
^
drivers/iommu/intel-iommu.c:4584:17: warning: unused variable 'dev' [-Wunused-variable]
struct device *dev;
^~~
>> drivers/iommu/intel-iommu.c:4620:1: warning: no return statement in function returning non-void [-Wreturn-type]
}
^
drivers/iommu/intel-iommu.c: In function 'intel_iommu_init':
>> drivers/iommu/intel-iommu.c:4640:14: error: 'dmar_global_lock' undeclared (first use in this function); did you mean 'qi_global_iec'?
down_write(&dmar_global_lock);
^~~~~~~~~~~~~~~~
qi_global_iec
drivers/iommu/intel-iommu.c:4640:14: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/iommu/intel-iommu.c:4641:6: error: implicit declaration of function 'dmar_table_init'; did you mean 'acpi_table_init'? [-Werror=implicit-function-declaration]
if (dmar_table_init()) {
^~~~~~~~~~~~~~~
acpi_table_init
vim +622 drivers/iommu/intel-iommu.c
8c11e798eee2ce drivers/pci/intel-iommu.c Weidong Han 2008-12-08 600
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 601 static void domain_update_iommu_coherency(struct dmar_domain *domain)
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 602 {
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 603 struct dmar_drhd_unit *drhd;
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 604 struct intel_iommu *iommu;
2f119c7895af56 drivers/iommu/intel-iommu.c Quentin Lambert 2015-02-06 605 bool found = false;
2f119c7895af56 drivers/iommu/intel-iommu.c Quentin Lambert 2015-02-06 606 int i;
2e12bc29fc5a12 drivers/iommu/intel-iommu.c Alex Williamson 2011-11-11 607
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 608 domain->iommu_coherency = 1;
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 609
29a27719abaa4d drivers/iommu/intel-iommu.c Joerg Roedel 2015-07-21 610 for_each_domain_iommu(i, domain) {
2f119c7895af56 drivers/iommu/intel-iommu.c Quentin Lambert 2015-02-06 611 found = true;
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 612 if (!ecap_coherent(g_iommus[i]->ecap)) {
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 613 domain->iommu_coherency = 0;
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 614 break;
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 615 }
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 616 }
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 617 if (found)
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 618 return;
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 619
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 620 /* No hardware attached; use lowest common denominator */
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 621 rcu_read_lock();
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 @622 for_each_active_iommu(iommu, drhd) {
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 623 if (!ecap_coherent(iommu->ecap)) {
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 624 domain->iommu_coherency = 0;
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 625 break;
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 626 }
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 627 }
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 628 rcu_read_unlock();
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 629 }
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 630
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 631 static int domain_update_iommu_snooping(struct intel_iommu *skip)
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 632 {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 633 struct dmar_drhd_unit *drhd;
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 634 struct intel_iommu *iommu;
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 635 int ret = 1;
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 636
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 637 rcu_read_lock();
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 638 for_each_active_iommu(iommu, drhd) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 639 if (iommu != skip) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 640 if (!ecap_sc_support(iommu->ecap)) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 641 ret = 0;
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 642 break;
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 643 }
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 644 }
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 645 }
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 646 rcu_read_unlock();
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 647
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 648 return ret;
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 649 }
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 650
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 651 static int domain_update_iommu_superpage(struct intel_iommu *skip)
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 652 {
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 653 struct dmar_drhd_unit *drhd;
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 654 struct intel_iommu *iommu;
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 655 int mask = 0xf;
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 656
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 657 if (!intel_iommu_superpage) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 658 return 0;
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 659 }
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 660
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 661 /* set iommu_superpage to the smallest common denominator */
0e242612d9cdb4 drivers/iommu/intel-iommu.c Jiang Liu 2014-02-19 662 rcu_read_lock();
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 663 for_each_active_iommu(iommu, drhd) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 664 if (iommu != skip) {
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 665 mask &= cap_super_page_val(iommu->cap);
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 666 if (!mask)
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 667 break;
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 668 }
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 669 }
0e242612d9cdb4 drivers/iommu/intel-iommu.c Jiang Liu 2014-02-19 670 rcu_read_unlock();
0e242612d9cdb4 drivers/iommu/intel-iommu.c Jiang Liu 2014-02-19 671
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 672 return fls(mask);
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 673 }
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 674
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 675 /* Some capabilities may be different across iommus */
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 676 static void domain_update_iommu_cap(struct dmar_domain *domain)
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 677 {
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 678 domain_update_iommu_coherency(domain);
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 679 domain->iommu_snooping = domain_update_iommu_snooping(NULL);
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 680 domain->iommu_superpage = domain_update_iommu_superpage(NULL);
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 681 }
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 682
26b86092c46503 drivers/iommu/intel-iommu.c Sohil Mehta 2018-09-11 683 struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
26b86092c46503 drivers/iommu/intel-iommu.c Sohil Mehta 2018-09-11 684 u8 devfn, int alloc)
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 685 {
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 686 struct root_entry *root = &iommu->root_entry[bus];
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 687 struct context_entry *context;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 688 u64 *entry;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 689
4df4eab168c1c4 drivers/iommu/intel-iommu.c Joerg Roedel 2015-08-25 690 entry = &root->lo;
765b6a98c1de3d drivers/iommu/intel-iommu.c Lu Baolu 2018-12-10 691 if (sm_supported(iommu)) {
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 692 if (devfn >= 0x80) {
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 693 devfn -= 0x80;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 694 entry = &root->hi;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 695 }
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 696 devfn *= 2;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 697 }
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 698 if (*entry & 1)
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 699 context = phys_to_virt(*entry & VTD_PAGE_MASK);
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 700 else {
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 701 unsigned long phy_addr;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 702 if (!alloc)
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 703 return NULL;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 704
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 705 context = alloc_pgtable_page(iommu->node);
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 706 if (!context)
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 707 return NULL;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 708
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 709 __iommu_flush_cache(iommu, (void *)context, CONTEXT_SIZE);
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 710 phy_addr = virt_to_phys((void *)context);
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 711 *entry = phy_addr | 1;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 712 __iommu_flush_cache(iommu, entry, sizeof(*entry));
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 713 }
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 714 return &context[devfn];
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 715 }
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 716
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 717 static int iommu_dummy(struct device *dev)
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 718 {
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 719 return dev->archdata.iommu == DUMMY_DEVICE_DOMAIN_INFO;
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 720 }
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 721
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 722 /**
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 723 * is_downstream_to_pci_bridge - test if a device belongs to the PCI
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 724 * sub-hierarchy of a candidate PCI-PCI bridge
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 725 * @dev: candidate PCI device belonging to @bridge PCI sub-hierarchy
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 726 * @bridge: the candidate PCI-PCI bridge
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 727 *
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 728 * Return: true if @dev belongs to @bridge PCI sub-hierarchy, else false.
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 729 */
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 730 static bool
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 731 is_downstream_to_pci_bridge(struct device *dev, struct device *bridge)
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 732 {
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 733 struct pci_dev *pdev, *pbridge;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 734
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 735 if (!dev_is_pci(dev) || !dev_is_pci(bridge))
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 736 return false;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 737
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 738 pdev = to_pci_dev(dev);
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 739 pbridge = to_pci_dev(bridge);
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 740
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 741 if (pbridge->subordinate &&
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 742 pbridge->subordinate->number <= pdev->bus->number &&
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 743 pbridge->subordinate->busn_res.end >= pdev->bus->number)
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 744 return true;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 745
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 746 return false;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 747 }
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 748
156baca8d31e1a drivers/iommu/intel-iommu.c David Woodhouse 2014-03-09 749 static struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn)
c7151a8dfefd11 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 750 {
c7151a8dfefd11 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 751 struct dmar_drhd_unit *drhd = NULL;
b683b230a244c3 drivers/iommu/intel-iommu.c Jiang Liu 2014-02-19 752 struct intel_iommu *iommu;
156baca8d31e1a drivers/iommu/intel-iommu.c David Woodhouse 2014-03-09 753 struct device *tmp;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 754 struct pci_dev *pdev = NULL;
aa4d066a2a8041 drivers/iommu/intel-iommu.c Yijing Wang 2014-05-26 755 u16 segment = 0;
c7151a8dfefd11 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 @756 int i;
c7151a8dfefd11 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 757
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 758 if (iommu_dummy(dev))
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 759 return NULL;
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 760
156baca8d31e1a drivers/iommu/intel-iommu.c David Woodhouse 2014-03-09 761 if (dev_is_pci(dev)) {
1c387188c60f53 drivers/iommu/intel-iommu.c Ashok Raj 2016-10-21 762 struct pci_dev *pf_pdev;
1c387188c60f53 drivers/iommu/intel-iommu.c Ashok Raj 2016-10-21 763
156baca8d31e1a drivers/iommu/intel-iommu.c David Woodhouse 2014-03-09 764 pdev = to_pci_dev(dev);
5823e330b58c52 drivers/iommu/intel-iommu.c Jon Derrick 2017-08-30 765
:::::: The code at line 622 was first introduced by commit
:::::: d05019608746240d86a406fbf8d8c1fc71a87101 iommu/vt-d: Be less pessimistic about domain coherency where possible
:::::: TO: David Woodhouse <dwmw2@infradead.org>
:::::: CC: David Woodhouse <David.Woodhouse@intel.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 30749 bytes --]
[-- Attachment #3: Type: text/plain, Size: 159 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 4/6] drm/i915: Force compilation with intel-iommu for CI validation
2019-09-09 11:00 ` [PATCH 4/6] drm/i915: Force compilation with intel-iommu for CI validation Chris Wilson
2019-09-09 16:32 ` kbuild test robot
@ 2019-09-09 19:55 ` kbuild test robot
1 sibling, 0 replies; 17+ messages in thread
From: kbuild test robot @ 2019-09-09 19:55 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 31844 bytes --]
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to v5.3-rc8 next-20190904]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-selftests-Take-runtime-wakeref-for-igt_ggtt_lowlevel/20190909-201355
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a004-201936 (attached as .config)
compiler: gcc-5 (Ubuntu 5.5.0-12ubuntu1) 5.5.0 20171010
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
drivers/iommu/intel-iommu.c: In function 'domain_update_iommu_coherency':
>> drivers/iommu/intel-iommu.c:622:2: error: implicit declaration of function 'for_each_active_iommu' [-Werror=implicit-function-declaration]
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:622:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'domain_update_iommu_snooping':
drivers/iommu/intel-iommu.c:638:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'domain_update_iommu_superpage':
drivers/iommu/intel-iommu.c:663:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'device_to_iommu':
drivers/iommu/intel-iommu.c:781:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:812:2: warning: label 'out' defined but not used [-Wunused-label]
out:
^
drivers/iommu/intel-iommu.c:756:6: warning: unused variable 'i' [-Wunused-variable]
int i;
^
drivers/iommu/intel-iommu.c:753:17: warning: unused variable 'tmp' [-Wunused-variable]
struct device *tmp;
^
drivers/iommu/intel-iommu.c: In function 'si_domain_init':
>> drivers/iommu/intel-iommu.c:2731:3: error: implicit declaration of function 'for_each_active_dev_scope' [-Werror=implicit-function-declaration]
for_each_active_dev_scope(rmrr->devices, rmrr->devices_cnt,
^
drivers/iommu/intel-iommu.c:2732:16: error: expected ';' before '{' token
i, dev) {
^
drivers/iommu/intel-iommu.c: In function 'device_has_rmrr':
drivers/iommu/intel-iommu.c:2794:4: error: expected ';' before 'if'
if (tmp == dev ||
^
drivers/iommu/intel-iommu.c: In function 'init_dmars':
>> drivers/iommu/intel-iommu.c:3157:2: error: implicit declaration of function 'for_each_drhd_unit' [-Werror=implicit-function-declaration]
for_each_drhd_unit(drhd) {
^
drivers/iommu/intel-iommu.c:3157:27: error: expected ';' before '{' token
for_each_drhd_unit(drhd) {
^
>> drivers/iommu/intel-iommu.c:3182:2: error: implicit declaration of function 'for_each_iommu' [-Werror=implicit-function-declaration]
for_each_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:3182:30: error: expected ';' before '{' token
for_each_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:3293:30: error: expected ';' before '{' token
for_each_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:3327:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'get_private_domain_for_dev':
drivers/iommu/intel-iommu.c:3391:18: error: expected ';' before '{' token
i, i_dev) {
^
drivers/iommu/intel-iommu.c:3376:9: warning: unused variable 'ret' [-Wunused-variable]
int i, ret;
^
In file included from arch/x86/include/asm/bug.h:83:0,
from include/linux/bug.h:5,
from include/linux/thread_info.h:12,
from arch/x86/include/asm/preempt.h:7,
from include/linux/preempt.h:78,
from include/linux/spinlock.h:51,
from include/linux/wait.h:9,
from include/linux/wait_bit.h:8,
from include/linux/fs.h:6,
from include/linux/debugfs.h:15,
from drivers/iommu/intel-iommu.c:18:
drivers/iommu/intel-iommu.c: In function 'quirk_ioat_snb_local_iommu':
drivers/iommu/intel-iommu.c:3827:35: error: dereferencing pointer to incomplete type 'struct dmar_drhd_unit'
if (WARN_TAINT_ONCE(!drhd || drhd->reg_base_addr - vtbar != 0xa000,
^
include/asm-generic/bug.h:173:27: note: in definition of macro 'WARN_TAINT_ONCE'
int __ret_warn_once = !!(condition); \
^
drivers/iommu/intel-iommu.c: In function 'init_no_remapping_devices':
drivers/iommu/intel-iommu.c:3840:27: error: expected ';' before '{' token
for_each_drhd_unit(drhd) {
^
drivers/iommu/intel-iommu.c:3838:6: warning: unused variable 'i' [-Wunused-variable]
int i;
^
drivers/iommu/intel-iommu.c:3837:17: warning: unused variable 'dev' [-Wunused-variable]
struct device *dev;
^
drivers/iommu/intel-iommu.c: In function 'dmar_parse_one_rmrr':
>> drivers/iommu/intel-iommu.c:4023:19: error: implicit declaration of function 'dmar_alloc_dev_scope' [-Werror=implicit-function-declaration]
rmrru->devices = dmar_alloc_dev_scope((void *)(rmrr + 1),
^
drivers/iommu/intel-iommu.c:4023:17: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
rmrru->devices = dmar_alloc_dev_scope((void *)(rmrr + 1),
^
drivers/iommu/intel-iommu.c: In function 'dmar_parse_one_atsr':
drivers/iommu/intel-iommu.c:4082:18: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
atsru->devices = dmar_alloc_dev_scope((void *)(atsr + 1),
^
drivers/iommu/intel-iommu.c: In function 'intel_iommu_free_atsr':
>> drivers/iommu/intel-iommu.c:4098:2: error: implicit declaration of function 'dmar_free_dev_scope' [-Werror=implicit-function-declaration]
dmar_free_dev_scope(&atsru->devices, &atsru->devices_cnt);
^
drivers/iommu/intel-iommu.c: In function 'dmar_check_one_atsr':
drivers/iommu/intel-iommu.c:4133:4: error: expected ';' before 'return'
return -EBUSY;
^
drivers/iommu/intel-iommu.c: In function 'dmar_find_matched_atsr_unit':
>> drivers/iommu/intel-iommu.c:4288:3: error: implicit declaration of function 'for_each_dev_scope' [-Werror=implicit-function-declaration]
for_each_dev_scope(atsru->devices, atsru->devices_cnt, i, tmp)
^
drivers/iommu/intel-iommu.c:4289:4: error: expected ';' before 'if'
if (tmp == &bridge->dev)
^
drivers/iommu/intel-iommu.c: At top level:
>> drivers/iommu/intel-iommu.c:4302:40: warning: 'struct dmar_pci_notify_info' declared inside parameter list
int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
^
>> drivers/iommu/intel-iommu.c:4302:40: warning: its scope is only this definition or declaration, which is probably not what you want
drivers/iommu/intel-iommu.c: In function 'dmar_iommu_notify_scope_dev':
drivers/iommu/intel-iommu.c:4316:11: error: dereferencing pointer to incomplete type 'struct dmar_pci_notify_info'
if (info->event == BUS_NOTIFY_ADD_DEVICE) {
^
>> drivers/iommu/intel-iommu.c:4317:10: error: implicit declaration of function 'dmar_insert_dev_scope' [-Werror=implicit-function-declaration]
ret = dmar_insert_dev_scope(info, (void *)(rmrr + 1),
^
>> drivers/iommu/intel-iommu.c:4324:4: error: implicit declaration of function 'dmar_remove_dev_scope' [-Werror=implicit-function-declaration]
dmar_remove_dev_scope(info, rmrr->segment,
^
drivers/iommu/intel-iommu.c: In function 'intel_iommu_memory_notifier':
drivers/iommu/intel-iommu.c:4401:5: error: expected ';' before 'iommu_flush_iotlb_psi'
iommu_flush_iotlb_psi(iommu, si_domain,
^
drivers/iommu/intel-iommu.c: In function 'intel_disable_iommus':
drivers/iommu/intel-iommu.c:4455:3: error: expected ';' before 'iommu_disable_translation'
iommu_disable_translation(iommu);
^
drivers/iommu/intel-iommu.c: In function 'probe_acpi_namespace_devices':
drivers/iommu/intel-iommu.c:4587:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:4585:9: warning: unused variable 'ret' [-Wunused-variable]
int i, ret = 0;
^
drivers/iommu/intel-iommu.c:4585:6: warning: unused variable 'i' [-Wunused-variable]
int i, ret = 0;
^
drivers/iommu/intel-iommu.c:4584:17: warning: unused variable 'dev' [-Wunused-variable]
struct device *dev;
^
drivers/iommu/intel-iommu.c:4620:1: warning: no return statement in function returning non-void [-Wreturn-type]
}
^
drivers/iommu/intel-iommu.c: In function 'intel_iommu_init':
>> drivers/iommu/intel-iommu.c:4640:14: error: 'dmar_global_lock' undeclared (first use in this function)
down_write(&dmar_global_lock);
^
drivers/iommu/intel-iommu.c:4640:14: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/iommu/intel-iommu.c:4641:6: error: implicit declaration of function 'dmar_table_init' [-Werror=implicit-function-declaration]
if (dmar_table_init()) {
^
>> drivers/iommu/intel-iommu.c:4647:6: error: implicit declaration of function 'dmar_dev_scope_init' [-Werror=implicit-function-declaration]
if (dmar_dev_scope_init() < 0) {
^
>> drivers/iommu/intel-iommu.c:4659:2: error: implicit declaration of function 'dmar_register_bus_notifier' [-Werror=implicit-function-declaration]
dmar_register_bus_notifier();
^
drivers/iommu/intel-iommu.c:4674:5: error: expected ';' before 'iommu_disable_protect_mem_regions'
iommu_disable_protect_mem_regions(iommu);
^
drivers/iommu/intel-iommu.c:4719:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c:4739:30: error: expected ';' before '{' token
for_each_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'scalable_mode_support':
drivers/iommu/intel-iommu.c:5214:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'iommu_pasid_support':
drivers/iommu/intel-iommu.c:5232:37: error: expected ';' before '{' token
for_each_active_iommu(iommu, drhd) {
^
drivers/iommu/intel-iommu.c: In function 'intel_iommu_add_device':
drivers/iommu/intel-iommu.c:5266:20: error: passing argument 1 of 'iommu_device_link' from incompatible pointer type [-Werror=incompatible-pointer-types]
iommu_device_link(&iommu->iommu, dev);
^
In file included from drivers/iommu/intel-iommu.c:33:0:
include/linux/iommu.h:846:19: note: expected 'struct device *' but argument is of type 'struct iommu_device *'
static inline int iommu_device_link(struct device *dev, struct device *link)
^
>> drivers/iommu/intel-iommu.c:5271:10: error: implicit declaration of function 'iommu_group_get_for_dev' [-Werror=implicit-function-declaration]
group = iommu_group_get_for_dev(dev);
^
drivers/iommu/intel-iommu.c:5271:8: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
group = iommu_group_get_for_dev(dev);
^
drivers/iommu/intel-iommu.c: In function 'intel_iommu_remove_device':
drivers/iommu/intel-iommu.c:5321:22: error: passing argument 1 of 'iommu_device_unlink' from incompatible pointer type [-Werror=incompatible-pointer-types]
iommu_device_unlink(&iommu->iommu, dev);
^
In file included from drivers/iommu/intel-iommu.c:33:0:
include/linux/iommu.h:851:20: note: expected 'struct device *' but argument is of type 'struct iommu_device *'
static inline void iommu_device_unlink(struct device *dev, struct device *link)
^
drivers/iommu/intel-iommu.c: In function 'intel_iommu_get_resv_regions':
drivers/iommu/intel-iommu.c:5333:13: error: 'dmar_global_lock' undeclared (first use in this function)
down_read(&dmar_global_lock);
^
drivers/iommu/intel-iommu.c:5336:18: error: expected ';' before '{' token
i, i_dev) {
^
>> drivers/iommu/intel-iommu.c:5373:8: error: implicit declaration of function 'iommu_alloc_resv_region' [-Werror=implicit-function-declaration]
reg = iommu_alloc_resv_region(IOAPIC_RANGE_START,
^
drivers/iommu/intel-iommu.c:5373:6: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
reg = iommu_alloc_resv_region(IOAPIC_RANGE_START,
^
drivers/iommu/intel-iommu.c:5327:6: warning: unused variable 'prot' [-Wunused-variable]
int prot = DMA_PTE_READ | DMA_PTE_WRITE;
^
drivers/iommu/intel-iommu.c: At top level:
>> drivers/iommu/intel-iommu.c:5610:2: error: unknown field 'capable' specified in initializer
.capable = intel_iommu_capable,
^
drivers/iommu/intel-iommu.c:5610:14: warning: excess elements in struct initializer
.capable = intel_iommu_capable,
^
drivers/iommu/intel-iommu.c:5610:14: note: (near initialization for 'intel_iommu_ops')
>> drivers/iommu/intel-iommu.c:5611:2: error: unknown field 'domain_alloc' specified in initializer
.domain_alloc = intel_iommu_domain_alloc,
^
drivers/iommu/intel-iommu.c:5611:19: warning: excess elements in struct initializer
.domain_alloc = intel_iommu_domain_alloc,
^
drivers/iommu/intel-iommu.c:5611:19: note: (near initialization for 'intel_iommu_ops')
>> drivers/iommu/intel-iommu.c:5612:2: error: unknown field 'domain_free' specified in initializer
.domain_free = intel_iommu_domain_free,
^
drivers/iommu/intel-iommu.c:5612:18: warning: excess elements in struct initializer
.domain_free = intel_iommu_domain_free,
^
drivers/iommu/intel-iommu.c:5612:18: note: (near initialization for 'intel_iommu_ops')
vim +/for_each_active_iommu +622 drivers/iommu/intel-iommu.c
8c11e798eee2ce drivers/pci/intel-iommu.c Weidong Han 2008-12-08 600
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 601 static void domain_update_iommu_coherency(struct dmar_domain *domain)
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 602 {
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 603 struct dmar_drhd_unit *drhd;
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 604 struct intel_iommu *iommu;
2f119c7895af56 drivers/iommu/intel-iommu.c Quentin Lambert 2015-02-06 605 bool found = false;
2f119c7895af56 drivers/iommu/intel-iommu.c Quentin Lambert 2015-02-06 606 int i;
2e12bc29fc5a12 drivers/iommu/intel-iommu.c Alex Williamson 2011-11-11 607
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 608 domain->iommu_coherency = 1;
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 609
29a27719abaa4d drivers/iommu/intel-iommu.c Joerg Roedel 2015-07-21 610 for_each_domain_iommu(i, domain) {
2f119c7895af56 drivers/iommu/intel-iommu.c Quentin Lambert 2015-02-06 611 found = true;
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 612 if (!ecap_coherent(g_iommus[i]->ecap)) {
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 613 domain->iommu_coherency = 0;
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 614 break;
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 615 }
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 616 }
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 617 if (found)
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 618 return;
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 619
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 620 /* No hardware attached; use lowest common denominator */
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 621 rcu_read_lock();
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 @622 for_each_active_iommu(iommu, drhd) {
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 623 if (!ecap_coherent(iommu->ecap)) {
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 624 domain->iommu_coherency = 0;
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 625 break;
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 626 }
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 627 }
d0501960874624 drivers/iommu/intel-iommu.c David Woodhouse 2014-03-11 628 rcu_read_unlock();
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 629 }
8e604097ddc483 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 630
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 631 static int domain_update_iommu_snooping(struct intel_iommu *skip)
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 632 {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 633 struct dmar_drhd_unit *drhd;
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 634 struct intel_iommu *iommu;
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 635 int ret = 1;
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 636
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 637 rcu_read_lock();
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 638 for_each_active_iommu(iommu, drhd) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 639 if (iommu != skip) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 640 if (!ecap_sc_support(iommu->ecap)) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 641 ret = 0;
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 642 break;
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 643 }
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 644 }
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 645 }
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 646 rcu_read_unlock();
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 647
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 648 return ret;
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 649 }
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 650
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 651 static int domain_update_iommu_superpage(struct intel_iommu *skip)
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 652 {
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 653 struct dmar_drhd_unit *drhd;
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 654 struct intel_iommu *iommu;
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 655 int mask = 0xf;
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 656
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 657 if (!intel_iommu_superpage) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 658 return 0;
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 659 }
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 660
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 661 /* set iommu_superpage to the smallest common denominator */
0e242612d9cdb4 drivers/iommu/intel-iommu.c Jiang Liu 2014-02-19 662 rcu_read_lock();
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 663 for_each_active_iommu(iommu, drhd) {
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 664 if (iommu != skip) {
8140a95d228efb drivers/iommu/intel-iommu.c Allen Kay 2011-10-14 665 mask &= cap_super_page_val(iommu->cap);
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 666 if (!mask)
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 667 break;
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 668 }
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 669 }
0e242612d9cdb4 drivers/iommu/intel-iommu.c Jiang Liu 2014-02-19 670 rcu_read_unlock();
0e242612d9cdb4 drivers/iommu/intel-iommu.c Jiang Liu 2014-02-19 671
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 672 return fls(mask);
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 673 }
6dd9a7c73761a8 drivers/pci/intel-iommu.c Youquan Song 2011-05-25 674
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 675 /* Some capabilities may be different across iommus */
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 676 static void domain_update_iommu_cap(struct dmar_domain *domain)
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 677 {
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 678 domain_update_iommu_coherency(domain);
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 679 domain->iommu_snooping = domain_update_iommu_snooping(NULL);
161f693460772e drivers/iommu/intel-iommu.c Jiang Liu 2014-07-11 680 domain->iommu_superpage = domain_update_iommu_superpage(NULL);
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 681 }
58c610bd1a3f50 drivers/pci/intel-iommu.c Sheng Yang 2009-03-18 682
26b86092c46503 drivers/iommu/intel-iommu.c Sohil Mehta 2018-09-11 683 struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
26b86092c46503 drivers/iommu/intel-iommu.c Sohil Mehta 2018-09-11 684 u8 devfn, int alloc)
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 685 {
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 686 struct root_entry *root = &iommu->root_entry[bus];
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 687 struct context_entry *context;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 688 u64 *entry;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 689
4df4eab168c1c4 drivers/iommu/intel-iommu.c Joerg Roedel 2015-08-25 690 entry = &root->lo;
765b6a98c1de3d drivers/iommu/intel-iommu.c Lu Baolu 2018-12-10 691 if (sm_supported(iommu)) {
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 692 if (devfn >= 0x80) {
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 693 devfn -= 0x80;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 694 entry = &root->hi;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 695 }
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 696 devfn *= 2;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 697 }
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 698 if (*entry & 1)
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 699 context = phys_to_virt(*entry & VTD_PAGE_MASK);
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 700 else {
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 701 unsigned long phy_addr;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 702 if (!alloc)
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 703 return NULL;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 704
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 705 context = alloc_pgtable_page(iommu->node);
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 706 if (!context)
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 707 return NULL;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 708
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 709 __iommu_flush_cache(iommu, (void *)context, CONTEXT_SIZE);
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 710 phy_addr = virt_to_phys((void *)context);
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 711 *entry = phy_addr | 1;
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 712 __iommu_flush_cache(iommu, entry, sizeof(*entry));
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 713 }
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 714 return &context[devfn];
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 715 }
03ecc32c527496 drivers/iommu/intel-iommu.c David Woodhouse 2015-02-13 716
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 717 static int iommu_dummy(struct device *dev)
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 718 {
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 719 return dev->archdata.iommu == DUMMY_DEVICE_DOMAIN_INFO;
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 720 }
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 721
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 722 /**
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 723 * is_downstream_to_pci_bridge - test if a device belongs to the PCI
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 724 * sub-hierarchy of a candidate PCI-PCI bridge
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 725 * @dev: candidate PCI device belonging to @bridge PCI sub-hierarchy
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 726 * @bridge: the candidate PCI-PCI bridge
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 727 *
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 728 * Return: true if @dev belongs to @bridge PCI sub-hierarchy, else false.
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 729 */
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 730 static bool
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 731 is_downstream_to_pci_bridge(struct device *dev, struct device *bridge)
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 732 {
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 733 struct pci_dev *pdev, *pbridge;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 734
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 735 if (!dev_is_pci(dev) || !dev_is_pci(bridge))
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 736 return false;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 737
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 738 pdev = to_pci_dev(dev);
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 739 pbridge = to_pci_dev(bridge);
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 740
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 741 if (pbridge->subordinate &&
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 742 pbridge->subordinate->number <= pdev->bus->number &&
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 743 pbridge->subordinate->busn_res.end >= pdev->bus->number)
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 744 return true;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 745
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 746 return false;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 747 }
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 748
156baca8d31e1a drivers/iommu/intel-iommu.c David Woodhouse 2014-03-09 749 static struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn)
c7151a8dfefd11 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 750 {
c7151a8dfefd11 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 751 struct dmar_drhd_unit *drhd = NULL;
b683b230a244c3 drivers/iommu/intel-iommu.c Jiang Liu 2014-02-19 752 struct intel_iommu *iommu;
156baca8d31e1a drivers/iommu/intel-iommu.c David Woodhouse 2014-03-09 753 struct device *tmp;
b9a7f9816483b1 drivers/iommu/intel-iommu.c Eric Auger 2019-06-03 754 struct pci_dev *pdev = NULL;
aa4d066a2a8041 drivers/iommu/intel-iommu.c Yijing Wang 2014-05-26 755 u16 segment = 0;
c7151a8dfefd11 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 @756 int i;
c7151a8dfefd11 drivers/pci/intel-iommu.c Weidong Han 2008-12-08 757
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 758 if (iommu_dummy(dev))
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 759 return NULL;
4ed6a540fab8ea drivers/iommu/intel-iommu.c David Woodhouse 2015-05-11 760
156baca8d31e1a drivers/iommu/intel-iommu.c David Woodhouse 2014-03-09 761 if (dev_is_pci(dev)) {
1c387188c60f53 drivers/iommu/intel-iommu.c Ashok Raj 2016-10-21 762 struct pci_dev *pf_pdev;
1c387188c60f53 drivers/iommu/intel-iommu.c Ashok Raj 2016-10-21 763
156baca8d31e1a drivers/iommu/intel-iommu.c David Woodhouse 2014-03-09 764 pdev = to_pci_dev(dev);
5823e330b58c52 drivers/iommu/intel-iommu.c Jon Derrick 2017-08-30 765
:::::: The code at line 622 was first introduced by commit
:::::: d05019608746240d86a406fbf8d8c1fc71a87101 iommu/vt-d: Be less pessimistic about domain coherency where possible
:::::: TO: David Woodhouse <dwmw2@infradead.org>
:::::: CC: David Woodhouse <David.Woodhouse@intel.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 29842 bytes --]
[-- Attachment #3: Type: text/plain, Size: 159 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
` (3 preceding siblings ...)
2019-09-09 11:00 ` [PATCH 4/6] drm/i915: Force compilation with intel-iommu for CI validation Chris Wilson
@ 2019-09-09 11:00 ` Chris Wilson
2019-09-10 10:42 ` Mika Kuoppala
` (2 more replies)
2019-09-09 11:00 ` [PATCH 6/6] iommu/intel: Ignore igfx_off Chris Wilson
` (2 subsequent siblings)
7 siblings, 3 replies; 17+ messages in thread
From: Chris Wilson @ 2019-09-09 11:00 UTC (permalink / raw)
To: intel-gfx; +Cc: Joerg Roedel, Lu Baolu
Despite the widespread and complete failure of Broadwell integrated
graphics when DMAR is enabled, known over the years, we have never been
able to root cause the issue. Instead, we let the failure undermine our
confidence in the iommu system itself when we should be pushing for it to
be always enabled. Quirk away Broadwell and remove the rotten apple.
References: https://bugs.freedesktop.org/show_bug.cgi?id=89360
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Martin Peres <martin.peres@linux.intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
---
drivers/iommu/intel-iommu.c | 44 +++++++++++++++++++++++++++++--------
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index c4e0e4a9ee9e..34f6a3d93ae2 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -5690,20 +5690,46 @@ const struct iommu_ops intel_iommu_ops = {
.pgsize_bitmap = INTEL_IOMMU_PGSIZES,
};
-static void quirk_iommu_g4x_gfx(struct pci_dev *dev)
+static void quirk_iommu_igfx(struct pci_dev *dev)
{
- /* G4x/GM45 integrated gfx dmar support is totally busted. */
pci_info(dev, "Disabling IOMMU for graphics on this chipset\n");
dmar_map_gfx = 0;
}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_g4x_gfx);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_g4x_gfx);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_g4x_gfx);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_g4x_gfx);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_g4x_gfx);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_g4x_gfx);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_g4x_gfx);
+/* G4x/GM45 integrated gfx dmar support is totally busted. */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_igfx);
+
+/* Broadwell igfx malfunctions with dmar */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1606, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160B, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160E, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1602, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160A, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160D, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1616, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161B, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161E, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1612, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161A, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161D, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1626, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162B, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162E, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1622, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162A, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162D, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1636, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163B, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163E, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1632, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163A, quirk_iommu_igfx);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163D, quirk_iommu_igfx);
static void quirk_iommu_rwbf(struct pci_dev *dev)
{
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu
2019-09-09 11:00 ` [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu Chris Wilson
@ 2019-09-10 10:42 ` Mika Kuoppala
2019-09-11 5:51 ` Lu Baolu
2019-09-11 10:38 ` Joerg Roedel
2 siblings, 0 replies; 17+ messages in thread
From: Mika Kuoppala @ 2019-09-10 10:42 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: Joerg Roedel, Lu Baolu
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Despite the widespread and complete failure of Broadwell integrated
> graphics when DMAR is enabled, known over the years, we have never been
> able to root cause the issue. Instead, we let the failure undermine our
> confidence in the iommu system itself when we should be pushing for it to
> be always enabled. Quirk away Broadwell and remove the rotten apple.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=89360
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Lu Baolu <baolu.lu@linux.intel.com>
> Cc: Martin Peres <martin.peres@linux.intel.com>
> Cc: Joerg Roedel <joro@8bytes.org>
As a first hand witness,
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/iommu/intel-iommu.c | 44 +++++++++++++++++++++++++++++--------
> 1 file changed, 35 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
> index c4e0e4a9ee9e..34f6a3d93ae2 100644
> --- a/drivers/iommu/intel-iommu.c
> +++ b/drivers/iommu/intel-iommu.c
> @@ -5690,20 +5690,46 @@ const struct iommu_ops intel_iommu_ops = {
> .pgsize_bitmap = INTEL_IOMMU_PGSIZES,
> };
>
> -static void quirk_iommu_g4x_gfx(struct pci_dev *dev)
> +static void quirk_iommu_igfx(struct pci_dev *dev)
> {
> - /* G4x/GM45 integrated gfx dmar support is totally busted. */
> pci_info(dev, "Disabling IOMMU for graphics on this chipset\n");
> dmar_map_gfx = 0;
> }
>
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_g4x_gfx);
> +/* G4x/GM45 integrated gfx dmar support is totally busted. */
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_igfx);
> +
> +/* Broadwell igfx malfunctions with dmar */
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1606, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160B, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160E, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1602, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160A, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160D, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1616, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161B, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161E, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1612, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161A, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161D, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1626, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162B, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162E, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1622, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162A, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162D, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1636, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163B, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163E, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1632, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163A, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163D, quirk_iommu_igfx);
>
> static void quirk_iommu_rwbf(struct pci_dev *dev)
> {
> --
> 2.23.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu
2019-09-09 11:00 ` [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu Chris Wilson
2019-09-10 10:42 ` Mika Kuoppala
@ 2019-09-11 5:51 ` Lu Baolu
2019-09-11 10:38 ` Joerg Roedel
2 siblings, 0 replies; 17+ messages in thread
From: Lu Baolu @ 2019-09-11 5:51 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: Joerg Roedel, baolu.lu
Hi,
On 9/9/19 7:00 PM, Chris Wilson wrote:
> Despite the widespread and complete failure of Broadwell integrated
> graphics when DMAR is enabled, known over the years, we have never been
> able to root cause the issue. Instead, we let the failure undermine our
> confidence in the iommu system itself when we should be pushing for it to
> be always enabled. Quirk away Broadwell and remove the rotten apple.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=89360
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Lu Baolu <baolu.lu@linux.intel.com>
This patch looks good to me.
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
-baolu
> Cc: Martin Peres <martin.peres@linux.intel.com>
> Cc: Joerg Roedel <joro@8bytes.org>
> ---
> drivers/iommu/intel-iommu.c | 44 +++++++++++++++++++++++++++++--------
> 1 file changed, 35 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
> index c4e0e4a9ee9e..34f6a3d93ae2 100644
> --- a/drivers/iommu/intel-iommu.c
> +++ b/drivers/iommu/intel-iommu.c
> @@ -5690,20 +5690,46 @@ const struct iommu_ops intel_iommu_ops = {
> .pgsize_bitmap = INTEL_IOMMU_PGSIZES,
> };
>
> -static void quirk_iommu_g4x_gfx(struct pci_dev *dev)
> +static void quirk_iommu_igfx(struct pci_dev *dev)
> {
> - /* G4x/GM45 integrated gfx dmar support is totally busted. */
> pci_info(dev, "Disabling IOMMU for graphics on this chipset\n");
> dmar_map_gfx = 0;
> }
>
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_g4x_gfx);
> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_g4x_gfx);
> +/* G4x/GM45 integrated gfx dmar support is totally busted. */
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_igfx);
> +
> +/* Broadwell igfx malfunctions with dmar */
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1606, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160B, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160E, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1602, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160A, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x160D, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1616, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161B, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161E, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1612, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161A, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x161D, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1626, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162B, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162E, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1622, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162A, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x162D, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1636, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163B, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163E, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1632, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163A, quirk_iommu_igfx);
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163D, quirk_iommu_igfx);
>
> static void quirk_iommu_rwbf(struct pci_dev *dev)
> {
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu
2019-09-09 11:00 ` [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu Chris Wilson
2019-09-10 10:42 ` Mika Kuoppala
2019-09-11 5:51 ` Lu Baolu
@ 2019-09-11 10:38 ` Joerg Roedel
2 siblings, 0 replies; 17+ messages in thread
From: Joerg Roedel @ 2019-09-11 10:38 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, Lu Baolu
On Mon, Sep 09, 2019 at 12:00:10PM +0100, Chris Wilson wrote:
> drivers/iommu/intel-iommu.c | 44 +++++++++++++++++++++++++++++--------
> 1 file changed, 35 insertions(+), 9 deletions(-)
Applied, thanks.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 6/6] iommu/intel: Ignore igfx_off
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
` (4 preceding siblings ...)
2019-09-09 11:00 ` [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu Chris Wilson
@ 2019-09-09 11:00 ` Chris Wilson
2019-09-09 16:07 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel Patchwork
2019-09-09 16:34 ` ✗ Fi.CI.BAT: failure " Patchwork
7 siblings, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2019-09-09 11:00 UTC (permalink / raw)
To: intel-gfx
---
drivers/iommu/intel-iommu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 34f6a3d93ae2..c98cdfd91691 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -439,8 +439,6 @@ static int __init intel_iommu_setup(char *str)
no_platform_optin = 1;
pr_info("IOMMU disabled\n");
} else if (!strncmp(str, "igfx_off", 8)) {
- dmar_map_gfx = 0;
- pr_info("Disable GFX device mapping\n");
} else if (!strncmp(str, "forcedac", 8)) {
pr_info("Forcing DAC for PCI devices\n");
dmar_forcedac = 1;
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
` (5 preceding siblings ...)
2019-09-09 11:00 ` [PATCH 6/6] iommu/intel: Ignore igfx_off Chris Wilson
@ 2019-09-09 16:07 ` Patchwork
2019-09-09 16:34 ` ✗ Fi.CI.BAT: failure " Patchwork
7 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-09-09 16:07 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel
URL : https://patchwork.freedesktop.org/series/66425/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7386b0ebc23c drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel
-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#13:
<4> [538.151825] WARNING: CPU: 0 PID: 11 at ./drivers/gpu/drm/i915/intel_runtime_pm.h:107 fwtable_read32+0x1be/0x300 [i915]
total: 0 errors, 1 warnings, 0 checks, 24 lines checked
e54488ac4cd7 drm/i915/selftests: Tighten the timeout testing for partial mmaps
-:128: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#128: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:169:
+static int check_partial_mappings(struct drm_i915_gem_object *obj,
const struct tile *tile,
-:266: WARNING:LINE_SPACING: Missing a blank line after declarations
#266: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:431:
+ intel_wakeref_t wakeref;
+ I915_RND_STATE(prng);
-:268: WARNING:LINE_SPACING: Missing a blank line after declarations
#268: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:433:
+ unsigned long count;
+ IGT_TIMEOUT(end);
-:285: WARNING:LONG_LINE: line over 100 characters
#285: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:450:
+ (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
total: 0 errors, 3 warnings, 1 checks, 327 lines checked
6be90a9b332d drm/i915: Perform GGTT restore much earlier during resume
186afc9aaa54 drm/i915: Force compilation with intel-iommu for CI validation
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 8 lines checked
0462ef926b65 iommu/intel: Declare Broadwell igfx dmar support snafu
c0df1c601b3c iommu/intel: Ignore igfx_off
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:19: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)
total: 1 errors, 1 warnings, 0 checks, 8 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread* ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
` (6 preceding siblings ...)
2019-09-09 16:07 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel Patchwork
@ 2019-09-09 16:34 ` Patchwork
7 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-09-09 16:34 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel
URL : https://patchwork.freedesktop.org/series/66425/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6854 -> Patchwork_14326
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14326 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14326, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14326/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14326:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_gttfill@basic:
- fi-apl-guc: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6854/fi-apl-guc/igt@gem_exec_gttfill@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14326/fi-apl-guc/igt@gem_exec_gttfill@basic.html
Known issues
------------
Here are the changes found in Patchwork_14326 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@gem_ctx_switch@legacy-render:
- fi-icl-u2: [INCOMPLETE][3] ([fdo#107713] / [fdo#111381]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6854/fi-icl-u2/igt@gem_ctx_switch@legacy-render.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14326/fi-icl-u2/igt@gem_ctx_switch@legacy-render.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
Participating hosts (51 -> 46)
------------------------------
Additional (3): fi-icl-dsi fi-cfl-guc fi-icl-u3
Missing (8): fi-ilk-m540 fi-tgl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6854 -> Patchwork_14326
CI-20190529: 20190529
CI_DRM_6854: 5a70800ed2837e2d35a331e2cfd43a55df58c4fc @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5176: 0102dcf4e2e8b357b59173fe1ff78069148080c6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14326: c0df1c601b3cffed51bfebf09ddeeea08ff26fb2 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c0df1c601b3c iommu/intel: Ignore igfx_off
0462ef926b65 iommu/intel: Declare Broadwell igfx dmar support snafu
186afc9aaa54 drm/i915: Force compilation with intel-iommu for CI validation
6be90a9b332d drm/i915: Perform GGTT restore much earlier during resume
e54488ac4cd7 drm/i915/selftests: Tighten the timeout testing for partial mmaps
7386b0ebc23c drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14326/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread