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From: Rob Herring <robh@kernel.org>
To: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	ludovic.desroches@microchip.com, linus.walleij@linaro.org,
	nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com,
	claudiu.beznea@microchip.com
Subject: Re: [PATCH] pinctrl: at91: Enable slewrate by default on SAM9X60
Date: Tue, 29 Oct 2019 16:37:57 -0500	[thread overview]
Message-ID: <20191029213757.GA8829@bogus> (raw)
In-Reply-To: <20191024172234.5267-1-codrin.ciubotariu@microchip.com>

On Thu, Oct 24, 2019 at 08:22:34PM +0300, Codrin Ciubotariu wrote:
> On SAM9X60, slewrate should be enabled on pins with a switching frequency
> below 50Mhz. Since most of our pins do not exceed this value, we enable
> slewrate by default. Pins with a switching value that exceeds 50Mhz will
> have to explicitly disable slewrate.
> 
> Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> ---
>  drivers/pinctrl/pinctrl-at91.c     | 4 ++--
>  include/dt-bindings/pinctrl/at91.h | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
> index 117075b5798f..c135149e84e9 100644
> --- a/drivers/pinctrl/pinctrl-at91.c
> +++ b/drivers/pinctrl/pinctrl-at91.c
> @@ -85,8 +85,8 @@ enum drive_strength_bit {
>  					 DRIVE_STRENGTH_SHIFT)
>  
>  enum slewrate_bit {
> -	SLEWRATE_BIT_DIS,
>  	SLEWRATE_BIT_ENA,
> +	SLEWRATE_BIT_DIS,
>  };
>  
>  #define SLEWRATE_BIT_MSK(name)		(SLEWRATE_BIT_##name << SLEWRATE_SHIFT)
> @@ -669,7 +669,7 @@ static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
>  {
>  	unsigned int tmp;
>  
> -	if (setting < SLEWRATE_BIT_DIS || setting > SLEWRATE_BIT_ENA)
> +	if (setting < SLEWRATE_BIT_ENA || setting > SLEWRATE_BIT_DIS)
>  		return;
>  
>  	tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
> diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
> index 3831f91fb3ba..e8e117306b1b 100644
> --- a/include/dt-bindings/pinctrl/at91.h
> +++ b/include/dt-bindings/pinctrl/at91.h
> @@ -27,8 +27,8 @@
>  #define AT91_PINCTRL_DRIVE_STRENGTH_MED			(0x2 << 5)
>  #define AT91_PINCTRL_DRIVE_STRENGTH_HI			(0x3 << 5)
>  
> -#define AT91_PINCTRL_SLEWRATE_DIS	(0x0 << 9)
> -#define AT91_PINCTRL_SLEWRATE_ENA	(0x1 << 9)
> +#define AT91_PINCTRL_SLEWRATE_ENA	(0x0 << 9)
> +#define AT91_PINCTRL_SLEWRATE_DIS	(0x1 << 9)

This is an ABI. You can't just change the definition.

Rob

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Cc: devicetree@vger.kernel.org, alexandre.belloni@bootlin.com,
	linus.walleij@linaro.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org, ludovic.desroches@microchip.com,
	claudiu.beznea@microchip.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] pinctrl: at91: Enable slewrate by default on SAM9X60
Date: Tue, 29 Oct 2019 16:37:57 -0500	[thread overview]
Message-ID: <20191029213757.GA8829@bogus> (raw)
In-Reply-To: <20191024172234.5267-1-codrin.ciubotariu@microchip.com>

On Thu, Oct 24, 2019 at 08:22:34PM +0300, Codrin Ciubotariu wrote:
> On SAM9X60, slewrate should be enabled on pins with a switching frequency
> below 50Mhz. Since most of our pins do not exceed this value, we enable
> slewrate by default. Pins with a switching value that exceeds 50Mhz will
> have to explicitly disable slewrate.
> 
> Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> ---
>  drivers/pinctrl/pinctrl-at91.c     | 4 ++--
>  include/dt-bindings/pinctrl/at91.h | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
> index 117075b5798f..c135149e84e9 100644
> --- a/drivers/pinctrl/pinctrl-at91.c
> +++ b/drivers/pinctrl/pinctrl-at91.c
> @@ -85,8 +85,8 @@ enum drive_strength_bit {
>  					 DRIVE_STRENGTH_SHIFT)
>  
>  enum slewrate_bit {
> -	SLEWRATE_BIT_DIS,
>  	SLEWRATE_BIT_ENA,
> +	SLEWRATE_BIT_DIS,
>  };
>  
>  #define SLEWRATE_BIT_MSK(name)		(SLEWRATE_BIT_##name << SLEWRATE_SHIFT)
> @@ -669,7 +669,7 @@ static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
>  {
>  	unsigned int tmp;
>  
> -	if (setting < SLEWRATE_BIT_DIS || setting > SLEWRATE_BIT_ENA)
> +	if (setting < SLEWRATE_BIT_ENA || setting > SLEWRATE_BIT_DIS)
>  		return;
>  
>  	tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
> diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
> index 3831f91fb3ba..e8e117306b1b 100644
> --- a/include/dt-bindings/pinctrl/at91.h
> +++ b/include/dt-bindings/pinctrl/at91.h
> @@ -27,8 +27,8 @@
>  #define AT91_PINCTRL_DRIVE_STRENGTH_MED			(0x2 << 5)
>  #define AT91_PINCTRL_DRIVE_STRENGTH_HI			(0x3 << 5)
>  
> -#define AT91_PINCTRL_SLEWRATE_DIS	(0x0 << 9)
> -#define AT91_PINCTRL_SLEWRATE_ENA	(0x1 << 9)
> +#define AT91_PINCTRL_SLEWRATE_ENA	(0x0 << 9)
> +#define AT91_PINCTRL_SLEWRATE_DIS	(0x1 << 9)

This is an ABI. You can't just change the definition.

Rob

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linux-arm-kernel@lists.infradead.org
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  reply	other threads:[~2019-10-29 21:38 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-24 17:22 [PATCH] pinctrl: at91: Enable slewrate by default on SAM9X60 Codrin Ciubotariu
2019-10-24 17:22 ` Codrin Ciubotariu
2019-10-29 21:37 ` Rob Herring [this message]
2019-10-29 21:37   ` Rob Herring
2019-10-30  8:53   ` Ludovic Desroches
2019-10-30  8:53     ` Ludovic Desroches
2019-10-30 13:15     ` Rob Herring
2019-10-30 13:15       ` Rob Herring

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