From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
Andres Rodriguez <andresx7@gmail.com>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 6/8] drm/edid: Add a FIXME about DispID CEA data block revision
Date: Tue, 4 Feb 2020 15:32:12 +0200 [thread overview]
Message-ID: <20200204133212.GI13686@intel.com> (raw)
In-Reply-To: <E7C9878FBA1C6D42A1CA3F62AEB6945F823AA020@BGSMSX104.gar.corp.intel.com>
On Mon, Feb 03, 2020 at 08:15:51PM +0000, Shankar, Uma wrote:
>
>
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> > Sent: Saturday, January 25, 2020 1:32 AM
> > To: dri-devel@lists.freedesktop.org
> > Cc: intel-gfx@lists.freedesktop.org; Andres Rodriguez <andresx7@gmail.com>
> > Subject: [Intel-gfx] [PATCH 6/8] drm/edid: Add a FIXME about DispID CEA data block
> > revision
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > I don't understand what the DispID CEA data block revision means. The spec doesn't
> > say. I guess some DispID must have a value of >= 3 in there or else we generally
> > wouldn't even parse the CEA data blocks. Or does all this code actually not do
> > anything?
>
> This signifies the CTA extension revision (byte 1 of the block). As per the spec, seems like
> Version 1 is legacy and 2 is deprecated. So version >=3 is checked here.
> Refer section 7.3 of CTA-861-G
The confusion is about the revision field in the DispID CTA
block, not in the CTA extension block.
>
> > Cc: Andres Rodriguez <andresx7@gmail.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/drm_edid.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index
> > 0369a54e3d32..fd9b724067a7 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -3977,6 +3977,13 @@ cea_db_tag(const u8 *db) static int cea_revision(const
> > u8 *cea) {
> > + /*
> > + * FIXME is this correct for the DispID variant?
> > + * The DispID spec doesn't really specify whether
> > + * this is the revision of the CEA extension or
> > + * the DispID CEA data block. And the only value
> > + * given as an example is 0.
> > + */
> > return cea[1];
> > }
> >
> > --
> > 2.24.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
Andres Rodriguez <andresx7@gmail.com>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 6/8] drm/edid: Add a FIXME about DispID CEA data block revision
Date: Tue, 4 Feb 2020 15:32:12 +0200 [thread overview]
Message-ID: <20200204133212.GI13686@intel.com> (raw)
In-Reply-To: <E7C9878FBA1C6D42A1CA3F62AEB6945F823AA020@BGSMSX104.gar.corp.intel.com>
On Mon, Feb 03, 2020 at 08:15:51PM +0000, Shankar, Uma wrote:
>
>
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> > Sent: Saturday, January 25, 2020 1:32 AM
> > To: dri-devel@lists.freedesktop.org
> > Cc: intel-gfx@lists.freedesktop.org; Andres Rodriguez <andresx7@gmail.com>
> > Subject: [Intel-gfx] [PATCH 6/8] drm/edid: Add a FIXME about DispID CEA data block
> > revision
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > I don't understand what the DispID CEA data block revision means. The spec doesn't
> > say. I guess some DispID must have a value of >= 3 in there or else we generally
> > wouldn't even parse the CEA data blocks. Or does all this code actually not do
> > anything?
>
> This signifies the CTA extension revision (byte 1 of the block). As per the spec, seems like
> Version 1 is legacy and 2 is deprecated. So version >=3 is checked here.
> Refer section 7.3 of CTA-861-G
The confusion is about the revision field in the DispID CTA
block, not in the CTA extension block.
>
> > Cc: Andres Rodriguez <andresx7@gmail.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/drm_edid.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index
> > 0369a54e3d32..fd9b724067a7 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -3977,6 +3977,13 @@ cea_db_tag(const u8 *db) static int cea_revision(const
> > u8 *cea) {
> > + /*
> > + * FIXME is this correct for the DispID variant?
> > + * The DispID spec doesn't really specify whether
> > + * this is the revision of the CEA extension or
> > + * the DispID CEA data block. And the only value
> > + * given as an example is 0.
> > + */
> > return cea[1];
> > }
> >
> > --
> > 2.24.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-02-04 13:32 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-24 20:02 [PATCH 1/8] drm/edid: Check the number of detailed timing descriptors in the CEA ext block Ville Syrjala
2020-01-24 20:02 ` [Intel-gfx] " Ville Syrjala
2020-01-24 20:02 ` [PATCH 2/8] drm/edid: Don't accept any old garbage as a display descriptor Ville Syrjala
2020-01-24 20:02 ` [Intel-gfx] " Ville Syrjala
2020-01-27 22:35 ` Alex Deucher
2020-01-27 22:35 ` [Intel-gfx] " Alex Deucher
2020-02-03 19:44 ` Shankar, Uma
2020-02-03 19:44 ` Shankar, Uma
2020-01-24 20:02 ` [PATCH 3/8] drm/edid: Introduce is_detailed_timing_descritor() Ville Syrjala
2020-01-24 20:02 ` [Intel-gfx] " Ville Syrjala
2020-01-27 22:36 ` Alex Deucher
2020-01-27 22:36 ` [Intel-gfx] " Alex Deucher
2020-02-03 19:49 ` Shankar, Uma
2020-02-03 19:49 ` Shankar, Uma
2020-01-24 20:02 ` [PATCH 4/8] drm/i915: Clear out spurious whitespace Ville Syrjala
2020-01-24 20:02 ` [Intel-gfx] " Ville Syrjala
2020-01-27 22:28 ` Alex Deucher
2020-01-27 22:28 ` [Intel-gfx] " Alex Deucher
2020-02-03 19:51 ` Shankar, Uma
2020-02-03 19:51 ` Shankar, Uma
2020-01-24 20:02 ` [PATCH 5/8] drm/edid: Document why we don't bounds check the DispID CEA block start/end Ville Syrjala
2020-01-24 20:02 ` [Intel-gfx] " Ville Syrjala
2020-01-27 22:30 ` Alex Deucher
2020-01-27 22:30 ` [Intel-gfx] " Alex Deucher
2020-01-28 11:44 ` Ville Syrjälä
2020-01-28 11:44 ` [Intel-gfx] " Ville Syrjälä
2020-02-03 19:58 ` Shankar, Uma
2020-02-03 19:58 ` [Intel-gfx] " Shankar, Uma
2020-01-24 20:02 ` [PATCH 6/8] drm/edid: Add a FIXME about DispID CEA data block revision Ville Syrjala
2020-01-24 20:02 ` [Intel-gfx] " Ville Syrjala
2020-01-27 22:32 ` Alex Deucher
2020-01-27 22:32 ` [Intel-gfx] " Alex Deucher
2020-02-03 20:15 ` Shankar, Uma
2020-02-03 20:15 ` Shankar, Uma
2020-02-04 13:32 ` Ville Syrjälä [this message]
2020-02-04 13:32 ` Ville Syrjälä
2020-02-04 14:57 ` Shankar, Uma
2020-02-04 14:57 ` Shankar, Uma
2020-01-24 20:02 ` [PATCH 7/8] drm/edid: Constify lots of things Ville Syrjala
2020-01-24 20:02 ` [Intel-gfx] " Ville Syrjala
2020-01-27 22:38 ` Alex Deucher
2020-01-27 22:38 ` [Intel-gfx] " Alex Deucher
2020-01-28 11:49 ` Ville Syrjälä
2020-01-28 11:49 ` [Intel-gfx] " Ville Syrjälä
2020-02-03 20:34 ` Shankar, Uma
2020-02-03 20:34 ` Shankar, Uma
2020-01-24 20:02 ` [PATCH 8/8] drm/edid: Dump bogus 18 byte descriptors Ville Syrjala
2020-01-24 20:02 ` [Intel-gfx] " Ville Syrjala
2020-01-27 22:38 ` Alex Deucher
2020-01-27 22:38 ` [Intel-gfx] " Alex Deucher
2020-02-03 20:38 ` Shankar, Uma
2020-02-03 20:38 ` Shankar, Uma
2020-01-24 22:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/8] drm/edid: Check the number of detailed timing descriptors in the CEA ext block Patchwork
2020-01-24 23:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-01-27 13:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-01-27 22:34 ` [PATCH 1/8] " Alex Deucher
2020-01-27 22:34 ` [Intel-gfx] " Alex Deucher
2020-02-03 19:15 ` Shankar, Uma
2020-02-03 19:15 ` [Intel-gfx] " Shankar, Uma
2020-01-28 15:17 ` Daniel Vetter
2020-01-28 15:17 ` [Intel-gfx] " Daniel Vetter
2020-01-28 16:15 ` Ville Syrjälä
2020-01-28 16:15 ` [Intel-gfx] " Ville Syrjälä
2020-01-28 16:18 ` Daniel Vetter
2020-01-28 16:18 ` [Intel-gfx] " Daniel Vetter
2020-01-28 16:28 ` Ville Syrjälä
2020-01-28 16:28 ` [Intel-gfx] " Ville Syrjälä
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