* Re: [Intel-gfx] [PATCH v2 0/6] 3 display pipes combination system support [not found] ` <20200207161531.GL13686@intel.com> @ 2020-02-11 16:09 ` Anshuman Gupta 2020-02-11 16:26 ` Ville Syrjälä 0 siblings, 1 reply; 5+ messages in thread From: Anshuman Gupta @ 2020-02-11 16:09 UTC (permalink / raw) To: Ville Syrjälä; +Cc: jani.nikula, intel-gfx On 2020-02-07 at 18:15:31 +0200, Ville Syrjälä wrote: > On Fri, Feb 07, 2020 at 07:50:36PM +0530, Anshuman Gupta wrote: > > Updated version after rebase and fixing few comments. > > > > Anshuman Gupta (6): > > drm/i915: Iterate over pipe and skip the disabled one > > drm/i915: Remove (pipe == crtc->index) assumption > > drm/i915: Fix broken transcoder err state > > drm/i915: Fix wrongly populated plane possible_crtcs bit mask > > drm/i915: Get right max plane stride > > drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() > > Another broken thing I realized recently is due to my > commit ee34801cc0e8 ("drm/i915: Prefer to use the pipe to index the ddb > entries") > > We either need to revert that or always pass s/num_pipes/I915_MAX_PIPES/ > to skl_ddb_allocation_overlaps() in skl_commit_modeset_enables(). > The latter may be nicer since I don't really want that silly 'i' > usage back. Can you cook up a patch like that as well? AFAIU entries[] may have holes inside it as its size is I915_MAX_PIPES, though these holes are already initialized with zero and will not harm skl_ddb_allocation_overlaps, is it good a idea to avoid these hole as ignore_index bit mask ? Thanks , Anshuman Gupta. > > > > > drivers/gpu/drm/i915/display/intel_display.c | 31 +++++++++++--- > > drivers/gpu/drm/i915/display/intel_display.h | 5 ++- > > .../drm/i915/display/intel_display_types.h | 12 +++++- > > drivers/gpu/drm/i915/display/intel_sprite.c | 5 +-- > > drivers/gpu/drm/i915/i915_irq.c | 40 ++++++++++++++----- > > 5 files changed, 71 insertions(+), 22 deletions(-) > > > > -- > > 2.24.0 > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH v2 0/6] 3 display pipes combination system support 2020-02-11 16:09 ` [Intel-gfx] [PATCH v2 0/6] 3 display pipes combination system support Anshuman Gupta @ 2020-02-11 16:26 ` Ville Syrjälä 2020-02-11 17:04 ` Anshuman Gupta 0 siblings, 1 reply; 5+ messages in thread From: Ville Syrjälä @ 2020-02-11 16:26 UTC (permalink / raw) To: Anshuman Gupta; +Cc: jani.nikula, intel-gfx On Tue, Feb 11, 2020 at 09:39:37PM +0530, Anshuman Gupta wrote: > On 2020-02-07 at 18:15:31 +0200, Ville Syrjälä wrote: > > On Fri, Feb 07, 2020 at 07:50:36PM +0530, Anshuman Gupta wrote: > > > Updated version after rebase and fixing few comments. > > > > > > Anshuman Gupta (6): > > > drm/i915: Iterate over pipe and skip the disabled one > > > drm/i915: Remove (pipe == crtc->index) assumption > > > drm/i915: Fix broken transcoder err state > > > drm/i915: Fix wrongly populated plane possible_crtcs bit mask > > > drm/i915: Get right max plane stride > > > drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() > > > > Another broken thing I realized recently is due to my > > commit ee34801cc0e8 ("drm/i915: Prefer to use the pipe to index the ddb > > entries") > > > > We either need to revert that or always pass s/num_pipes/I915_MAX_PIPES/ > > to skl_ddb_allocation_overlaps() in skl_commit_modeset_enables(). > > The latter may be nicer since I don't really want that silly 'i' > > usage back. Can you cook up a patch like that as well? > AFAIU entries[] may have holes inside it as its size is I915_MAX_PIPES, > though these holes are already initialized with zero and will not harm > skl_ddb_allocation_overlaps, is it good a idea to avoid these hole > as ignore_index bit mask ? skl_ddb_entries_overlap() should just ignore empty allocations. And that will anyway happen for any pipe that is not active. So we don't have to worry about any holes. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH v2 0/6] 3 display pipes combination system support 2020-02-11 16:26 ` Ville Syrjälä @ 2020-02-11 17:04 ` Anshuman Gupta 0 siblings, 0 replies; 5+ messages in thread From: Anshuman Gupta @ 2020-02-11 17:04 UTC (permalink / raw) To: Ville Syrjälä; +Cc: jani.nikula, intel-gfx On 2020-02-11 at 18:26:13 +0200, Ville Syrjälä wrote: > On Tue, Feb 11, 2020 at 09:39:37PM +0530, Anshuman Gupta wrote: > > On 2020-02-07 at 18:15:31 +0200, Ville Syrjälä wrote: > > > On Fri, Feb 07, 2020 at 07:50:36PM +0530, Anshuman Gupta wrote: > > > > Updated version after rebase and fixing few comments. > > > > > > > > Anshuman Gupta (6): > > > > drm/i915: Iterate over pipe and skip the disabled one > > > > drm/i915: Remove (pipe == crtc->index) assumption > > > > drm/i915: Fix broken transcoder err state > > > > drm/i915: Fix wrongly populated plane possible_crtcs bit mask > > > > drm/i915: Get right max plane stride > > > > drm/i915: Add WARN_ON in intel_get_crtc_for_pipe() > > > > > > Another broken thing I realized recently is due to my > > > commit ee34801cc0e8 ("drm/i915: Prefer to use the pipe to index the ddb > > > entries") > > > > > > We either need to revert that or always pass s/num_pipes/I915_MAX_PIPES/ > > > to skl_ddb_allocation_overlaps() in skl_commit_modeset_enables(). > > > The latter may be nicer since I don't really want that silly 'i' > > > usage back. Can you cook up a patch like that as well? > > AFAIU entries[] may have holes inside it as its size is I915_MAX_PIPES, > > though these holes are already initialized with zero and will not harm > > skl_ddb_allocation_overlaps, is it good a idea to avoid these hole > > as ignore_index bit mask ? > > skl_ddb_entries_overlap() should just ignore empty allocations. > And that will anyway happen for any pipe that is not active. So we > don't have to worry about any holes. Thanks Ville for explanation. Thanks, Anshuman Gupta. > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <20200207142042.19689-2-anshuman.gupta@intel.com>]
[parent not found: <20200207144753.GH13686@intel.com>]
* Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: Iterate over pipe and skip the disabled one [not found] ` <20200207144753.GH13686@intel.com> @ 2020-02-18 17:53 ` Anshuman Gupta 2020-02-19 13:15 ` Ville Syrjälä 0 siblings, 1 reply; 5+ messages in thread From: Anshuman Gupta @ 2020-02-18 17:53 UTC (permalink / raw) To: Ville Syrjälä; +Cc: jani.nikula, intel-gfx On 2020-02-07 at 16:47:53 +0200, Ville Syrjälä wrote: > On Fri, Feb 07, 2020 at 07:50:37PM +0530, Anshuman Gupta wrote: > > It should not be assumed that a disabled display pipe will be > > always last the pipe. > > for_each_pipe() should iterate over I915_MAX_PIPES and check > > for the disabled pipe and skip that pipe so that it should not > > initialize the intel crtc for any disabled pipes. > > > > Below compilation error require to be handle due to change in > > for_each_pipe() macro. > > "suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]" > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_display.h | 5 +++-- > > drivers/gpu/drm/i915/i915_irq.c | 6 ++++-- > > 2 files changed, 7 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h > > index 75438a136d58..7a531e485b53 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.h > > +++ b/drivers/gpu/drm/i915/display/intel_display.h > > @@ -313,10 +313,11 @@ enum phy_fia { > > }; > > > > #define for_each_pipe(__dev_priv, __p) \ > > - for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) > > + for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \ > > + for_each_if((INTEL_INFO(__dev_priv)->pipe_mask) & BIT(__p)) > > Don't need the parens around the (->pipe_mask) Thanks for review i will address this. > > > > > #define for_each_pipe_masked(__dev_priv, __p, __mask) \ > > - for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \ > > + for_each_pipe(__dev_priv, __p) \ > > for_each_if((__mask) & BIT(__p)) > > Shouldn't this one still consult the pipe_mask? There's no reason to > assume that the caller bothered to filter the mask it passed in. AFAIU current caller is interested to init the pipe {IIR,IMR,IER} for the passed mask. Please correct me if i am wrong here. Thanks, Anshuman Gupta. > > > > > #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \ > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > > index 3d0cd0960bd2..a26f2bf1b6ea 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -1739,11 +1739,12 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) > > if (pch_iir & SDE_POISON) > > drm_err(&dev_priv->drm, "PCH poison interrupt\n"); > > > > - if (pch_iir & SDE_FDI_MASK) > > + if (pch_iir & SDE_FDI_MASK) { > > for_each_pipe(dev_priv, pipe) > > drm_dbg(&dev_priv->drm, " pipe %c FDI IIR: 0x%08x\n", > > pipe_name(pipe), > > I915_READ(FDI_RX_IIR(pipe))); > > + } > > > > if (pch_iir & (SDE_TRANSB_CRC_DONE | SDE_TRANSA_CRC_DONE)) > > drm_dbg(&dev_priv->drm, "PCH transcoder CRC done interrupt\n"); > > @@ -1823,11 +1824,12 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) > > if (pch_iir & SDE_AUDIO_CP_CHG_CPT) > > drm_dbg(&dev_priv->drm, "Audio CP change interrupt\n"); > > > > - if (pch_iir & SDE_FDI_MASK_CPT) > > + if (pch_iir & SDE_FDI_MASK_CPT) { > > for_each_pipe(dev_priv, pipe) > > drm_dbg(&dev_priv->drm, " pipe %c FDI IIR: 0x%08x\n", > > pipe_name(pipe), > > I915_READ(FDI_RX_IIR(pipe))); > > + } > > > > if (pch_iir & SDE_ERROR_CPT) > > cpt_serr_int_handler(dev_priv); > > -- > > 2.24.0 > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: Iterate over pipe and skip the disabled one 2020-02-18 17:53 ` [Intel-gfx] [PATCH v2 1/6] drm/i915: Iterate over pipe and skip the disabled one Anshuman Gupta @ 2020-02-19 13:15 ` Ville Syrjälä 0 siblings, 0 replies; 5+ messages in thread From: Ville Syrjälä @ 2020-02-19 13:15 UTC (permalink / raw) To: Anshuman Gupta; +Cc: jani.nikula, intel-gfx On Tue, Feb 18, 2020 at 11:23:43PM +0530, Anshuman Gupta wrote: > On 2020-02-07 at 16:47:53 +0200, Ville Syrjälä wrote: > > On Fri, Feb 07, 2020 at 07:50:37PM +0530, Anshuman Gupta wrote: > > > It should not be assumed that a disabled display pipe will be > > > always last the pipe. > > > for_each_pipe() should iterate over I915_MAX_PIPES and check > > > for the disabled pipe and skip that pipe so that it should not > > > initialize the intel crtc for any disabled pipes. > > > > > > Below compilation error require to be handle due to change in > > > for_each_pipe() macro. > > > "suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]" > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> > > > --- > > > drivers/gpu/drm/i915/display/intel_display.h | 5 +++-- > > > drivers/gpu/drm/i915/i915_irq.c | 6 ++++-- > > > 2 files changed, 7 insertions(+), 4 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h > > > index 75438a136d58..7a531e485b53 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display.h > > > +++ b/drivers/gpu/drm/i915/display/intel_display.h > > > @@ -313,10 +313,11 @@ enum phy_fia { > > > }; > > > > > > #define for_each_pipe(__dev_priv, __p) \ > > > - for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) > > > + for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \ > > > + for_each_if((INTEL_INFO(__dev_priv)->pipe_mask) & BIT(__p)) > > > > Don't need the parens around the (->pipe_mask) > Thanks for review i will address this. > > > > > > > > #define for_each_pipe_masked(__dev_priv, __p, __mask) \ > > > - for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \ > > > + for_each_pipe(__dev_priv, __p) \ > > > for_each_if((__mask) & BIT(__p)) > > > > Shouldn't this one still consult the pipe_mask? There's no reason to > > assume that the caller bothered to filter the mask it passed in. > AFAIU current caller is interested to init the pipe {IIR,IMR,IER} > for the passed mask. Please correct me if i am wrong > here. This was just me not noticing that you used for_each_pipe() here, which does account for the pipe_mask already. Mea culpa. > Thanks, > Anshuman Gupta. > > > > > > > > #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \ > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > > > index 3d0cd0960bd2..a26f2bf1b6ea 100644 > > > --- a/drivers/gpu/drm/i915/i915_irq.c > > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > > @@ -1739,11 +1739,12 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) > > > if (pch_iir & SDE_POISON) > > > drm_err(&dev_priv->drm, "PCH poison interrupt\n"); > > > > > > - if (pch_iir & SDE_FDI_MASK) > > > + if (pch_iir & SDE_FDI_MASK) { > > > for_each_pipe(dev_priv, pipe) > > > drm_dbg(&dev_priv->drm, " pipe %c FDI IIR: 0x%08x\n", > > > pipe_name(pipe), > > > I915_READ(FDI_RX_IIR(pipe))); > > > + } > > > > > > if (pch_iir & (SDE_TRANSB_CRC_DONE | SDE_TRANSA_CRC_DONE)) > > > drm_dbg(&dev_priv->drm, "PCH transcoder CRC done interrupt\n"); > > > @@ -1823,11 +1824,12 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) > > > if (pch_iir & SDE_AUDIO_CP_CHG_CPT) > > > drm_dbg(&dev_priv->drm, "Audio CP change interrupt\n"); > > > > > > - if (pch_iir & SDE_FDI_MASK_CPT) > > > + if (pch_iir & SDE_FDI_MASK_CPT) { > > > for_each_pipe(dev_priv, pipe) > > > drm_dbg(&dev_priv->drm, " pipe %c FDI IIR: 0x%08x\n", > > > pipe_name(pipe), > > > I915_READ(FDI_RX_IIR(pipe))); > > > + } > > > > > > if (pch_iir & SDE_ERROR_CPT) > > > cpt_serr_int_handler(dev_priv); > > > -- > > > 2.24.0 > > > > -- > > Ville Syrjälä > > Intel -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
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[not found] <20200207142042.19689-1-anshuman.gupta@intel.com>
[not found] ` <20200207161531.GL13686@intel.com>
2020-02-11 16:09 ` [Intel-gfx] [PATCH v2 0/6] 3 display pipes combination system support Anshuman Gupta
2020-02-11 16:26 ` Ville Syrjälä
2020-02-11 17:04 ` Anshuman Gupta
[not found] ` <20200207142042.19689-2-anshuman.gupta@intel.com>
[not found] ` <20200207144753.GH13686@intel.com>
2020-02-18 17:53 ` [Intel-gfx] [PATCH v2 1/6] drm/i915: Iterate over pipe and skip the disabled one Anshuman Gupta
2020-02-19 13:15 ` Ville Syrjälä
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