From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Shengjiu Wang <shengjiu.wang@nxp.com>
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, linuxppc-dev@lists.ozlabs.org,
tiwai@suse.com, lgirdwood@gmail.com, broonie@kernel.org,
festevam@gmail.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] ASoC: fsl_sai: Clean code for synchronous mode
Date: Tue, 4 Aug 2020 20:43:00 -0700 [thread overview]
Message-ID: <20200805034300.GA10174@Asurada-Nvidia> (raw)
In-Reply-To: <1596594233-13489-2-git-send-email-shengjiu.wang@nxp.com>
On Wed, Aug 05, 2020 at 10:23:52AM +0800, Shengjiu Wang wrote:
> Tx synchronous with Rx: The RMR is the word mask register, it is used
> to mask any word in the frame, it is not relating to clock generation,
> So it is no need to be changed when Tx is going to be enabled.
>
> Rx synchronous with Tx: The TMR is the word mask register, it is used
> to mask any word in the frame, it is not relating to clock generation,
> So it is no need to be changed when Rx is going to be enabled.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Can you rename the PATCH subject to something more specific?
For example, "Drop TMR/RMR settings for synchronous mode".
Please add this once it's addressed:
Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com>
WARNING: multiple messages have this Message-ID (diff)
From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Shengjiu Wang <shengjiu.wang@nxp.com>
Cc: alsa-devel@alsa-project.org, timur@kernel.org,
Xiubo.Lee@gmail.com, linuxppc-dev@lists.ozlabs.org,
tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz,
broonie@kernel.org, festevam@gmail.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] ASoC: fsl_sai: Clean code for synchronous mode
Date: Tue, 4 Aug 2020 20:43:00 -0700 [thread overview]
Message-ID: <20200805034300.GA10174@Asurada-Nvidia> (raw)
In-Reply-To: <1596594233-13489-2-git-send-email-shengjiu.wang@nxp.com>
On Wed, Aug 05, 2020 at 10:23:52AM +0800, Shengjiu Wang wrote:
> Tx synchronous with Rx: The RMR is the word mask register, it is used
> to mask any word in the frame, it is not relating to clock generation,
> So it is no need to be changed when Tx is going to be enabled.
>
> Rx synchronous with Tx: The TMR is the word mask register, it is used
> to mask any word in the frame, it is not relating to clock generation,
> So it is no need to be changed when Rx is going to be enabled.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Can you rename the PATCH subject to something more specific?
For example, "Drop TMR/RMR settings for synchronous mode".
Please add this once it's addressed:
Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com>
WARNING: multiple messages have this Message-ID (diff)
From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Shengjiu Wang <shengjiu.wang@nxp.com>
Cc: timur@kernel.org, Xiubo.Lee@gmail.com, festevam@gmail.com,
lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz,
tiwai@suse.com, alsa-devel@alsa-project.org,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] ASoC: fsl_sai: Clean code for synchronous mode
Date: Tue, 4 Aug 2020 20:43:00 -0700 [thread overview]
Message-ID: <20200805034300.GA10174@Asurada-Nvidia> (raw)
In-Reply-To: <1596594233-13489-2-git-send-email-shengjiu.wang@nxp.com>
On Wed, Aug 05, 2020 at 10:23:52AM +0800, Shengjiu Wang wrote:
> Tx synchronous with Rx: The RMR is the word mask register, it is used
> to mask any word in the frame, it is not relating to clock generation,
> So it is no need to be changed when Tx is going to be enabled.
>
> Rx synchronous with Tx: The TMR is the word mask register, it is used
> to mask any word in the frame, it is not relating to clock generation,
> So it is no need to be changed when Rx is going to be enabled.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Can you rename the PATCH subject to something more specific?
For example, "Drop TMR/RMR settings for synchronous mode".
Please add this once it's addressed:
Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com>
next prev parent reply other threads:[~2020-08-05 3:44 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-05 2:23 [PATCH v2 0/2] refine and clean code for synchronous mode Shengjiu Wang
2020-08-05 2:23 ` [PATCH v2 1/2] ASoC: fsl_sai: Clean " Shengjiu Wang
2020-08-05 3:43 ` Nicolin Chen [this message]
2020-08-05 3:43 ` Nicolin Chen
2020-08-05 3:43 ` Nicolin Chen
2020-08-05 2:23 ` [PATCH v2 2/2] ASoC: fsl_sai: Refine enable and disable sequence " Shengjiu Wang
2020-08-05 4:11 ` Nicolin Chen
2020-08-05 4:11 ` Nicolin Chen
2020-08-05 4:11 ` Nicolin Chen
2020-08-05 5:03 ` Shengjiu Wang
2020-08-05 5:03 ` Shengjiu Wang
2020-08-05 5:15 ` Nicolin Chen
2020-08-05 5:15 ` Nicolin Chen
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