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From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"Christian Lamparter" <chunkeey@gmail.com>,
	"Hauke Mehrtens" <hauke@hauke-m.de>,
	"Rafał Miłecki" <zajec5@gmail.com>,
	"open list" <linux-kernel@vger.kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"maintainer:BROADCOM BCM5301X ARM ARCHITECTURE"
	<bcm-kernel-feedback-list@broadcom.com>
Subject: [PATCH] ARM: dts: BCM5301X: Fix pin controller node
Date: Tue, 18 Aug 2020 21:23:07 -0700	[thread overview]
Message-ID: <20200819042308.19043-1-f.fainelli@gmail.com> (raw)

The pin controller resources start at 0xc0 from the CRU base which is at
0x100 from th DMU base, for a final address of 0x1800_c1c0, whereas we
are currently off by 0x100. The resource size of the CRU is also
incorrect and should end at 0x248 bytes from 0x100 which is the start
address. Finally, the compatibility strings defined for the
pin-controller node should reflect the SoC being used.

Fixes: 9994241ac97c ("ARM: dts: BCM5301X: Describe Northstar pins mux controller")
Reported-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Christian, can you test this as a preliminary patch for your Cisco
Meraki MR32 series? Thanks!

 arch/arm/boot/dts/bcm4708.dtsi  | 4 ++++
 arch/arm/boot/dts/bcm4709.dtsi  | 4 ++++
 arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++----
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/bcm4708.dtsi b/arch/arm/boot/dts/bcm4708.dtsi
index 1a19e97a987d..5064fe51e402 100644
--- a/arch/arm/boot/dts/bcm4708.dtsi
+++ b/arch/arm/boot/dts/bcm4708.dtsi
@@ -43,6 +43,10 @@ cpu@1 {
 
 };
 
+&pinctrl {
+	compatible = "brcm,bcm4708-pinmux";
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm4709.dtsi b/arch/arm/boot/dts/bcm4709.dtsi
index e1bb8661955f..7417c275ea9d 100644
--- a/arch/arm/boot/dts/bcm4709.dtsi
+++ b/arch/arm/boot/dts/bcm4709.dtsi
@@ -5,6 +5,10 @@
 
 #include "bcm4708.dtsi"
 
+&pinctrl {
+	compatible = "brcm,bcm4709-pinmux";
+};
+
 &uart0 {
 	clock-frequency = <125000000>;
 	status = "okay";
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 2d9b4dd05830..bf49943f504a 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -402,14 +402,14 @@ dmu@1800c000 {
 
 		cru@100 {
 			compatible = "simple-bus";
-			reg = <0x100 0x1a4>;
+			reg = <0x100 0x248>;
 			ranges;
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			pin-controller@1c0 {
-				compatible = "brcm,bcm4708-pinmux";
-				reg = <0x1c0 0x24>;
+			pinctrl: pin-controller@c0 {
+				compatible = "brcm,bcm53012-pinmux";
+				reg = <0xc0 0x24>;
 				reg-names = "cru_gpio_control";
 
 				spi-pins {
-- 
2.25.1


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: "Christian Lamparter" <chunkeey@gmail.com>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"Hauke Mehrtens" <hauke@hauke-m.de>,
	"Rafał Miłecki" <zajec5@gmail.com>,
	bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM
	BCM5301X ARM ARCHITECTURE), "Rob Herring" <robh+dt@kernel.org>,
	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
	FLATTENED DEVICE TREE BINDINGS),
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH] ARM: dts: BCM5301X: Fix pin controller node
Date: Tue, 18 Aug 2020 21:23:07 -0700	[thread overview]
Message-ID: <20200819042308.19043-1-f.fainelli@gmail.com> (raw)

The pin controller resources start at 0xc0 from the CRU base which is at
0x100 from th DMU base, for a final address of 0x1800_c1c0, whereas we
are currently off by 0x100. The resource size of the CRU is also
incorrect and should end at 0x248 bytes from 0x100 which is the start
address. Finally, the compatibility strings defined for the
pin-controller node should reflect the SoC being used.

Fixes: 9994241ac97c ("ARM: dts: BCM5301X: Describe Northstar pins mux controller")
Reported-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Christian, can you test this as a preliminary patch for your Cisco
Meraki MR32 series? Thanks!

 arch/arm/boot/dts/bcm4708.dtsi  | 4 ++++
 arch/arm/boot/dts/bcm4709.dtsi  | 4 ++++
 arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++----
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/bcm4708.dtsi b/arch/arm/boot/dts/bcm4708.dtsi
index 1a19e97a987d..5064fe51e402 100644
--- a/arch/arm/boot/dts/bcm4708.dtsi
+++ b/arch/arm/boot/dts/bcm4708.dtsi
@@ -43,6 +43,10 @@ cpu@1 {
 
 };
 
+&pinctrl {
+	compatible = "brcm,bcm4708-pinmux";
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm/boot/dts/bcm4709.dtsi b/arch/arm/boot/dts/bcm4709.dtsi
index e1bb8661955f..7417c275ea9d 100644
--- a/arch/arm/boot/dts/bcm4709.dtsi
+++ b/arch/arm/boot/dts/bcm4709.dtsi
@@ -5,6 +5,10 @@
 
 #include "bcm4708.dtsi"
 
+&pinctrl {
+	compatible = "brcm,bcm4709-pinmux";
+};
+
 &uart0 {
 	clock-frequency = <125000000>;
 	status = "okay";
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 2d9b4dd05830..bf49943f504a 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -402,14 +402,14 @@ dmu@1800c000 {
 
 		cru@100 {
 			compatible = "simple-bus";
-			reg = <0x100 0x1a4>;
+			reg = <0x100 0x248>;
 			ranges;
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			pin-controller@1c0 {
-				compatible = "brcm,bcm4708-pinmux";
-				reg = <0x1c0 0x24>;
+			pinctrl: pin-controller@c0 {
+				compatible = "brcm,bcm53012-pinmux";
+				reg = <0xc0 0x24>;
 				reg-names = "cru_gpio_control";
 
 				spi-pins {
-- 
2.25.1


             reply	other threads:[~2020-08-19  4:24 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-19  4:23 Florian Fainelli [this message]
2020-08-19  4:23 ` [PATCH] ARM: dts: BCM5301X: Fix pin controller node Florian Fainelli
2020-08-19 15:27 ` Ray Jui
2020-08-19 15:27   ` Ray Jui
2020-08-19 15:36 ` Rafał Miłecki
2020-08-19 15:36   ` Rafał Miłecki
2020-08-19 18:28   ` Florian Fainelli
2020-08-19 18:28     ` Florian Fainelli
2020-08-19 20:48 ` Christian Lamparter
2020-08-19 20:48   ` Christian Lamparter
2020-08-19 20:49   ` Florian Fainelli
2020-08-19 20:49     ` Florian Fainelli
2020-08-19 21:14     ` Ray Jui
2020-08-19 21:14       ` Ray Jui
2020-08-19 21:29       ` Florian Fainelli
2020-08-19 21:29         ` Florian Fainelli
2020-08-20 12:20 ` Rafał Miłecki
2020-08-20 12:20   ` Rafał Miłecki

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