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From: "Rafał Miłecki" <zajec5@gmail.com>
To: Florian Fainelli <f.fainelli@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	Christian Lamparter <chunkeey@gmail.com>,
	Hauke Mehrtens <hauke@hauke-m.de>,
	open list <linux-kernel@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"maintainer:BROADCOM BCM5301X ARM ARCHITECTURE"
	<bcm-kernel-feedback-list@broadcom.com>
Subject: Re: [PATCH] ARM: dts: BCM5301X: Fix pin controller node
Date: Thu, 20 Aug 2020 14:20:21 +0200	[thread overview]
Message-ID: <d4a3b850-7b19-bad7-383b-dfbc0f7c896c@gmail.com> (raw)
In-Reply-To: <20200819042308.19043-1-f.fainelli@gmail.com>

On 19.08.2020 06:23, Florian Fainelli wrote:
> The pin controller resources start at 0xc0 from the CRU base which is at
> 0x100 from th DMU base, for a final address of 0x1800_c1c0, whereas we
> are currently off by 0x100. The resource size of the CRU is also
> incorrect and should end at 0x248 bytes from 0x100 which is the start
> address. Finally, the compatibility strings defined for the
> pin-controller node should reflect the SoC being used.

I can confirm 0x1800c1c0 is the correct absolute offset.


> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> index 2d9b4dd05830..bf49943f504a 100644
> --- a/arch/arm/boot/dts/bcm5301x.dtsi
> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> @@ -402,14 +402,14 @@ dmu@1800c000 {
>   
>   		cru@100 {
>   			compatible = "simple-bus";
> -			reg = <0x100 0x1a4>;
> +			reg = <0x100 0x248>;
>   			ranges;
>   			#address-cells = <1>;
>   			#size-cells = <1>;
>   
> -			pin-controller@1c0 {
> -				compatible = "brcm,bcm4708-pinmux";
> -				reg = <0x1c0 0x24>;
> +			pinctrl: pin-controller@c0 {
> +				compatible = "brcm,bcm53012-pinmux";
> +				reg = <0xc0 0x24>;
>   				reg-names = "cru_gpio_control";
>   
>   				spi-pins {
> 

That whole binding has a bit messy story.

Initially it used to be binding like:
	compatible = "brcm,bcm4708-pinmux";
	reg = <0x1800c1c0 0x24>;
	reg-names = "cru_gpio_control";
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c12fb1774deaa9c9408b19db8d43d3612f6e47a0
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=3f9f82b3ffb8bfe01988c890e3a24328e9e1c1df

Later example binding was rewritten to include dmu and cru (simplified
below):
	dmu@1800c000 {
		compatible = "simple-bus";
		ranges = <0 0x1800c000 0x1000>;

		cru@100 {
			compatible = "simple-bus";
			reg = <0x100 0x1a4>;
			ranges;

			pin-controller@1c0 {
				compatible = "brcm,bcm4708-pinmux";
				reg = <0x1c0 0x24>;
				reg-names = "cru_gpio_control";
			};
		};
	};
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=93d39737b29eaf1974bf850ccdc903b2418c800b
I don't understand or remember why pin-controller reg was relative to
dmu instead of cru. Some DT offset calculation magic?

Finally I updated binding to use "offset", see:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2ae80900f239484069569380e1fc4340fd6e0089
and then updated driver to follow:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a49d784d5a8272d0f63c448fe8dc69e589db006e
but I never updated DTS file accordingly.

To OpenWrt I pushed relevant kernel patch in the commit:
https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=a28f6ab27f9ae1a08c6945013cdb796b12ce150d
(called [PATCH] ARM: dts: BCM5301X: Update Northstar pinctrl binding)
but I never sent it upstream.

Florian: your change doesn't match docs or existing Linux driver:
1. Driver seems to ignore "reg"
2. Driver requires "offset"
3. Property "cru_gpio_control" is leftover (undocumented and unused)

I think we need to take a step back and cleanup Northstar bindings. Few
months ago I sent e-mail:
Subject: Proper DT bindings for Broadcom's DMU node
Message-ID: <7da2db8f-66d0-24ec-d3eb-84247b383a06@gmail.com>

I didn't get any reply from Rob who previously pointed out that
compatible = "syscon", "simple-mfd";
is not a valid compatibility.

I suggest we hold on on DTS update for a moment and switch back to my
question from March on designing proper bindings.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: "Rafał Miłecki" <zajec5@gmail.com>
To: Florian Fainelli <f.fainelli@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Cc: Christian Lamparter <chunkeey@gmail.com>,
	Hauke Mehrtens <hauke@hauke-m.de>,
	"maintainer:BROADCOM BCM5301X ARM ARCHITECTURE" 
	<bcm-kernel-feedback-list@broadcom.com>,
	Rob Herring <robh+dt@kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ARM: dts: BCM5301X: Fix pin controller node
Date: Thu, 20 Aug 2020 14:20:21 +0200	[thread overview]
Message-ID: <d4a3b850-7b19-bad7-383b-dfbc0f7c896c@gmail.com> (raw)
In-Reply-To: <20200819042308.19043-1-f.fainelli@gmail.com>

On 19.08.2020 06:23, Florian Fainelli wrote:
> The pin controller resources start at 0xc0 from the CRU base which is at
> 0x100 from th DMU base, for a final address of 0x1800_c1c0, whereas we
> are currently off by 0x100. The resource size of the CRU is also
> incorrect and should end at 0x248 bytes from 0x100 which is the start
> address. Finally, the compatibility strings defined for the
> pin-controller node should reflect the SoC being used.

I can confirm 0x1800c1c0 is the correct absolute offset.


> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
> index 2d9b4dd05830..bf49943f504a 100644
> --- a/arch/arm/boot/dts/bcm5301x.dtsi
> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
> @@ -402,14 +402,14 @@ dmu@1800c000 {
>   
>   		cru@100 {
>   			compatible = "simple-bus";
> -			reg = <0x100 0x1a4>;
> +			reg = <0x100 0x248>;
>   			ranges;
>   			#address-cells = <1>;
>   			#size-cells = <1>;
>   
> -			pin-controller@1c0 {
> -				compatible = "brcm,bcm4708-pinmux";
> -				reg = <0x1c0 0x24>;
> +			pinctrl: pin-controller@c0 {
> +				compatible = "brcm,bcm53012-pinmux";
> +				reg = <0xc0 0x24>;
>   				reg-names = "cru_gpio_control";
>   
>   				spi-pins {
> 

That whole binding has a bit messy story.

Initially it used to be binding like:
	compatible = "brcm,bcm4708-pinmux";
	reg = <0x1800c1c0 0x24>;
	reg-names = "cru_gpio_control";
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c12fb1774deaa9c9408b19db8d43d3612f6e47a0
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=3f9f82b3ffb8bfe01988c890e3a24328e9e1c1df

Later example binding was rewritten to include dmu and cru (simplified
below):
	dmu@1800c000 {
		compatible = "simple-bus";
		ranges = <0 0x1800c000 0x1000>;

		cru@100 {
			compatible = "simple-bus";
			reg = <0x100 0x1a4>;
			ranges;

			pin-controller@1c0 {
				compatible = "brcm,bcm4708-pinmux";
				reg = <0x1c0 0x24>;
				reg-names = "cru_gpio_control";
			};
		};
	};
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=93d39737b29eaf1974bf850ccdc903b2418c800b
I don't understand or remember why pin-controller reg was relative to
dmu instead of cru. Some DT offset calculation magic?

Finally I updated binding to use "offset", see:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2ae80900f239484069569380e1fc4340fd6e0089
and then updated driver to follow:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a49d784d5a8272d0f63c448fe8dc69e589db006e
but I never updated DTS file accordingly.

To OpenWrt I pushed relevant kernel patch in the commit:
https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=a28f6ab27f9ae1a08c6945013cdb796b12ce150d
(called [PATCH] ARM: dts: BCM5301X: Update Northstar pinctrl binding)
but I never sent it upstream.

Florian: your change doesn't match docs or existing Linux driver:
1. Driver seems to ignore "reg"
2. Driver requires "offset"
3. Property "cru_gpio_control" is leftover (undocumented and unused)

I think we need to take a step back and cleanup Northstar bindings. Few
months ago I sent e-mail:
Subject: Proper DT bindings for Broadcom's DMU node
Message-ID: <7da2db8f-66d0-24ec-d3eb-84247b383a06@gmail.com>

I didn't get any reply from Rob who previously pointed out that
compatible = "syscon", "simple-mfd";
is not a valid compatibility.

I suggest we hold on on DTS update for a moment and switch back to my
question from March on designing proper bindings.

  parent reply	other threads:[~2020-08-20 12:21 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-19  4:23 [PATCH] ARM: dts: BCM5301X: Fix pin controller node Florian Fainelli
2020-08-19  4:23 ` Florian Fainelli
2020-08-19 15:27 ` Ray Jui
2020-08-19 15:27   ` Ray Jui
2020-08-19 15:36 ` Rafał Miłecki
2020-08-19 15:36   ` Rafał Miłecki
2020-08-19 18:28   ` Florian Fainelli
2020-08-19 18:28     ` Florian Fainelli
2020-08-19 20:48 ` Christian Lamparter
2020-08-19 20:48   ` Christian Lamparter
2020-08-19 20:49   ` Florian Fainelli
2020-08-19 20:49     ` Florian Fainelli
2020-08-19 21:14     ` Ray Jui
2020-08-19 21:14       ` Ray Jui
2020-08-19 21:29       ` Florian Fainelli
2020-08-19 21:29         ` Florian Fainelli
2020-08-20 12:20 ` Rafał Miłecki [this message]
2020-08-20 12:20   ` Rafał Miłecki

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