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From: guoren@kernel.org
To: guoren@kernel.org, anup@brainfault.org, atish.patra@wdc.com,
	maz@kernel.org, tglx@linutronix.de, palmer@dabbelt.com,
	heiko@sntech.de, robh@kernel.org
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH V4 0/3] irqchip: riscv: Add thead,c900-plic support
Date: Sat, 16 Oct 2021 11:21:57 +0800	[thread overview]
Message-ID: <20211016032200.2869998-1-guoren@kernel.org> (raw)

From: Guo Ren <guoren@linux.alibaba.com>

Add the compatible string "thead,c900-plic" to the riscv plic
bindings to support allwinner d1 SOC which contains c906 core.

Changes since V4:
 - Update description in errata style
 - Update enum suggested by Anup, Heiko, Samuel
 - Update comment by Anup
 - Add cover-letter

Changes since V3:
 - Rename "c9xx" to "c900"
 - Add thead,c900-plic in the description section
 - Add sifive_plic_chip and thead_plic_chip for difference

Changes since V2:
 - Add a separate compatible string "thead,c9xx-plic"
 - set irq_mask/unmask of "plic_chip" to NULL and point
   irq_enable/disable of "plic_chip" to plic_irq_mask/unmask
 - Add a detailed comment block in plic_init() about the
   differences in Claim/Completion process of RISC-V PLIC and C9xx
   PLIC.

Guo Ren (3):
  irqchip/sifive-plic: Add thead,c900-plic support
  dt-bindings: update riscv plic compatible string
  dt-bindings: vendor-prefixes: add T-Head Semiconductor

 .../sifive,plic-1.0.0.yaml                    | 11 +++++-
 .../devicetree/bindings/vendor-prefixes.yaml  |  2 ++
 drivers/irqchip/irq-sifive-plic.c             | 34 +++++++++++++++++--
 3 files changed, 44 insertions(+), 3 deletions(-)

-- 
2.25.1


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WARNING: multiple messages have this Message-ID (diff)
From: guoren@kernel.org
To: guoren@kernel.org, anup@brainfault.org, atish.patra@wdc.com,
	maz@kernel.org, tglx@linutronix.de, palmer@dabbelt.com,
	heiko@sntech.de, robh@kernel.org
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH V4 0/3] irqchip: riscv: Add thead,c900-plic support
Date: Sat, 16 Oct 2021 11:21:57 +0800	[thread overview]
Message-ID: <20211016032200.2869998-1-guoren@kernel.org> (raw)

From: Guo Ren <guoren@linux.alibaba.com>

Add the compatible string "thead,c900-plic" to the riscv plic
bindings to support allwinner d1 SOC which contains c906 core.

Changes since V4:
 - Update description in errata style
 - Update enum suggested by Anup, Heiko, Samuel
 - Update comment by Anup
 - Add cover-letter

Changes since V3:
 - Rename "c9xx" to "c900"
 - Add thead,c900-plic in the description section
 - Add sifive_plic_chip and thead_plic_chip for difference

Changes since V2:
 - Add a separate compatible string "thead,c9xx-plic"
 - set irq_mask/unmask of "plic_chip" to NULL and point
   irq_enable/disable of "plic_chip" to plic_irq_mask/unmask
 - Add a detailed comment block in plic_init() about the
   differences in Claim/Completion process of RISC-V PLIC and C9xx
   PLIC.

Guo Ren (3):
  irqchip/sifive-plic: Add thead,c900-plic support
  dt-bindings: update riscv plic compatible string
  dt-bindings: vendor-prefixes: add T-Head Semiconductor

 .../sifive,plic-1.0.0.yaml                    | 11 +++++-
 .../devicetree/bindings/vendor-prefixes.yaml  |  2 ++
 drivers/irqchip/irq-sifive-plic.c             | 34 +++++++++++++++++--
 3 files changed, 44 insertions(+), 3 deletions(-)

-- 
2.25.1


             reply	other threads:[~2021-10-16  3:22 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-16  3:21 guoren [this message]
2021-10-16  3:21 ` [PATCH V4 0/3] irqchip: riscv: Add thead,c900-plic support guoren
2021-10-16  3:21 ` [PATCH V4 1/3] irqchip/sifive-plic: " guoren
2021-10-16  3:21   ` guoren
2021-10-18  5:17   ` Samuel Holland
2021-10-18  5:17     ` Samuel Holland
2021-10-18  5:40     ` Anup Patel
2021-10-18  5:40       ` Anup Patel
2021-10-18  7:05     ` Guo Ren
2021-10-18  7:05       ` Guo Ren
2021-10-18  7:21     ` Marc Zyngier
2021-10-18  7:21       ` Marc Zyngier
2021-10-19  9:33       ` Guo Ren
2021-10-19  9:33         ` Guo Ren
2021-10-19 10:18         ` Marc Zyngier
2021-10-19 10:18           ` Marc Zyngier
2021-10-19 13:27           ` Guo Ren
2021-10-19 13:27             ` Guo Ren
2021-10-20 13:34             ` Marc Zyngier
2021-10-20 13:34               ` Marc Zyngier
2021-10-20 14:19               ` Guo Ren
2021-10-20 14:19                 ` Guo Ren
2021-10-20 14:59                 ` Darius Rad
2021-10-20 14:59                   ` Darius Rad
2021-10-20 16:18                   ` Anup Patel
2021-10-20 16:18                     ` Anup Patel
2021-10-20 18:01                     ` Darius Rad
2021-10-20 18:01                       ` Darius Rad
2021-10-21  8:47                       ` Anup Patel
2021-10-21  8:47                         ` Anup Patel
2021-10-20 14:33               ` Anup Patel
2021-10-20 14:33                 ` Anup Patel
2021-10-20 15:08                 ` Marc Zyngier
2021-10-20 15:08                   ` Marc Zyngier
2021-10-20 16:08                   ` Anup Patel
2021-10-20 16:08                     ` Anup Patel
2021-10-20 16:48                     ` Marc Zyngier
2021-10-20 16:48                       ` Marc Zyngier
2021-10-21  8:52                       ` Anup Patel
2021-10-21  8:52                         ` Anup Patel
2021-10-21  1:46                     ` Guo Ren
2021-10-21  1:46                       ` Guo Ren
2021-10-21  2:00                   ` Guo Ren
2021-10-21  2:00                     ` Guo Ren
2021-10-21  8:33                     ` Marc Zyngier
2021-10-21  8:33                       ` Marc Zyngier
2021-10-21  9:43                       ` Guo Ren
2021-10-21  9:43                         ` Guo Ren
2021-10-16  3:21 ` [PATCH V4 2/3] dt-bindings: update riscv plic compatible string guoren
2021-10-16  3:21   ` guoren
2021-10-16  7:07   ` Andreas Schwab
2021-10-16  7:07     ` Andreas Schwab
2021-10-16  9:16     ` Guo Ren
2021-10-16  9:16       ` Guo Ren
2021-10-16 10:34   ` Heiko Stuebner
2021-10-16 10:34     ` Heiko Stuebner
2021-10-16 12:56     ` Guo Ren
2021-10-16 12:56       ` Guo Ren
2021-10-16 16:31       ` Heiko Stuebner
2021-10-16 16:31         ` Heiko Stuebner
2021-10-20 12:15         ` Guo Ren
2021-10-20 12:15           ` Guo Ren
2021-10-18 12:02   ` Rob Herring
2021-10-18 12:02     ` Rob Herring
2021-10-19  0:55     ` Guo Ren
2021-10-19  0:55       ` Guo Ren
2021-10-16  3:22 ` [PATCH V4 3/3] dt-bindings: vendor-prefixes: add T-Head Semiconductor guoren
2021-10-16  3:22   ` guoren

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