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* [PATCH 00/19] ASoC: fsl_micfil: Driver updates
@ 2022-03-17  8:27 ` Sascha Hauer
  0 siblings, 0 replies; 50+ messages in thread
From: Sascha Hauer @ 2022-03-17  8:27 UTC (permalink / raw)
  To: alsa-devel
  Cc: Xiubo Li, Fabio Estevam, Sascha Hauer, Vinod Koul, NXP Linux Team,
	kernel, dmaengine, Shengjiu Wang

This series has a bunch of cleanups for the FSL MICFIL driver. There is
not much chance for regressions in this series as the driver currently
can't work at all. The MICFIL needs multififo support in the i.MX SDMA
engine which is added with this series, see 10/19.

The multififo support is selected in the dma phandle arguments in the
device tree, the transfer type must be '25' aka IMX_DMATYPE_MULTI_SAI.
This is set already to 25 in the upstream i.MX8M[NM] dtsi files, but the
SDMA driver silently ignores unsupported values instead of throwing an
error. This is fixed in this series and multififo support is added.

I think the series should go via the ASoC tree, so I'll need an ack from
the DMA guys for 9/19 and 10/10.

Sascha

Sascha Hauer (19):
  ASoC: fsl_micfil: Drop unnecessary register read
  ASoC: fsl_micfil: Drop unused register read
  ASoC: fsl_micfil: drop fsl_micfil_set_mclk_rate()
  ASoC: fsl_micfil: do not define SHIFT/MASK for single bits
  ASoC: fsl_micfil: use GENMASK to define register bit fields
  ASoC: fsl_micfil: use clear/set bits
  ASoC: fsl_micfil: drop error messages from failed register accesses
  ASoC: fsl_micfil: drop unused variables
  dma: imx-sdma: error out on unsupported transfer types
  dma: imx-sdma: Add multi fifo support
  ASoC: fsl_micfil: add multi fifo support
  ASoC: fsl_micfil: use define for OSR default value
  ASoC: fsl_micfil: Drop get_pdm_clk()
  ASoC: fsl_micfil: simplify clock setting
  ASoC: fsl_micfil: rework quality setting
  ASoC: fsl_micfil: drop unused include
  ASoC: fsl_micfil: drop only once used defines
  ASoC: fsl_micfil: drop support for undocumented property
  ASoC: fsl_micfil: fold fsl_set_clock_params() into its only user

 drivers/dma/imx-sdma.c                |  71 ++++-
 include/linux/platform_data/dma-imx.h |   7 +
 sound/soc/fsl/fsl_micfil.c            | 368 +++++++++-----------------
 sound/soc/fsl/fsl_micfil.h            | 269 +++++--------------
 4 files changed, 265 insertions(+), 450 deletions(-)

-- 
2.30.2


^ permalink raw reply	[flat|nested] 50+ messages in thread
* RE: [PATCH 10/19] dma: imx-sdma: Add multi fifo support
@ 2022-03-17 10:18 ` S.J. Wang
  0 siblings, 0 replies; 50+ messages in thread
From: S.J. Wang @ 2022-03-17 10:18 UTC (permalink / raw)
  To: Sascha Hauer, alsa-devel@alsa-project.org
  Cc: Xiubo Li, Shengjiu Wang, Vinod Koul, dl-linux-imx,
	kernel@pengutronix.de, dmaengine@vger.kernel.org, Fabio Estevam,
	Joy Zou

Hi Sascha

> ---
>  drivers/dma/imx-sdma.c                | 54 +++++++++++++++++++++++++++
>  include/linux/platform_data/dma-imx.h |  7 ++++
>  2 files changed, 61 insertions(+)
> 
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index
> 1038f6bc7f846..21e1cec2ffde9 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -14,6 +14,7 @@
>  #include <linux/iopoll.h>
>  #include <linux/module.h>
>  #include <linux/types.h>
> +#include <linux/bitfield.h>
>  #include <linux/bitops.h>
>  #include <linux/mm.h>
>  #include <linux/interrupt.h>
> @@ -73,6 +74,7 @@
>  #define SDMA_CHNENBL0_IMX35    0x200
>  #define SDMA_CHNENBL0_IMX31    0x080
>  #define SDMA_CHNPRI_0          0x100
> +#define SDMA_DONE0_CONFIG      0x1000
> 
>  /*
>   * Buffer descriptor status values.
> @@ -180,6 +182,12 @@
>                                  BIT(DMA_MEM_TO_DEV) | \
>                                  BIT(DMA_DEV_TO_DEV))
> 
> +#define SDMA_WATERMARK_LEVEL_N_FIFOS   GENMASK(15, 12)
> +#define SDMA_WATERMARK_LEVEL_SW_DONE   BIT(23)
> +
> +#define SDMA_DONE0_CONFIG_DONE_SEL     BIT(7)
> +#define SDMA_DONE0_CONFIG_DONE_DIS     BIT(6)
> +
>  /**
>   * struct sdma_script_start_addrs - SDMA script start pointers
>   *
> @@ -441,6 +449,11 @@ struct sdma_channel {
>         struct work_struct              terminate_worker;
>         struct list_head                terminated;
>         bool                            is_ram_script;
> +       unsigned int                    n_fifos;
> +       unsigned int                    n_fifos_src;
> +       unsigned int                    n_fifos_dst;
> +       bool                            sw_done;
> +       u32                             sw_done_sel;
>  };
> 
>  #define IMX_DMA_SG_LOOP                BIT(0)
> @@ -773,6 +786,14 @@ static void sdma_event_enable(struct
> sdma_channel *sdmac, unsigned int event)
>         val = readl_relaxed(sdma->regs + chnenbl);
>         __set_bit(channel, &val);
>         writel_relaxed(val, sdma->regs + chnenbl);
> +
> +       /* Set SDMA_DONEx_CONFIG is sw_done enabled */
> +       if (sdmac->sw_done) {
> +               val = readl_relaxed(sdma->regs + SDMA_DONE0_CONFIG);
> +               val |= SDMA_DONE0_CONFIG_DONE_SEL;
> +               val &= ~SDMA_DONE0_CONFIG_DONE_DIS;
> +               writel_relaxed(val, sdma->regs + SDMA_DONE0_CONFIG);
> +       }
>  }
> 
>  static void sdma_event_disable(struct sdma_channel *sdmac, unsigned int
> event) @@ -1022,6 +1043,10 @@ static int sdma_get_pc(struct
> sdma_channel *sdmac,
>         case IMX_DMATYPE_IPU_MEMORY:
>                 emi_2_per = sdma->script_addrs->ext_mem_2_ipu_addr;
>                 break;
> +       case IMX_DMATYPE_MULTI_SAI:
> +               per_2_emi = sdma->script_addrs->sai_2_mcu_addr;
> +               emi_2_per = sdma->script_addrs->mcu_2_sai_addr;
> +               break;
>         default:
>                 dev_err(sdma->dev, "Unsupported transfer type %d\n",
>                         peripheral_type); @@ -1198,6 +1223,15 @@ static void
> sdma_set_watermarklevel_for_p2p(struct sdma_channel *sdmac)
>         sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_CONT;  }
> 
> +static void sdma_set_watermarklevel_for_sais(struct sdma_channel
> +*sdmac) {
> +       if (sdmac->sw_done)
> +               sdmac->watermark_level |=
> SDMA_WATERMARK_LEVEL_SW_DONE;
> +
> +       sdmac->watermark_level |=
> +                       FIELD_PREP(SDMA_WATERMARK_LEVEL_N_FIFOS,
> +sdmac->n_fifos); }
> +
>  static int sdma_config_channel(struct dma_chan *chan)  {
>         struct sdma_channel *sdmac = to_sdma_chan(chan); @@ -1234,6
> +1268,10 @@ static int sdma_config_channel(struct dma_chan *chan)
>                             sdmac->peripheral_type == IMX_DMATYPE_ASRC)
>                                 sdma_set_watermarklevel_for_p2p(sdmac);
>                 } else {
> +                       if (sdmac->peripheral_type ==
> +                                       IMX_DMATYPE_MULTI_SAI)
> +                               sdma_set_watermarklevel_for_sais(sdmac);
> +
>                         __set_bit(sdmac->event_id0, sdmac->event_mask);
>                 }
> 
> @@ -1669,6 +1707,7 @@ static int sdma_config_write(struct dma_chan
> *chan,
>                 sdmac->watermark_level = dmaengine_cfg->src_maxburst *
>                         dmaengine_cfg->src_addr_width;
>                 sdmac->word_size = dmaengine_cfg->src_addr_width;
> +               sdmac->n_fifos =  sdmac->n_fifos_src;
>         } else if (direction == DMA_DEV_TO_DEV) {
>                 sdmac->per_address2 = dmaengine_cfg->src_addr;
>                 sdmac->per_address = dmaengine_cfg->dst_addr; @@ -1682,6
> +1721,7 @@ static int sdma_config_write(struct dma_chan *chan,
>                 sdmac->watermark_level = dmaengine_cfg->dst_maxburst *
>                         dmaengine_cfg->dst_addr_width;
>                 sdmac->word_size = dmaengine_cfg->dst_addr_width;
> +               sdmac->n_fifos =  sdmac->n_fifos_dst;
>         }
>         sdmac->direction = direction;
>         return sdma_config_channel(chan); @@ -1691,9 +1731,23 @@ static int
> sdma_config(struct dma_chan *chan,
>                        struct dma_slave_config *dmaengine_cfg)  {
>         struct sdma_channel *sdmac = to_sdma_chan(chan);
> +       struct sdma_engine *sdma = sdmac->sdma;
> 
>         memcpy(&sdmac->slave_config, dmaengine_cfg,
> sizeof(*dmaengine_cfg));
> 
> +       if (dmaengine_cfg->peripheral_config) {
> +               struct sdma_peripheral_config *sdmacfg = dmaengine_cfg-
> >peripheral_config;
> +               if (dmaengine_cfg->peripheral_size != sizeof(struct
> sdma_peripheral_config)) {
> +                       dev_err(sdma->dev, "Invalid peripheral size %zu,
> expected %zu\n",
> +                               dmaengine_cfg->peripheral_size,
> +                               sizeof(struct sdma_peripheral_config));
> +                       return -EINVAL;
> +               }
> +               sdmac->n_fifos_src = sdmacfg->n_fifos_src;
> +               sdmac->n_fifos_dst = sdmacfg->n_fifos_dst;
> +               sdmac->sw_done = sdmacfg->sw_done;
> +       }
> +
>         /* Set ENBLn earlier to make sure dma request triggered after that */
>         if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events)
>                 return -EINVAL;
> diff --git a/include/linux/platform_data/dma-imx.h
> b/include/linux/platform_data/dma-imx.h
> index 281adbb26e6bd..4a43a048e1b4d 100644
> --- a/include/linux/platform_data/dma-imx.h
> +++ b/include/linux/platform_data/dma-imx.h
> @@ -39,6 +39,7 @@ enum sdma_peripheral_type {
>         IMX_DMATYPE_SSI_DUAL,   /* SSI Dual FIFO */
>         IMX_DMATYPE_ASRC_SP,    /* Shared ASRC */
>         IMX_DMATYPE_SAI,        /* SAI */
> +       IMX_DMATYPE_MULTI_SAI,  /* MULTI FIFOs For Audio */
>  };
> 
>  enum imx_dma_prio {
> @@ -65,4 +66,10 @@ static inline int imx_dma_is_general_purpose(struct
> dma_chan *chan)
>                 !strcmp(chan->device->dev->driver->name, "imx-dma");  }
> 
> +struct sdma_peripheral_config {
> +       int n_fifos_src;
> +       int n_fifos_dst;
> +       bool sw_done;
> +};
> +

Seems there is issue with my gmail, I resend the comments again.

This is our internal definition for this sdma_peripheral_config.
Could you please adopt this?

/**
 * struct sdma_audio_config - special sdma config for audio case
 * @src_fifo_num: source fifo number for mcu_2_sai/sai_2_mcu script
 *                For example, if there are 4 fifos, sdma will fetch
 *                fifos one by one and roll back to the first fifo after
 *                the 4th fifo fetch.
 * @dst_fifo_num: similar as src_fifo_num, but dest fifo instead.
 * @src_fifo_off: source fifo offset, 0 means all fifos are continuous, 1
 *                means 1 word offset between fifos. All offset between
 *                fifos should be same.
 * @dst_fifo_off: dst fifo offset, similar as @src_fifo_off.
 * @words_per_fifo: numbers of words per fifo fetch/fill, 0 means
 *                  one channel per fifo, 1 means 2 channels per fifo..
 *                  If 'src_fifo_num =  4' and 'chans_per_fifo = 1', it
 *                  means the first two words(channels) fetch from fifo1
 *                  and then jump to fifo2 for next two words, and so on
 *                  after the last fifo4 fetched, roll back to fifo1.
 * @sw_done_sel: software done selector, PDM need enable software done feature
 *               in mcu_2_sai/sai_2_mcu script.
 *               Bit31: sw_done eanbled or not
 *               Bit16~Bit0: selector
 *               For example: 0x80000000 means sw_done enabled for done0
 *                            sector which is for PDM on i.mx8mm.
 */
struct sdma_audio_config {
        u8 src_fifo_num;
        u8 dst_fifo_num;
        u8 src_fifo_off;
        u8 dst_fifo_off;
        u8 words_per_fifo;
        u32 sw_done_sel;
};

Best regards
Wang shengjiu





^ permalink raw reply	[flat|nested] 50+ messages in thread
end of thread, other threads:[~2022-03-18  8:05 UTC | newest]

Thread overview: 50+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-03-17  8:27 [PATCH 00/19] ASoC: fsl_micfil: Driver updates Sascha Hauer
2022-03-17  8:27 ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 01/19] ASoC: fsl_micfil: Drop unnecessary register read Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 02/19] ASoC: fsl_micfil: Drop unused " Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 03/19] ASoC: fsl_micfil: drop fsl_micfil_set_mclk_rate() Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 04/19] ASoC: fsl_micfil: do not define SHIFT/MASK for single bits Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 05/19] ASoC: fsl_micfil: use GENMASK to define register bit fields Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17 17:06   ` kernel test robot
2022-03-17 17:06     ` kernel test robot
2022-03-17  8:28 ` [PATCH 06/19] ASoC: fsl_micfil: use clear/set bits Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 07/19] ASoC: fsl_micfil: drop error messages from failed register accesses Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 08/19] ASoC: fsl_micfil: drop unused variables Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 09/19] dma: imx-sdma: error out on unsupported transfer types Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 10/19] dma: imx-sdma: Add multi fifo support Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
     [not found]   ` <CAA+D8APw-OHdz4s=oy9bWZOw6kj8mD8nss3OKXsYQty52=tb2Q@mail.gmail.com>
2022-03-17 10:19     ` Sascha Hauer
2022-03-17 10:19       ` Sascha Hauer
     [not found]       ` <CAA+D8AMdTzqfEQCH4pcQE3K1P-4oo71ctiGW1DD7XJPQDcVbTg@mail.gmail.com>
2022-03-17 14:41         ` Sascha Hauer
2022-03-17 14:41           ` Sascha Hauer
     [not found]   ` <CAA+D8AM5bm3Hncrf0=xdPNpC_rz_yMbokN6J-8z4tHi7-==jgA@mail.gmail.com>
2022-03-18  8:04     ` Sascha Hauer
2022-03-18  8:04       ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 11/19] ASoC: fsl_micfil: add " Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 12/19] ASoC: fsl_micfil: use define for OSR default value Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 13/19] ASoC: fsl_micfil: Drop get_pdm_clk() Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 14/19] ASoC: fsl_micfil: simplify clock setting Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 15/19] ASoC: fsl_micfil: rework quality setting Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 16/19] ASoC: fsl_micfil: drop unused include Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 17/19] ASoC: fsl_micfil: drop only once used defines Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 18/19] ASoC: fsl_micfil: drop support for undocumented property Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
2022-03-17  8:28 ` [PATCH 19/19] ASoC: fsl_micfil: fold fsl_set_clock_params() into its only user Sascha Hauer
2022-03-17  8:28   ` Sascha Hauer
  -- strict thread matches above, loose matches on Subject: below --
2022-03-17 10:18 [PATCH 10/19] dma: imx-sdma: Add multi fifo support S.J. Wang
2022-03-17 10:18 ` S.J. Wang

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