From: Schspa Shi <schspa@gmail.com>
To: andy.shevchenko@gmail.com
Cc: brgl@bgdev.pl, f.fainelli@gmail.com, fancer.lancer@gmail.com,
hoan@os.amperecomputing.com, linus.walleij@linaro.org,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, opendmb@gmail.com,
schspa@gmail.com
Subject: [PATCH v2 13/15] gpio: cadence: use raw lock for bgpio_lock
Date: Mon, 18 Apr 2022 00:52:06 +0800 [thread overview]
Message-ID: <20220417165208.39754-13-schspa@gmail.com> (raw)
In-Reply-To: <20220417165208.39754-1-schspa@gmail.com>
bgpio_lock is changed to raw lock, fellow the header change
Signed-off-by: Schspa Shi <schspa@gmail.com>
---
drivers/gpio/gpio-cadence.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpio-cadence.c b/drivers/gpio/gpio-cadence.c
index 562f8f7e7d1f..137aea49ba02 100644
--- a/drivers/gpio/gpio-cadence.c
+++ b/drivers/gpio/gpio-cadence.c
@@ -41,12 +41,12 @@ static int cdns_gpio_request(struct gpio_chip *chip, unsigned int offset)
struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip);
unsigned long flags;
- spin_lock_irqsave(&chip->bgpio_lock, flags);
+ raw_spin_lock_irqsave(&chip->bgpio_lock, flags);
iowrite32(ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE) & ~BIT(offset),
cgpio->regs + CDNS_GPIO_BYPASS_MODE);
- spin_unlock_irqrestore(&chip->bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&chip->bgpio_lock, flags);
return 0;
}
@@ -55,13 +55,13 @@ static void cdns_gpio_free(struct gpio_chip *chip, unsigned int offset)
struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip);
unsigned long flags;
- spin_lock_irqsave(&chip->bgpio_lock, flags);
+ raw_spin_lock_irqsave(&chip->bgpio_lock, flags);
iowrite32(ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE) |
(BIT(offset) & cgpio->bypass_orig),
cgpio->regs + CDNS_GPIO_BYPASS_MODE);
- spin_unlock_irqrestore(&chip->bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&chip->bgpio_lock, flags);
}
static void cdns_gpio_irq_mask(struct irq_data *d)
@@ -90,7 +90,7 @@ static int cdns_gpio_irq_set_type(struct irq_data *d, unsigned int type)
u32 mask = BIT(d->hwirq);
int ret = 0;
- spin_lock_irqsave(&chip->bgpio_lock, flags);
+ raw_spin_lock_irqsave(&chip->bgpio_lock, flags);
int_value = ioread32(cgpio->regs + CDNS_GPIO_IRQ_VALUE) & ~mask;
int_type = ioread32(cgpio->regs + CDNS_GPIO_IRQ_TYPE) & ~mask;
@@ -115,7 +115,7 @@ static int cdns_gpio_irq_set_type(struct irq_data *d, unsigned int type)
iowrite32(int_type, cgpio->regs + CDNS_GPIO_IRQ_TYPE);
err_irq_type:
- spin_unlock_irqrestore(&chip->bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&chip->bgpio_lock, flags);
return ret;
}
--
2.24.3 (Apple Git-128)
WARNING: multiple messages have this Message-ID (diff)
From: Schspa Shi <schspa@gmail.com>
To: andy.shevchenko@gmail.com
Cc: brgl@bgdev.pl, f.fainelli@gmail.com, fancer.lancer@gmail.com,
hoan@os.amperecomputing.com, linus.walleij@linaro.org,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, opendmb@gmail.com,
schspa@gmail.com
Subject: [PATCH v2 13/15] gpio: cadence: use raw lock for bgpio_lock
Date: Mon, 18 Apr 2022 00:52:06 +0800 [thread overview]
Message-ID: <20220417165208.39754-13-schspa@gmail.com> (raw)
In-Reply-To: <20220417165208.39754-1-schspa@gmail.com>
bgpio_lock is changed to raw lock, fellow the header change
Signed-off-by: Schspa Shi <schspa@gmail.com>
---
drivers/gpio/gpio-cadence.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpio-cadence.c b/drivers/gpio/gpio-cadence.c
index 562f8f7e7d1f..137aea49ba02 100644
--- a/drivers/gpio/gpio-cadence.c
+++ b/drivers/gpio/gpio-cadence.c
@@ -41,12 +41,12 @@ static int cdns_gpio_request(struct gpio_chip *chip, unsigned int offset)
struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip);
unsigned long flags;
- spin_lock_irqsave(&chip->bgpio_lock, flags);
+ raw_spin_lock_irqsave(&chip->bgpio_lock, flags);
iowrite32(ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE) & ~BIT(offset),
cgpio->regs + CDNS_GPIO_BYPASS_MODE);
- spin_unlock_irqrestore(&chip->bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&chip->bgpio_lock, flags);
return 0;
}
@@ -55,13 +55,13 @@ static void cdns_gpio_free(struct gpio_chip *chip, unsigned int offset)
struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip);
unsigned long flags;
- spin_lock_irqsave(&chip->bgpio_lock, flags);
+ raw_spin_lock_irqsave(&chip->bgpio_lock, flags);
iowrite32(ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE) |
(BIT(offset) & cgpio->bypass_orig),
cgpio->regs + CDNS_GPIO_BYPASS_MODE);
- spin_unlock_irqrestore(&chip->bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&chip->bgpio_lock, flags);
}
static void cdns_gpio_irq_mask(struct irq_data *d)
@@ -90,7 +90,7 @@ static int cdns_gpio_irq_set_type(struct irq_data *d, unsigned int type)
u32 mask = BIT(d->hwirq);
int ret = 0;
- spin_lock_irqsave(&chip->bgpio_lock, flags);
+ raw_spin_lock_irqsave(&chip->bgpio_lock, flags);
int_value = ioread32(cgpio->regs + CDNS_GPIO_IRQ_VALUE) & ~mask;
int_type = ioread32(cgpio->regs + CDNS_GPIO_IRQ_TYPE) & ~mask;
@@ -115,7 +115,7 @@ static int cdns_gpio_irq_set_type(struct irq_data *d, unsigned int type)
iowrite32(int_type, cgpio->regs + CDNS_GPIO_IRQ_TYPE);
err_irq_type:
- spin_unlock_irqrestore(&chip->bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&chip->bgpio_lock, flags);
return ret;
}
--
2.24.3 (Apple Git-128)
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next prev parent reply other threads:[~2022-04-17 16:54 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-15 16:55 [PATCH] gpio: use raw spinlock for gpio chip shadowed data Schspa Shi
2022-04-15 16:55 ` Schspa Shi
2022-04-16 8:30 ` Andy Shevchenko
2022-04-16 8:30 ` Andy Shevchenko
2022-04-17 16:51 ` [PATCH v2 01/15] " Schspa Shi
2022-04-17 16:51 ` Schspa Shi
2022-04-17 16:51 ` [PATCH v2 02/15] pinctrl: nuvoton: npcm7xx: use raw_spin_lock_irqsave for bgpio_lock Schspa Shi
2022-04-17 16:51 ` Schspa Shi
2022-04-17 16:51 ` [PATCH v2 03/15] gpio: tb10x: use raw lock " Schspa Shi
2022-04-17 16:51 ` Schspa Shi
2022-04-17 16:51 ` [PATCH v2 04/15] gpio: sifive: " Schspa Shi
2022-04-17 16:51 ` Schspa Shi
2022-04-17 16:51 ` [PATCH v2 05/15] gpio: mlxbf2: " Schspa Shi
2022-04-17 16:51 ` Schspa Shi
2022-04-17 16:51 ` [PATCH v2 06/15] gpio: menz127: " Schspa Shi
2022-04-17 16:51 ` Schspa Shi
2022-04-17 16:52 ` [PATCH v2 07/15] gpio: loongson1: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi
2022-04-17 16:52 ` [PATCH v2 08/15] gpio: ixp4xx: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi
2022-04-17 16:52 ` [PATCH v2 09/15] gpio: idt3243x: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi
2022-04-17 16:52 ` [PATCH v2 10/15] gpio: hlwd: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi
2022-04-17 16:52 ` [PATCH v2 11/15] gpio: grgpio: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi
2022-04-17 16:52 ` [PATCH v2 12/15] gpio: dwapb: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi
2022-04-17 16:52 ` Schspa Shi [this message]
2022-04-17 16:52 ` [PATCH v2 13/15] gpio: cadence: " Schspa Shi
2022-04-17 16:52 ` [PATCH v2 14/15] gpio: brcmstb: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi
2022-04-17 16:52 ` [PATCH v2 15/15] gpio: amdpt: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi
[not found] ` <CAHp75Vc8HwheQVOpcn_Lxk-bOOMLybr=m6OdO7mJ-vE9xywBLg@mail.gmail.com>
2022-04-18 3:07 ` [PATCH] gpio: use raw spinlock for gpio chip shadowed data Schspa Shi
2022-04-18 3:07 ` Schspa Shi
2022-04-18 11:38 ` Andy Shevchenko
2022-04-18 11:38 ` Andy Shevchenko
2022-04-18 11:39 ` Andy Shevchenko
2022-04-18 11:39 ` Andy Shevchenko
2022-04-18 15:43 ` Schspa Shi
2022-04-18 15:43 ` Schspa Shi
2022-04-18 19:01 ` Bartosz Golaszewski
2022-04-18 19:01 ` Bartosz Golaszewski
2022-04-19 1:28 ` [PATCH v3] " Schspa Shi
2022-04-19 1:28 ` Schspa Shi
2022-04-19 8:22 ` Andy Shevchenko
2022-04-19 8:22 ` Andy Shevchenko
2022-04-19 21:57 ` Linus Walleij
2022-04-19 21:57 ` Linus Walleij
2022-04-19 22:30 ` Doug Berger
2022-04-19 22:30 ` Doug Berger
2022-04-20 9:37 ` Serge Semin
2022-04-20 9:37 ` Serge Semin
2022-04-25 10:15 ` Bartosz Golaszewski
2022-04-25 10:15 ` Bartosz Golaszewski
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