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From: Schspa Shi <schspa@gmail.com>
To: andy.shevchenko@gmail.com
Cc: brgl@bgdev.pl, f.fainelli@gmail.com, fancer.lancer@gmail.com,
	hoan@os.amperecomputing.com, linus.walleij@linaro.org,
	linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, opendmb@gmail.com,
	schspa@gmail.com
Subject: [PATCH v2 15/15] gpio: amdpt: use raw lock for bgpio_lock
Date: Mon, 18 Apr 2022 00:52:08 +0800	[thread overview]
Message-ID: <20220417165208.39754-15-schspa@gmail.com> (raw)
In-Reply-To: <20220417165208.39754-1-schspa@gmail.com>

bgpio_lock is changed to raw lock, fellow the header change

Signed-off-by: Schspa Shi <schspa@gmail.com>
---
 drivers/gpio/gpio-amdpt.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpio/gpio-amdpt.c b/drivers/gpio/gpio-amdpt.c
index 8cfb353c3abb..07c6d090058d 100644
--- a/drivers/gpio/gpio-amdpt.c
+++ b/drivers/gpio/gpio-amdpt.c
@@ -36,19 +36,19 @@ static int pt_gpio_request(struct gpio_chip *gc, unsigned offset)
 
 	dev_dbg(gc->parent, "pt_gpio_request offset=%x\n", offset);
 
-	spin_lock_irqsave(&gc->bgpio_lock, flags);
+	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 
 	using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
 	if (using_pins & BIT(offset)) {
 		dev_warn(gc->parent, "PT GPIO pin %x reconfigured\n",
 			 offset);
-		spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+		raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 		return -EINVAL;
 	}
 
 	writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG);
 
-	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
 	return 0;
 }
@@ -59,13 +59,13 @@ static void pt_gpio_free(struct gpio_chip *gc, unsigned offset)
 	unsigned long flags;
 	u32 using_pins;
 
-	spin_lock_irqsave(&gc->bgpio_lock, flags);
+	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 
 	using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
 	using_pins &= ~BIT(offset);
 	writel(using_pins, pt_gpio->reg_base + PT_SYNC_REG);
 
-	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
 	dev_dbg(gc->parent, "pt_gpio_free offset=%x\n", offset);
 }
-- 
2.24.3 (Apple Git-128)


WARNING: multiple messages have this Message-ID (diff)
From: Schspa Shi <schspa@gmail.com>
To: andy.shevchenko@gmail.com
Cc: brgl@bgdev.pl, f.fainelli@gmail.com, fancer.lancer@gmail.com,
	hoan@os.amperecomputing.com, linus.walleij@linaro.org,
	linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, opendmb@gmail.com,
	schspa@gmail.com
Subject: [PATCH v2 15/15] gpio: amdpt: use raw lock for bgpio_lock
Date: Mon, 18 Apr 2022 00:52:08 +0800	[thread overview]
Message-ID: <20220417165208.39754-15-schspa@gmail.com> (raw)
In-Reply-To: <20220417165208.39754-1-schspa@gmail.com>

bgpio_lock is changed to raw lock, fellow the header change

Signed-off-by: Schspa Shi <schspa@gmail.com>
---
 drivers/gpio/gpio-amdpt.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpio/gpio-amdpt.c b/drivers/gpio/gpio-amdpt.c
index 8cfb353c3abb..07c6d090058d 100644
--- a/drivers/gpio/gpio-amdpt.c
+++ b/drivers/gpio/gpio-amdpt.c
@@ -36,19 +36,19 @@ static int pt_gpio_request(struct gpio_chip *gc, unsigned offset)
 
 	dev_dbg(gc->parent, "pt_gpio_request offset=%x\n", offset);
 
-	spin_lock_irqsave(&gc->bgpio_lock, flags);
+	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 
 	using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
 	if (using_pins & BIT(offset)) {
 		dev_warn(gc->parent, "PT GPIO pin %x reconfigured\n",
 			 offset);
-		spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+		raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 		return -EINVAL;
 	}
 
 	writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG);
 
-	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
 	return 0;
 }
@@ -59,13 +59,13 @@ static void pt_gpio_free(struct gpio_chip *gc, unsigned offset)
 	unsigned long flags;
 	u32 using_pins;
 
-	spin_lock_irqsave(&gc->bgpio_lock, flags);
+	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 
 	using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
 	using_pins &= ~BIT(offset);
 	writel(using_pins, pt_gpio->reg_base + PT_SYNC_REG);
 
-	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
 	dev_dbg(gc->parent, "pt_gpio_free offset=%x\n", offset);
 }
-- 
2.24.3 (Apple Git-128)


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  parent reply	other threads:[~2022-04-17 16:54 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-15 16:55 [PATCH] gpio: use raw spinlock for gpio chip shadowed data Schspa Shi
2022-04-15 16:55 ` Schspa Shi
2022-04-16  8:30 ` Andy Shevchenko
2022-04-16  8:30   ` Andy Shevchenko
2022-04-17 16:51   ` [PATCH v2 01/15] " Schspa Shi
2022-04-17 16:51     ` Schspa Shi
2022-04-17 16:51     ` [PATCH v2 02/15] pinctrl: nuvoton: npcm7xx: use raw_spin_lock_irqsave for bgpio_lock Schspa Shi
2022-04-17 16:51       ` Schspa Shi
2022-04-17 16:51     ` [PATCH v2 03/15] gpio: tb10x: use raw lock " Schspa Shi
2022-04-17 16:51       ` Schspa Shi
2022-04-17 16:51     ` [PATCH v2 04/15] gpio: sifive: " Schspa Shi
2022-04-17 16:51       ` Schspa Shi
2022-04-17 16:51     ` [PATCH v2 05/15] gpio: mlxbf2: " Schspa Shi
2022-04-17 16:51       ` Schspa Shi
2022-04-17 16:51     ` [PATCH v2 06/15] gpio: menz127: " Schspa Shi
2022-04-17 16:51       ` Schspa Shi
2022-04-17 16:52     ` [PATCH v2 07/15] gpio: loongson1: " Schspa Shi
2022-04-17 16:52       ` Schspa Shi
2022-04-17 16:52     ` [PATCH v2 08/15] gpio: ixp4xx: " Schspa Shi
2022-04-17 16:52       ` Schspa Shi
2022-04-17 16:52     ` [PATCH v2 09/15] gpio: idt3243x: " Schspa Shi
2022-04-17 16:52       ` Schspa Shi
2022-04-17 16:52     ` [PATCH v2 10/15] gpio: hlwd: " Schspa Shi
2022-04-17 16:52       ` Schspa Shi
2022-04-17 16:52     ` [PATCH v2 11/15] gpio: grgpio: " Schspa Shi
2022-04-17 16:52       ` Schspa Shi
2022-04-17 16:52     ` [PATCH v2 12/15] gpio: dwapb: " Schspa Shi
2022-04-17 16:52       ` Schspa Shi
2022-04-17 16:52     ` [PATCH v2 13/15] gpio: cadence: " Schspa Shi
2022-04-17 16:52       ` Schspa Shi
2022-04-17 16:52     ` [PATCH v2 14/15] gpio: brcmstb: " Schspa Shi
2022-04-17 16:52       ` Schspa Shi
2022-04-17 16:52     ` Schspa Shi [this message]
2022-04-17 16:52       ` [PATCH v2 15/15] gpio: amdpt: " Schspa Shi
     [not found]     ` <CAHp75Vc8HwheQVOpcn_Lxk-bOOMLybr=m6OdO7mJ-vE9xywBLg@mail.gmail.com>
2022-04-18  3:07       ` [PATCH] gpio: use raw spinlock for gpio chip shadowed data Schspa Shi
2022-04-18  3:07         ` Schspa Shi
2022-04-18 11:38         ` Andy Shevchenko
2022-04-18 11:38           ` Andy Shevchenko
2022-04-18 11:39           ` Andy Shevchenko
2022-04-18 11:39             ` Andy Shevchenko
2022-04-18 15:43             ` Schspa Shi
2022-04-18 15:43               ` Schspa Shi
2022-04-18 19:01               ` Bartosz Golaszewski
2022-04-18 19:01                 ` Bartosz Golaszewski
2022-04-19  1:28                 ` [PATCH v3] " Schspa Shi
2022-04-19  1:28                   ` Schspa Shi
2022-04-19  8:22                   ` Andy Shevchenko
2022-04-19  8:22                     ` Andy Shevchenko
2022-04-19 21:57                   ` Linus Walleij
2022-04-19 21:57                     ` Linus Walleij
2022-04-19 22:30                   ` Doug Berger
2022-04-19 22:30                     ` Doug Berger
2022-04-20  9:37                   ` Serge Semin
2022-04-20  9:37                     ` Serge Semin
2022-04-25 10:15                   ` Bartosz Golaszewski
2022-04-25 10:15                     ` Bartosz Golaszewski

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