* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 14:00 [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq Parikshit Pareek
@ 2022-07-12 14:40 ` Manivannan Sadhasivam
2022-07-12 16:11 ` Parikshit Pareek
2022-07-12 16:24 ` Johan Hovold
2022-07-12 16:22 ` Johan Hovold
` (3 subsequent siblings)
4 siblings, 2 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2022-07-12 14:40 UTC (permalink / raw)
To: Parikshit Pareek
Cc: Andy Gross, Bjorn Andersson, Sai Prakash Ranjan, Rajendra Nayak,
Prasanna Kumar, linux-arm-msm
On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
> Wrong values have been introduced for interrupts property. Fix those
> ones, and correct the mapping of context banks to irq number.
>
And you ignored my comment about sorting the IRQs...
Thanks,
Mani
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 7945cbb57bb4..1276a833251e 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1580,7 +1580,6 @@
> <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
> @@ -1591,6 +1590,7 @@
> <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 14:40 ` Manivannan Sadhasivam
@ 2022-07-12 16:11 ` Parikshit Pareek
2022-07-12 16:24 ` Johan Hovold
1 sibling, 0 replies; 13+ messages in thread
From: Parikshit Pareek @ 2022-07-12 16:11 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Andy Gross, Bjorn Andersson, Sai Prakash Ranjan, Rajendra Nayak,
Prasanna Kumar, linux-arm-msm
On Tue, Jul 12, 2022 at 08:10:44PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
> > Wrong values have been introduced for interrupts property. Fix those
> > ones, and correct the mapping of context banks to irq number.
> >
>
> And you ignored my comment about sorting the IRQs...
My bad, will take care.
>
> Thanks,
> Mani
>
> > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> > Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> > ---
> > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > index 7945cbb57bb4..1276a833251e 100644
> > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> > @@ -1580,7 +1580,6 @@
> > <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
> > - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
> > @@ -1591,6 +1590,7 @@
> > <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
> > <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
> > --
> > 2.17.1
> >
Regards,
Parikshit Pareek
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 14:40 ` Manivannan Sadhasivam
2022-07-12 16:11 ` Parikshit Pareek
@ 2022-07-12 16:24 ` Johan Hovold
2022-07-12 16:41 ` Dmitry Baryshkov
1 sibling, 1 reply; 13+ messages in thread
From: Johan Hovold @ 2022-07-12 16:24 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Parikshit Pareek, Andy Gross, Bjorn Andersson, Sai Prakash Ranjan,
Rajendra Nayak, Prasanna Kumar, linux-arm-msm
On Tue, Jul 12, 2022 at 08:10:44PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
> > Wrong values have been introduced for interrupts property. Fix those
> > ones, and correct the mapping of context banks to irq number.
> >
>
> And you ignored my comment about sorting the IRQs...
Isn't the order significant here? Either way, that would be a separate
change that shouldn't be merged with the fix.
Johan
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 16:24 ` Johan Hovold
@ 2022-07-12 16:41 ` Dmitry Baryshkov
2022-07-12 18:26 ` Manivannan Sadhasivam
0 siblings, 1 reply; 13+ messages in thread
From: Dmitry Baryshkov @ 2022-07-12 16:41 UTC (permalink / raw)
To: Johan Hovold
Cc: Manivannan Sadhasivam, Parikshit Pareek, Andy Gross,
Bjorn Andersson, Sai Prakash Ranjan, Rajendra Nayak,
Prasanna Kumar, linux-arm-msm
On Tue, 12 Jul 2022 at 19:24, Johan Hovold <johan@kernel.org> wrote:
>
> On Tue, Jul 12, 2022 at 08:10:44PM +0530, Manivannan Sadhasivam wrote:
> > On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
> > > Wrong values have been introduced for interrupts property. Fix those
> > > ones, and correct the mapping of context banks to irq number.
> > >
> >
> > And you ignored my comment about sorting the IRQs...
>
> Isn't the order significant here? Either way, that would be a separate
> change that shouldn't be merged with the fix.
I'd tend to agree here. Let's get the fix in first and sort the IRQs
in a separate commit. The order of them is strange indeed.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 16:41 ` Dmitry Baryshkov
@ 2022-07-12 18:26 ` Manivannan Sadhasivam
2022-07-14 7:07 ` Sai Prakash Ranjan
0 siblings, 1 reply; 13+ messages in thread
From: Manivannan Sadhasivam @ 2022-07-12 18:26 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Johan Hovold, Parikshit Pareek, Andy Gross, Bjorn Andersson,
Sai Prakash Ranjan, Rajendra Nayak, Prasanna Kumar, linux-arm-msm
On Tue, Jul 12, 2022 at 07:41:14PM +0300, Dmitry Baryshkov wrote:
> On Tue, 12 Jul 2022 at 19:24, Johan Hovold <johan@kernel.org> wrote:
> >
> > On Tue, Jul 12, 2022 at 08:10:44PM +0530, Manivannan Sadhasivam wrote:
> > > On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
> > > > Wrong values have been introduced for interrupts property. Fix those
> > > > ones, and correct the mapping of context banks to irq number.
> > > >
> > >
> > > And you ignored my comment about sorting the IRQs...
> >
> > Isn't the order significant here? Either way, that would be a separate
> > change that shouldn't be merged with the fix.
>
> I'd tend to agree here. Let's get the fix in first and sort the IRQs
> in a separate commit. The order of them is strange indeed.
>
Yeah, I was expecting a separate patch for the cleanup.
Thanks,
Mani
> --
> With best wishes
> Dmitry
--
மணிவண்ணன் சதாசிவம்
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 18:26 ` Manivannan Sadhasivam
@ 2022-07-14 7:07 ` Sai Prakash Ranjan
2022-07-15 8:20 ` Manivannan Sadhasivam
0 siblings, 1 reply; 13+ messages in thread
From: Sai Prakash Ranjan @ 2022-07-14 7:07 UTC (permalink / raw)
To: Manivannan Sadhasivam, Dmitry Baryshkov, Parikshit Pareek,
Bjorn Andersson
Cc: Johan Hovold, Andy Gross, Rajendra Nayak, Prasanna Kumar,
linux-arm-msm
Hi Mani,
On 7/12/2022 11:56 PM, Manivannan Sadhasivam wrote:
> On Tue, Jul 12, 2022 at 07:41:14PM +0300, Dmitry Baryshkov wrote:
>> On Tue, 12 Jul 2022 at 19:24, Johan Hovold <johan@kernel.org> wrote:
>>> On Tue, Jul 12, 2022 at 08:10:44PM +0530, Manivannan Sadhasivam wrote:
>>>> On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
>>>>> Wrong values have been introduced for interrupts property. Fix those
>>>>> ones, and correct the mapping of context banks to irq number.
>>>>>
>>>> And you ignored my comment about sorting the IRQs...
>>> Isn't the order significant here? Either way, that would be a separate
>>> change that shouldn't be merged with the fix.
>> I'd tend to agree here. Let's get the fix in first and sort the IRQs
>> in a separate commit. The order of them is strange indeed.
>>
As per "arm,smmu.yaml" devicetree documentation, context interrupts are specified in order of their indexing by the SMMU
and not the IRQ numbers, quoting relevant part below.
"Interrupt list, with the first #global-interrupts entries corresponding to the global interrupts
and any following entries corresponding to context interrupts, specified in order of their indexing by the SMMU."
And the current order in DT without sorting by IRQ number matches with the SMMU IP interrupt document,
For example, in the current DT order, you see 409 and then 418 instead of 410. Here 409 is app_tcu_cxt_irpt_vec[73],
418 is app_tcu_cxt_irpt_vec[74] and 410 is app_tcu_cxt_irpt_vec[90] and hence the ordering of 409, 418 .... 410.
Also the reverse ordering at the end from 913 to 891 is also as per this indexing.
So the current ordering is proper and do not require sorting.
As for the missing IRQs and duplicate ones, I will reply on the patch, looks like there are some other misconfigurations as well.
Thanks,
Sai
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-14 7:07 ` Sai Prakash Ranjan
@ 2022-07-15 8:20 ` Manivannan Sadhasivam
0 siblings, 0 replies; 13+ messages in thread
From: Manivannan Sadhasivam @ 2022-07-15 8:20 UTC (permalink / raw)
To: Sai Prakash Ranjan
Cc: Dmitry Baryshkov, Parikshit Pareek, Bjorn Andersson, Johan Hovold,
Andy Gross, Rajendra Nayak, Prasanna Kumar, linux-arm-msm
On Thu, Jul 14, 2022 at 12:37:45PM +0530, Sai Prakash Ranjan wrote:
> Hi Mani,
>
> On 7/12/2022 11:56 PM, Manivannan Sadhasivam wrote:
> > On Tue, Jul 12, 2022 at 07:41:14PM +0300, Dmitry Baryshkov wrote:
> > > On Tue, 12 Jul 2022 at 19:24, Johan Hovold <johan@kernel.org> wrote:
> > > > On Tue, Jul 12, 2022 at 08:10:44PM +0530, Manivannan Sadhasivam wrote:
> > > > > On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
> > > > > > Wrong values have been introduced for interrupts property. Fix those
> > > > > > ones, and correct the mapping of context banks to irq number.
> > > > > >
> > > > > And you ignored my comment about sorting the IRQs...
> > > > Isn't the order significant here? Either way, that would be a separate
> > > > change that shouldn't be merged with the fix.
> > > I'd tend to agree here. Let's get the fix in first and sort the IRQs
> > > in a separate commit. The order of them is strange indeed.
> > >
>
> As per "arm,smmu.yaml" devicetree documentation, context interrupts are specified in order of their indexing by the SMMU
> and not the IRQ numbers, quoting relevant part below.
>
> "Interrupt list, with the first #global-interrupts entries corresponding to the global interrupts
> and any following entries corresponding to context interrupts, specified in order of their indexing by the SMMU."
>
> And the current order in DT without sorting by IRQ number matches with the SMMU IP interrupt document,
>
> For example, in the current DT order, you see 409 and then 418 instead of 410. Here 409 is app_tcu_cxt_irpt_vec[73],
> 418 is app_tcu_cxt_irpt_vec[74] and 410 is app_tcu_cxt_irpt_vec[90] and hence the ordering of 409, 418 .... 410.
> Also the reverse ordering at the end from 913 to 891 is also as per this indexing.
>
> So the current ordering is proper and do not require sorting.
>
Ah, I missed reading the binding. Sorry for the noise.
> As for the missing IRQs and duplicate ones, I will reply on the patch, looks like there are some other misconfigurations as well.
>
Thanks,
Mani
> Thanks,
> Sai
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 14:00 [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq Parikshit Pareek
2022-07-12 14:40 ` Manivannan Sadhasivam
@ 2022-07-12 16:22 ` Johan Hovold
2022-07-12 16:41 ` Andrew Halaney
` (2 subsequent siblings)
4 siblings, 0 replies; 13+ messages in thread
From: Johan Hovold @ 2022-07-12 16:22 UTC (permalink / raw)
To: Parikshit Pareek
Cc: Andy Gross, Bjorn Andersson, Sai Prakash Ranjan, Rajendra Nayak,
Prasanna Kumar, linux-arm-msm
On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
> Wrong values have been introduced for interrupts property. Fix those
> ones, and correct the mapping of context banks to irq number.
>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 7945cbb57bb4..1276a833251e 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1580,7 +1580,6 @@
> <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
> @@ -1591,6 +1590,7 @@
> <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
Not sure how that happened. Looks correct now, thanks.
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Johan
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 14:00 [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq Parikshit Pareek
2022-07-12 14:40 ` Manivannan Sadhasivam
2022-07-12 16:22 ` Johan Hovold
@ 2022-07-12 16:41 ` Andrew Halaney
2022-07-14 7:17 ` Sai Prakash Ranjan
2022-07-15 8:13 ` Sai Prakash Ranjan
4 siblings, 0 replies; 13+ messages in thread
From: Andrew Halaney @ 2022-07-12 16:41 UTC (permalink / raw)
To: Parikshit Pareek
Cc: Andy Gross, Bjorn Andersson, Sai Prakash Ranjan, Rajendra Nayak,
Prasanna Kumar, linux-arm-msm
On Tue, Jul 12, 2022 at 07:30:09PM +0530, Parikshit Pareek wrote:
> Wrong values have been introduced for interrupts property. Fix those
> ones, and correct the mapping of context banks to irq number.
>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 7945cbb57bb4..1276a833251e 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1580,7 +1580,6 @@
> <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
> @@ -1591,6 +1590,7 @@
> <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
> --
> 2.17.1
>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 14:00 [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq Parikshit Pareek
` (2 preceding siblings ...)
2022-07-12 16:41 ` Andrew Halaney
@ 2022-07-14 7:17 ` Sai Prakash Ranjan
2022-07-15 8:08 ` Sai Prakash Ranjan
2022-07-15 8:13 ` Sai Prakash Ranjan
4 siblings, 1 reply; 13+ messages in thread
From: Sai Prakash Ranjan @ 2022-07-14 7:17 UTC (permalink / raw)
To: Parikshit Pareek, Andy Gross, Bjorn Andersson
Cc: Rajendra Nayak, Prasanna Kumar, linux-arm-msm,
Manivannan Sadhasivam, Johan Hovold, Dmitry Baryshkov,
Linux Kernel Mailing List
Hi Parikshit,
On 7/12/2022 7:30 PM, Parikshit Pareek wrote:
> Wrong values have been introduced for interrupts property. Fix those
> ones, and correct the mapping of context banks to irq number.
>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 7945cbb57bb4..1276a833251e 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1580,7 +1580,6 @@
> <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
> @@ -1591,6 +1590,7 @@
> <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
Cross checking with the IP doc, 696 is not the only one missing, couple of other interrupts are also missing, below is the list.
Interrupt 689 and 706 are not present in the IP doc, remove it.
Interrupts 696, 697, 716, 913 are missing, I see this patch adds 696, add 697 as well.
Interrupt 890 is not a context interrupt, remove it.
Thanks,
Sai
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-14 7:17 ` Sai Prakash Ranjan
@ 2022-07-15 8:08 ` Sai Prakash Ranjan
0 siblings, 0 replies; 13+ messages in thread
From: Sai Prakash Ranjan @ 2022-07-15 8:08 UTC (permalink / raw)
To: Parikshit Pareek, Andy Gross, Bjorn Andersson
Cc: Rajendra Nayak, Prasanna Kumar, linux-arm-msm,
Manivannan Sadhasivam, Johan Hovold, Dmitry Baryshkov,
Linux Kernel Mailing List
On 7/14/2022 12:47 PM, Sai Prakash Ranjan wrote:
> Hi Parikshit,
>
> On 7/12/2022 7:30 PM, Parikshit Pareek wrote:
>> Wrong values have been introduced for interrupts property. Fix those
>> ones, and correct the mapping of context banks to irq number.
>>
>> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
>> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> index 7945cbb57bb4..1276a833251e 100644
>> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> @@ -1580,7 +1580,6 @@
>> <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
>> @@ -1591,6 +1590,7 @@
>> <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
>
> Cross checking with the IP doc, 696 is not the only one missing, couple of other interrupts are also missing, below is the list.
>
> Interrupt 689 and 706 are not present in the IP doc, remove it.
> Interrupts 696, 697, 716, 913 are missing, I see this patch adds 696, add 697 as well.
> Interrupt 890 is not a context interrupt, remove it.
>
>
Checking offline with Parikshit, looks like adding all these entries results in interrupt selftest failures.
So for now, we can just have the original patch merged till these failures are debugged further with internal teams.
Thanks,
Sai
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq
2022-07-12 14:00 [PATCH v2] arm64: dts: qcom: sc8280xp: fix apps_smmu irq Parikshit Pareek
` (3 preceding siblings ...)
2022-07-14 7:17 ` Sai Prakash Ranjan
@ 2022-07-15 8:13 ` Sai Prakash Ranjan
4 siblings, 0 replies; 13+ messages in thread
From: Sai Prakash Ranjan @ 2022-07-15 8:13 UTC (permalink / raw)
To: Parikshit Pareek, Andy Gross, Bjorn Andersson
Cc: Rajendra Nayak, Prasanna Kumar, linux-arm-msm
On 7/12/2022 7:30 PM, Parikshit Pareek wrote:
> Wrong values have been introduced for interrupts property. Fix those
> ones, and correct the mapping of context banks to irq number.
>
> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 7945cbb57bb4..1276a833251e 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1580,7 +1580,6 @@
> <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
> @@ -1591,6 +1590,7 @@
> <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Thanks,
Sai
^ permalink raw reply [flat|nested] 13+ messages in thread