All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Bjorn Helgaas" <helgaas@kernel.org>,
	"Gregory CLEMENT" <gregory.clement@bootlin.com>,
	pali@kernel.org, "Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Marek Behún" <kabel@kernel.org>
Subject: [PATCH v2 09/10] PCI: aardvark: Explicitly disable Marvell strict ordering
Date: Tue, 27 Sep 2022 16:19:25 +0200	[thread overview]
Message-ID: <20220927141926.8895-10-kabel@kernel.org> (raw)
In-Reply-To: <20220927141926.8895-1-kabel@kernel.org>

Instead of implicitly disabling BIT(5) (STRICT_ORDER_ENABLE bit) of the
CORE_CTRL2 by writing PCIE_CORE_CTRL2_RESERVED |
PCIE_CORE_CTRL2_TD_ENABLE to it, disable it explicitly, with
read-modify-write.

Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/pci/controller/pci-aardvark.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index e816ab726f66..73a604f70f06 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -600,8 +600,8 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
 	advk_writel(pcie, reg, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL);
 
 	/* Program PCIe Control 2 to disable strict ordering */
-	reg = PCIE_CORE_CTRL2_RESERVED |
-		PCIE_CORE_CTRL2_TD_ENABLE;
+	reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);
+	reg &= ~PCIE_CORE_CTRL2_STRICT_ORDER_ENABLE;
 	advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
 
 	/* Set lane X1 */
-- 
2.35.1


WARNING: multiple messages have this Message-ID (diff)
From: "Marek Behún" <kabel@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Bjorn Helgaas" <helgaas@kernel.org>,
	"Gregory CLEMENT" <gregory.clement@bootlin.com>,
	pali@kernel.org, "Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Marek Behún" <kabel@kernel.org>
Subject: [PATCH v2 09/10] PCI: aardvark: Explicitly disable Marvell strict ordering
Date: Tue, 27 Sep 2022 16:19:25 +0200	[thread overview]
Message-ID: <20220927141926.8895-10-kabel@kernel.org> (raw)
In-Reply-To: <20220927141926.8895-1-kabel@kernel.org>

Instead of implicitly disabling BIT(5) (STRICT_ORDER_ENABLE bit) of the
CORE_CTRL2 by writing PCIE_CORE_CTRL2_RESERVED |
PCIE_CORE_CTRL2_TD_ENABLE to it, disable it explicitly, with
read-modify-write.

Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/pci/controller/pci-aardvark.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index e816ab726f66..73a604f70f06 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -600,8 +600,8 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
 	advk_writel(pcie, reg, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL);
 
 	/* Program PCIe Control 2 to disable strict ordering */
-	reg = PCIE_CORE_CTRL2_RESERVED |
-		PCIE_CORE_CTRL2_TD_ENABLE;
+	reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);
+	reg &= ~PCIE_CORE_CTRL2_STRICT_ORDER_ENABLE;
 	advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
 
 	/* Set lane X1 */
-- 
2.35.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-09-27 14:20 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-27 14:19 [PATCH v2 00/10] PCI: aardvark controller changes BATCH 6 Marek Behún
2022-09-27 14:19 ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 01/10] PCI: pciehp: Enable Command Completed Interrupt only if supported Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-12-07 14:29   ` Bjorn Helgaas
2022-12-07 14:29     ` Bjorn Helgaas
2022-09-27 14:19 ` [PATCH v2 02/10] PCI: aardvark: Add support for DLLSC and hotplug interrupt Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 03/10] PCI: aardvark: Send Set_Slot_Power_Limit message Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 04/10] arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIe Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-11-27 23:36   ` Gregory CLEMENT
2022-11-27 23:36     ` Gregory CLEMENT
2022-09-27 14:19 ` [PATCH v2 05/10] PCI: aardvark: Add clock support Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 06/10] PCI: aardvark: Add suspend to RAM support Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 07/10] PCI: aardvark: Replace custom PCIE_CORE_ERR_CAPCTL_* macros by linux/pci_regs.h macros Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` [PATCH v2 08/10] PCI: aardvark: Don't write read-only bits explicitly in PCI_ERR_CAP register Marek Behún
2022-09-27 14:19   ` Marek Behún
2022-09-27 14:19 ` Marek Behún [this message]
2022-09-27 14:19   ` [PATCH v2 09/10] PCI: aardvark: Explicitly disable Marvell strict ordering Marek Behún
2022-09-27 14:19 ` [PATCH v2 10/10] PCI: aardvark: Cleanup some register macros Marek Behún
2022-09-27 14:19   ` Marek Behún

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220927141926.8895-10-kabel@kernel.org \
    --to=kabel@kernel.org \
    --cc=gregory.clement@bootlin.com \
    --cc=helgaas@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=pali@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.