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From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, Guo Ren <guoren@kernel.org>
Subject: [PATCH 0/5] Add Sipeed Lichee Pi 4A RISC-V board support
Date: Mon,  8 May 2023 02:22:59 +0800	[thread overview]
Message-ID: <20230507182304.2934-1-jszhang@kernel.org> (raw)

Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
module which is powered by T-HEAD's light(a.k.a TH1520) SoC. Add
minimal device tree files for the core module and the development
board.

Support basic uart/gpio/dmac drivers, so supports booting to a basic
shell.

Jisheng Zhang (5):
  irqchip/sifive-plic: Support T-HEAD's C910 PLIC
  riscv: Add the T-HEAD SoC family Kconfig option
  riscv: dts: add initial T-HEAD light SoC device tree
  riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
  MAINTAINERS: add entry for T-HEAD RISC-V SoC

 .../sifive,plic-1.0.0.yaml                    |   4 +
 MAINTAINERS                                   |   6 +
 arch/riscv/Kconfig.socs                       |   6 +
 arch/riscv/boot/dts/Makefile                  |   1 +
 arch/riscv/boot/dts/thead/Makefile            |   2 +
 .../dts/thead/light-lichee-module-4a.dtsi     |  38 ++
 .../boot/dts/thead/light-lichee-pi-4a.dts     |  32 ++
 arch/riscv/boot/dts/thead/light.dtsi          | 454 ++++++++++++++++++
 drivers/irqchip/irq-sifive-plic.c             |   1 +
 9 files changed, 544 insertions(+)
 create mode 100644 arch/riscv/boot/dts/thead/Makefile
 create mode 100644 arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi
 create mode 100644 arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts
 create mode 100644 arch/riscv/boot/dts/thead/light.dtsi

-- 
2.40.0


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WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, Guo Ren <guoren@kernel.org>
Subject: [PATCH 0/5] Add Sipeed Lichee Pi 4A RISC-V board support
Date: Mon,  8 May 2023 02:22:59 +0800	[thread overview]
Message-ID: <20230507182304.2934-1-jszhang@kernel.org> (raw)

Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
module which is powered by T-HEAD's light(a.k.a TH1520) SoC. Add
minimal device tree files for the core module and the development
board.

Support basic uart/gpio/dmac drivers, so supports booting to a basic
shell.

Jisheng Zhang (5):
  irqchip/sifive-plic: Support T-HEAD's C910 PLIC
  riscv: Add the T-HEAD SoC family Kconfig option
  riscv: dts: add initial T-HEAD light SoC device tree
  riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
  MAINTAINERS: add entry for T-HEAD RISC-V SoC

 .../sifive,plic-1.0.0.yaml                    |   4 +
 MAINTAINERS                                   |   6 +
 arch/riscv/Kconfig.socs                       |   6 +
 arch/riscv/boot/dts/Makefile                  |   1 +
 arch/riscv/boot/dts/thead/Makefile            |   2 +
 .../dts/thead/light-lichee-module-4a.dtsi     |  38 ++
 .../boot/dts/thead/light-lichee-pi-4a.dts     |  32 ++
 arch/riscv/boot/dts/thead/light.dtsi          | 454 ++++++++++++++++++
 drivers/irqchip/irq-sifive-plic.c             |   1 +
 9 files changed, 544 insertions(+)
 create mode 100644 arch/riscv/boot/dts/thead/Makefile
 create mode 100644 arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi
 create mode 100644 arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts
 create mode 100644 arch/riscv/boot/dts/thead/light.dtsi

-- 
2.40.0


             reply	other threads:[~2023-05-07 18:34 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-07 18:22 Jisheng Zhang [this message]
2023-05-07 18:22 ` [PATCH 0/5] Add Sipeed Lichee Pi 4A RISC-V board support Jisheng Zhang
2023-05-07 18:23 ` [PATCH 1/5] irqchip/sifive-plic: Support T-HEAD's C910 PLIC Jisheng Zhang
2023-05-07 18:23   ` Jisheng Zhang
2023-05-07 21:18   ` Conor Dooley
2023-05-07 21:18     ` Conor Dooley
2023-05-08  3:14   ` Icenowy Zheng
2023-05-08  3:14     ` Icenowy Zheng
2023-05-08  6:52   ` Guo Ren
2023-05-08  6:52     ` Guo Ren
2023-05-08  7:07     ` Conor Dooley
2023-05-08  7:07       ` Conor Dooley
2023-05-08 16:09     ` Jisheng Zhang
2023-05-08 16:09       ` Jisheng Zhang
2023-05-08  9:17   ` Krzysztof Kozlowski
2023-05-08  9:17     ` Krzysztof Kozlowski
2023-05-07 18:23 ` [PATCH 2/5] riscv: Add the T-HEAD SoC family Kconfig option Jisheng Zhang
2023-05-07 18:23   ` Jisheng Zhang
2023-05-07 21:22   ` Conor Dooley
2023-05-07 21:22     ` Conor Dooley
2023-05-08  6:42     ` Guo Ren
2023-05-08  6:42       ` Guo Ren
2023-05-08  6:52       ` Conor Dooley
2023-05-08  6:52         ` Conor Dooley
2023-05-08  6:58         ` Guo Ren
2023-05-08  6:58           ` Guo Ren
2023-05-08  7:04           ` Conor Dooley
2023-05-08  7:04             ` Conor Dooley
2023-05-07 18:23 ` [PATCH 3/5] riscv: dts: add initial T-HEAD light SoC device tree Jisheng Zhang
2023-05-07 18:23   ` Jisheng Zhang
2023-05-07 21:35   ` Conor Dooley
2023-05-07 21:35     ` Conor Dooley
2023-05-08  3:32     ` Icenowy Zheng
2023-05-08  3:32       ` Icenowy Zheng
2023-05-08  7:01       ` Conor Dooley
2023-05-08  7:01         ` Conor Dooley
2023-05-08  8:23       ` Heiko Stübner
2023-05-08  8:23         ` Heiko Stübner
2023-05-08  8:35         ` Conor Dooley
2023-05-08  8:35           ` Conor Dooley
2023-05-08 15:56           ` Heiko Stübner
2023-05-08 15:56             ` Heiko Stübner
2023-05-08 16:26     ` Jisheng Zhang
2023-05-08 16:26       ` Jisheng Zhang
2023-05-08 16:44       ` Conor Dooley
2023-05-08 16:44         ` Conor Dooley
2023-05-08 17:09         ` Heiko Stübner
2023-05-08 17:09           ` Heiko Stübner
2023-05-21 15:37         ` Guo Ren
2023-05-21 15:37           ` Guo Ren
2023-05-21 17:08           ` Conor Dooley
2023-05-21 17:08             ` Conor Dooley
2023-05-22  1:36             ` Guo Ren
2023-05-22  1:36               ` Guo Ren
2023-05-08  9:20   ` Krzysztof Kozlowski
2023-05-08  9:20     ` Krzysztof Kozlowski
2023-05-07 18:23 ` [PATCH 4/5] riscv: dts: thead: add sipeed Lichee Pi 4A board " Jisheng Zhang
2023-05-07 18:23   ` Jisheng Zhang
2023-05-07 21:27   ` Conor Dooley
2023-05-07 21:27     ` Conor Dooley
2023-05-08  6:44   ` Guo Ren
2023-05-08  6:44     ` Guo Ren
2023-05-07 18:23 ` [PATCH 5/5] MAINTAINERS: add entry for T-HEAD RISC-V SoC Jisheng Zhang
2023-05-07 18:23   ` Jisheng Zhang
2023-05-07 21:21   ` Conor Dooley
2023-05-07 21:21     ` Conor Dooley
2023-05-08 16:17     ` Jisheng Zhang
2023-05-08 16:17       ` Jisheng Zhang
2023-05-08 17:23       ` Conor Dooley
2023-05-08 17:23         ` Conor Dooley
2023-05-08  6:22   ` Guo Ren
2023-05-08  6:22     ` Guo Ren
2023-05-08  6:16 ` [PATCH 0/5] Add Sipeed Lichee Pi 4A RISC-V board support Guo Ren
2023-05-08  6:16   ` Guo Ren

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