From: Conor Dooley <conor@kernel.org>
To: daire.mcnamara@microchip.com
Cc: "Conor Dooley" <conor.dooley@microchip.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 7/8] PCI: microchip: Rename and refactor mc_pcie_enable_msi()
Date: Sun, 2 Jul 2023 00:13:17 +0100 [thread overview]
Message-ID: <20230702-audacity-gradient-a7871e31a97a@spud> (raw)
In-Reply-To: <20230630154859.2049521-8-daire.mcnamara@microchip.com>
[-- Attachment #1: Type: text/plain, Size: 625 bytes --]
On Fri, Jun 30, 2023 at 04:48:58PM +0100, daire.mcnamara@microchip.com wrote:
> From: Daire McNamara <daire.mcnamara@microchip.com>
>
> After improving driver to get MSI-related information from
> configuration registers (set at power on from the Libero FPGA
> design), its now clear that mc_pcie_enable_msi() is not a good
> name for this function. The function is better named as
> mc_pcie_fixup_ecam() as its purpose is to correct the queue
> size of the MSI CAP CTRL.
>
> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: daire.mcnamara@microchip.com
Cc: "Conor Dooley" <conor.dooley@microchip.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 7/8] PCI: microchip: Rename and refactor mc_pcie_enable_msi()
Date: Sun, 2 Jul 2023 00:13:17 +0100 [thread overview]
Message-ID: <20230702-audacity-gradient-a7871e31a97a@spud> (raw)
In-Reply-To: <20230630154859.2049521-8-daire.mcnamara@microchip.com>
[-- Attachment #1.1: Type: text/plain, Size: 625 bytes --]
On Fri, Jun 30, 2023 at 04:48:58PM +0100, daire.mcnamara@microchip.com wrote:
> From: Daire McNamara <daire.mcnamara@microchip.com>
>
> After improving driver to get MSI-related information from
> configuration registers (set at power on from the Libero FPGA
> design), its now clear that mc_pcie_enable_msi() is not a good
> name for this function. The function is better named as
> mc_pcie_fixup_ecam() as its purpose is to correct the queue
> size of the MSI CAP CTRL.
>
> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cheers,
Conor.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-07-01 23:13 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 15:48 [PATCH v2 0/8] PCI: microchip: Fixes and clean-ups daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 1/8] PCI: microchip: Correct the DED and SEC interrupt bit offsets daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 2/8] PCI: microchip: Enable building driver as a module daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 3/8] PCI: microchip: Align register, offset, and mask names with hw docs daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 4/8] PCI: microchip: Enable event handlers to access bridge and ctrl ptrs daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 5/8] PCI: microchip: Clean up initialisation of interrupts daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 6/8] PCI: microchip: Gather MSI information from hardware config registers daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 7/8] PCI: microchip: Rename and refactor mc_pcie_enable_msi() daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-07-01 23:13 ` Conor Dooley [this message]
2023-07-01 23:13 ` Conor Dooley
2023-07-19 17:41 ` Bjorn Helgaas
2023-07-19 17:41 ` Bjorn Helgaas
2023-07-27 15:27 ` Lorenzo Pieralisi
2023-07-27 15:27 ` Lorenzo Pieralisi
2023-06-30 15:48 ` [PATCH v2 8/8] PCI: microchip: Re-partition code between probe() and init() daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-07-19 17:00 ` [PATCH v2 0/8] PCI: microchip: Fixes and clean-ups Conor Dooley
2023-07-19 17:00 ` Conor Dooley
2023-07-20 8:07 ` Lorenzo Pieralisi
2023-07-20 8:07 ` Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230702-audacity-gradient-a7871e31a97a@spud \
--to=conor@kernel.org \
--cc=bhelgaas@google.com \
--cc=conor.dooley@microchip.com \
--cc=daire.mcnamara@microchip.com \
--cc=kw@linux.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.