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From: Conor Dooley <conor@kernel.org>
To: daire.mcnamara@microchip.com
Cc: "Conor Dooley" <conor.dooley@microchip.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 0/8] PCI: microchip: Fixes and clean-ups
Date: Wed, 19 Jul 2023 18:00:37 +0100	[thread overview]
Message-ID: <20230719-roster-preheated-799d7e103ddb@spud> (raw)
In-Reply-To: <20230630154859.2049521-1-daire.mcnamara@microchip.com>

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Hey folks,

On Fri, Jun 30, 2023 at 04:48:51PM +0100, daire.mcnamara@microchip.com wrote:
> From: Daire McNamara <daire.mcnamara@microchip.com>
> 
> This patch series contains fixes and clean-ups for the Microchip PolarFire SoC PCIe driver
> 
> These patches are extracted from the link below to separate them from the outbound and inbound
> range handling which is taking considerable time.
> Link: https://lore.kernel.org/linux-riscv/20230111125323.1911373-1-daire.mcnamara@microchip.com/
> 
> These patches are regenerated on v6.4-rc6.
> 
> Main Changes from v1:
> - Dropped "Remove cast warning for devm_add_action_or_reset()". This
>   has been overtaken by a patch series from Krzysztof Wilczynski.
> - Improved the comment for "Enable building driver as a module" to
>   clarify what enables building the driver as a module.
> - Split "Gather MSI information from hardware config registers",
>   for clarity, into:
>    - "Gather MSI information from hardware config registers" purely
>       changing the of source of MSI-related information (Num MSIs and
>       MSI address) from #defines (which can be incorrect) to FPGA
>       configuration registers (which is the ultimate source of truth),
>       and a
>    - "Rename and refactor ..." patch as a function's code is now clearly
>       unrelated to its current name.

This series has been sitting with reviews (albeit from myself) for a
couple of weeks. What's missing to get this series picked up?

Thanks,
Conor.

> cc: Conor Dooley <conor.dooley@microchip.com>
> cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
> cc: "Krzysztof Wilczyński" <kw@linux.com>
> cc: Rob Herring <robh@kernel.org>
> cc: Bjorn Helgaas <bhelgaas@google.com>
> cc: linux-riscv@lists.infradead.org
> cc: linux-pci@vger.kernel.org
> 
> Daire McNamara (8):
>   PCI: microchip: Correct the DED and SEC interrupt bit offsets
>   PCI: microchip: Enable building driver as a module
>   PCI: microchip: Align register, offset, and mask names with hw docs
>   PCI: microchip: Enable event handlers to access bridge and ctrl ptrs
>   PCI: microchip: Clean up initialisation of interrupts
>   PCI: microchip: Gather MSI information from hardware config registers
>   PCI: microchip: Rename and refactor mc_pcie_enable_msi()
>   PCI: microchip: Re-partition code between probe() and init()
> 
>  drivers/pci/controller/Kconfig               |   2 +-
>  drivers/pci/controller/pcie-microchip-host.c | 402 +++++++++++--------
>  2 files changed, 238 insertions(+), 166 deletions(-)
> 
> 
> base-commit: 858fd168a95c5b9669aac8db6c14a9aeab446375
> -- 
> 2.25.1
> 

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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: daire.mcnamara@microchip.com
Cc: "Conor Dooley" <conor.dooley@microchip.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 0/8] PCI: microchip: Fixes and clean-ups
Date: Wed, 19 Jul 2023 18:00:37 +0100	[thread overview]
Message-ID: <20230719-roster-preheated-799d7e103ddb@spud> (raw)
In-Reply-To: <20230630154859.2049521-1-daire.mcnamara@microchip.com>


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Hey folks,

On Fri, Jun 30, 2023 at 04:48:51PM +0100, daire.mcnamara@microchip.com wrote:
> From: Daire McNamara <daire.mcnamara@microchip.com>
> 
> This patch series contains fixes and clean-ups for the Microchip PolarFire SoC PCIe driver
> 
> These patches are extracted from the link below to separate them from the outbound and inbound
> range handling which is taking considerable time.
> Link: https://lore.kernel.org/linux-riscv/20230111125323.1911373-1-daire.mcnamara@microchip.com/
> 
> These patches are regenerated on v6.4-rc6.
> 
> Main Changes from v1:
> - Dropped "Remove cast warning for devm_add_action_or_reset()". This
>   has been overtaken by a patch series from Krzysztof Wilczynski.
> - Improved the comment for "Enable building driver as a module" to
>   clarify what enables building the driver as a module.
> - Split "Gather MSI information from hardware config registers",
>   for clarity, into:
>    - "Gather MSI information from hardware config registers" purely
>       changing the of source of MSI-related information (Num MSIs and
>       MSI address) from #defines (which can be incorrect) to FPGA
>       configuration registers (which is the ultimate source of truth),
>       and a
>    - "Rename and refactor ..." patch as a function's code is now clearly
>       unrelated to its current name.

This series has been sitting with reviews (albeit from myself) for a
couple of weeks. What's missing to get this series picked up?

Thanks,
Conor.

> cc: Conor Dooley <conor.dooley@microchip.com>
> cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
> cc: "Krzysztof Wilczyński" <kw@linux.com>
> cc: Rob Herring <robh@kernel.org>
> cc: Bjorn Helgaas <bhelgaas@google.com>
> cc: linux-riscv@lists.infradead.org
> cc: linux-pci@vger.kernel.org
> 
> Daire McNamara (8):
>   PCI: microchip: Correct the DED and SEC interrupt bit offsets
>   PCI: microchip: Enable building driver as a module
>   PCI: microchip: Align register, offset, and mask names with hw docs
>   PCI: microchip: Enable event handlers to access bridge and ctrl ptrs
>   PCI: microchip: Clean up initialisation of interrupts
>   PCI: microchip: Gather MSI information from hardware config registers
>   PCI: microchip: Rename and refactor mc_pcie_enable_msi()
>   PCI: microchip: Re-partition code between probe() and init()
> 
>  drivers/pci/controller/Kconfig               |   2 +-
>  drivers/pci/controller/pcie-microchip-host.c | 402 +++++++++++--------
>  2 files changed, 238 insertions(+), 166 deletions(-)
> 
> 
> base-commit: 858fd168a95c5b9669aac8db6c14a9aeab446375
> -- 
> 2.25.1
> 

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  parent reply	other threads:[~2023-07-19 17:00 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-30 15:48 [PATCH v2 0/8] PCI: microchip: Fixes and clean-ups daire.mcnamara
2023-06-30 15:48 ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 1/8] PCI: microchip: Correct the DED and SEC interrupt bit offsets daire.mcnamara
2023-06-30 15:48   ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 2/8] PCI: microchip: Enable building driver as a module daire.mcnamara
2023-06-30 15:48   ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 3/8] PCI: microchip: Align register, offset, and mask names with hw docs daire.mcnamara
2023-06-30 15:48   ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 4/8] PCI: microchip: Enable event handlers to access bridge and ctrl ptrs daire.mcnamara
2023-06-30 15:48   ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 5/8] PCI: microchip: Clean up initialisation of interrupts daire.mcnamara
2023-06-30 15:48   ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 6/8] PCI: microchip: Gather MSI information from hardware config registers daire.mcnamara
2023-06-30 15:48   ` daire.mcnamara
2023-06-30 15:48 ` [PATCH v2 7/8] PCI: microchip: Rename and refactor mc_pcie_enable_msi() daire.mcnamara
2023-06-30 15:48   ` daire.mcnamara
2023-07-01 23:13   ` Conor Dooley
2023-07-01 23:13     ` Conor Dooley
2023-07-19 17:41   ` Bjorn Helgaas
2023-07-19 17:41     ` Bjorn Helgaas
2023-07-27 15:27     ` Lorenzo Pieralisi
2023-07-27 15:27       ` Lorenzo Pieralisi
2023-06-30 15:48 ` [PATCH v2 8/8] PCI: microchip: Re-partition code between probe() and init() daire.mcnamara
2023-06-30 15:48   ` daire.mcnamara
2023-07-19 17:00 ` Conor Dooley [this message]
2023-07-19 17:00   ` [PATCH v2 0/8] PCI: microchip: Fixes and clean-ups Conor Dooley
2023-07-20  8:07   ` Lorenzo Pieralisi
2023-07-20  8:07     ` Lorenzo Pieralisi

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