From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Conor Dooley <conor@kernel.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Hal Feng <hal.feng@starfivetech.com>,
Xingyu Wu <xingyu.wu@starfivetech.com>,
"William Qiu" <william.qiu@starfivetech.com>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: [PATCH v7 2/7] dt-bindings: soc: starfive: Add StarFive syscon module
Date: Mon, 17 Jul 2023 10:30:35 +0800 [thread overview]
Message-ID: <20230717023040.78860-3-xingyu.wu@starfivetech.com> (raw)
In-Reply-To: <20230717023040.78860-1-xingyu.wu@starfivetech.com>
From: William Qiu <william.qiu@starfivetech.com>
Add documentation to describe StarFive System Controller Registers.
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
---
.../soc/starfive/starfive,jh7110-syscon.yaml | 93 +++++++++++++++++++
MAINTAINERS | 7 ++
2 files changed, 100 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
new file mode 100644
index 000000000000..0039319e91fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 SoC system controller
+
+maintainers:
+ - William Qiu <william.qiu@starfivetech.com>
+
+description:
+ The StarFive JH7110 SoC system controller provides register information such
+ as offset, mask and shift to configure related modules such as MMC and PCIe.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: starfive,jh7110-sys-syscon
+ - const: syscon
+ - const: simple-mfd
+ - items:
+ - enum:
+ - starfive,jh7110-aon-syscon
+ - starfive,jh7110-stg-syscon
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ clock-controller:
+ $ref: /schemas/clock/starfive,jh7110-pll.yaml#
+ type: object
+
+ "#power-domain-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh7110-sys-syscon
+ then:
+ required:
+ - clock-controller
+ else:
+ properties:
+ clock-controller: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh7110-aon-syscon
+ then:
+ required:
+ - "#power-domain-cells"
+ else:
+ properties:
+ "#power-domain-cells": false
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@10240000 {
+ compatible = "starfive,jh7110-stg-syscon", "syscon";
+ reg = <0x10240000 0x1000>;
+ };
+
+ syscon@13030000 {
+ compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
+ reg = <0x13030000 0x1000>;
+
+ clock-controller {
+ compatible = "starfive,jh7110-pll";
+ clocks = <&osc>;
+ #clock-cells = <1>;
+ };
+ };
+
+ syscon@17010000 {
+ compatible = "starfive,jh7110-aon-syscon", "syscon";
+ reg = <0x17010000 0x1000>;
+ #power-domain-cells = <1>;
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index aee340630eca..44b4358c3c3a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20282,6 +20282,12 @@ S: Supported
F: Documentation/devicetree/bindings/mmc/starfive*
F: drivers/mmc/host/dw_mmc-starfive.c
+STARFIVE JH7110 SYSCON
+M: William Qiu <william.qiu@starfivetech.com>
+M: Xingyu Wu <xingyu.wu@starfivetech.com>
+S: Supported
+F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
+
STARFIVE JH7110 TDM DRIVER
M: Walker Chen <walker.chen@starfivetech.com>
S: Maintained
@@ -20331,6 +20337,7 @@ STARFIVE SOC DRIVERS
M: Conor Dooley <conor@kernel.org>
S: Maintained
T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F: Documentation/devicetree/bindings/soc/starfive/
F: drivers/soc/starfive/
STARFIVE TRNG DRIVER
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Conor Dooley <conor@kernel.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Hal Feng <hal.feng@starfivetech.com>,
Xingyu Wu <xingyu.wu@starfivetech.com>,
"William Qiu" <william.qiu@starfivetech.com>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: [PATCH v7 2/7] dt-bindings: soc: starfive: Add StarFive syscon module
Date: Mon, 17 Jul 2023 10:30:35 +0800 [thread overview]
Message-ID: <20230717023040.78860-3-xingyu.wu@starfivetech.com> (raw)
In-Reply-To: <20230717023040.78860-1-xingyu.wu@starfivetech.com>
From: William Qiu <william.qiu@starfivetech.com>
Add documentation to describe StarFive System Controller Registers.
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
---
.../soc/starfive/starfive,jh7110-syscon.yaml | 93 +++++++++++++++++++
MAINTAINERS | 7 ++
2 files changed, 100 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
new file mode 100644
index 000000000000..0039319e91fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 SoC system controller
+
+maintainers:
+ - William Qiu <william.qiu@starfivetech.com>
+
+description:
+ The StarFive JH7110 SoC system controller provides register information such
+ as offset, mask and shift to configure related modules such as MMC and PCIe.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: starfive,jh7110-sys-syscon
+ - const: syscon
+ - const: simple-mfd
+ - items:
+ - enum:
+ - starfive,jh7110-aon-syscon
+ - starfive,jh7110-stg-syscon
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ clock-controller:
+ $ref: /schemas/clock/starfive,jh7110-pll.yaml#
+ type: object
+
+ "#power-domain-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh7110-sys-syscon
+ then:
+ required:
+ - clock-controller
+ else:
+ properties:
+ clock-controller: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh7110-aon-syscon
+ then:
+ required:
+ - "#power-domain-cells"
+ else:
+ properties:
+ "#power-domain-cells": false
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@10240000 {
+ compatible = "starfive,jh7110-stg-syscon", "syscon";
+ reg = <0x10240000 0x1000>;
+ };
+
+ syscon@13030000 {
+ compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
+ reg = <0x13030000 0x1000>;
+
+ clock-controller {
+ compatible = "starfive,jh7110-pll";
+ clocks = <&osc>;
+ #clock-cells = <1>;
+ };
+ };
+
+ syscon@17010000 {
+ compatible = "starfive,jh7110-aon-syscon", "syscon";
+ reg = <0x17010000 0x1000>;
+ #power-domain-cells = <1>;
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index aee340630eca..44b4358c3c3a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20282,6 +20282,12 @@ S: Supported
F: Documentation/devicetree/bindings/mmc/starfive*
F: drivers/mmc/host/dw_mmc-starfive.c
+STARFIVE JH7110 SYSCON
+M: William Qiu <william.qiu@starfivetech.com>
+M: Xingyu Wu <xingyu.wu@starfivetech.com>
+S: Supported
+F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
+
STARFIVE JH7110 TDM DRIVER
M: Walker Chen <walker.chen@starfivetech.com>
S: Maintained
@@ -20331,6 +20337,7 @@ STARFIVE SOC DRIVERS
M: Conor Dooley <conor@kernel.org>
S: Maintained
T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
+F: Documentation/devicetree/bindings/soc/starfive/
F: drivers/soc/starfive/
STARFIVE TRNG DRIVER
--
2.25.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-07-17 2:31 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-17 2:30 [PATCH v7 0/7] Add PLL clocks driver and syscon for StarFive JH7110 SoC Xingyu Wu
2023-07-17 2:30 ` Xingyu Wu
2023-07-17 2:30 ` [PATCH v7 1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Xingyu Wu
2023-07-17 2:30 ` Xingyu Wu
2023-07-19 15:45 ` Emil Renner Berthing
2023-07-19 15:45 ` Emil Renner Berthing
2023-07-17 2:30 ` Xingyu Wu [this message]
2023-07-17 2:30 ` [PATCH v7 2/7] dt-bindings: soc: starfive: Add StarFive syscon module Xingyu Wu
2023-07-17 2:30 ` [PATCH v7 3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Xingyu Wu
2023-07-17 2:30 ` Xingyu Wu
2023-07-17 2:30 ` [PATCH v7 4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Xingyu Wu
2023-07-17 2:30 ` Xingyu Wu
2023-07-17 2:30 ` [PATCH v7 5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Xingyu Wu
2023-07-17 2:30 ` Xingyu Wu
2023-07-19 15:49 ` Emil Renner Berthing
2023-07-19 15:49 ` Emil Renner Berthing
2023-07-17 2:30 ` [PATCH v7 6/7] riscv: dts: starfive: jh7110: Add syscon nodes Xingyu Wu
2023-07-17 2:30 ` Xingyu Wu
2023-07-17 2:30 ` [PATCH v7 7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node Xingyu Wu
2023-07-17 2:30 ` Xingyu Wu
2023-07-17 18:14 ` [PATCH v7 0/7] Add PLL clocks driver and syscon for StarFive JH7110 SoC Conor Dooley
2023-07-17 18:14 ` Conor Dooley
2023-07-18 5:48 ` Xingyu Wu
2023-07-18 5:48 ` Xingyu Wu
2023-07-20 16:29 ` (subset) " Conor Dooley
2023-07-20 16:29 ` Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230717023040.78860-3-xingyu.wu@starfivetech.com \
--to=xingyu.wu@starfivetech.com \
--cc=aou@eecs.berkeley.edu \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=emil.renner.berthing@canonical.com \
--cc=hal.feng@starfivetech.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=william.qiu@starfivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.