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From: Anup Patel <apatel@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH 1/6] RISC-V: Add defines for SBI debug console extension
Date: Tue, 10 Oct 2023 22:34:58 +0530	[thread overview]
Message-ID: <20231010170503.657189-2-apatel@ventanamicro.com> (raw)
In-Reply-To: <20231010170503.657189-1-apatel@ventanamicro.com>

We add SBI debug console extension related defines/enum to the
asm/sbi.h header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 arch/riscv/include/asm/sbi.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 5b4a1bf5f439..12dfda6bb924 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
 	SBI_EXT_HSM = 0x48534D,
 	SBI_EXT_SRST = 0x53525354,
 	SBI_EXT_PMU = 0x504D55,
+	SBI_EXT_DBCN = 0x4442434E,
 
 	/* Experimentals extensions must lie within this range */
 	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
 /* Flags defined for counter stop function */
 #define SBI_PMU_STOP_FLAG_RESET (1 << 0)
 
+enum sbi_ext_dbcn_fid {
+	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
+	SBI_EXT_DBCN_CONSOLE_READ = 1,
+	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
+};
+
 #define SBI_SPEC_VERSION_DEFAULT	0x1
 #define SBI_SPEC_VERSION_MAJOR_SHIFT	24
 #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
-- 
2.34.1



WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Atish Patra <atishp@atishpatra.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 1/6] RISC-V: Add defines for SBI debug console extension
Date: Tue, 10 Oct 2023 22:34:58 +0530	[thread overview]
Message-ID: <20231010170503.657189-2-apatel@ventanamicro.com> (raw)
In-Reply-To: <20231010170503.657189-1-apatel@ventanamicro.com>

We add SBI debug console extension related defines/enum to the
asm/sbi.h header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 arch/riscv/include/asm/sbi.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 5b4a1bf5f439..12dfda6bb924 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
 	SBI_EXT_HSM = 0x48534D,
 	SBI_EXT_SRST = 0x53525354,
 	SBI_EXT_PMU = 0x504D55,
+	SBI_EXT_DBCN = 0x4442434E,
 
 	/* Experimentals extensions must lie within this range */
 	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
 /* Flags defined for counter stop function */
 #define SBI_PMU_STOP_FLAG_RESET (1 << 0)
 
+enum sbi_ext_dbcn_fid {
+	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
+	SBI_EXT_DBCN_CONSOLE_READ = 1,
+	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
+};
+
 #define SBI_SPEC_VERSION_DEFAULT	0x1
 #define SBI_SPEC_VERSION_MAJOR_SHIFT	24
 #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
-- 
2.34.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Atish Patra <atishp@atishpatra.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 1/6] RISC-V: Add defines for SBI debug console extension
Date: Tue, 10 Oct 2023 22:34:58 +0530	[thread overview]
Message-ID: <20231010170503.657189-2-apatel@ventanamicro.com> (raw)
In-Reply-To: <20231010170503.657189-1-apatel@ventanamicro.com>

We add SBI debug console extension related defines/enum to the
asm/sbi.h header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 arch/riscv/include/asm/sbi.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 5b4a1bf5f439..12dfda6bb924 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
 	SBI_EXT_HSM = 0x48534D,
 	SBI_EXT_SRST = 0x53525354,
 	SBI_EXT_PMU = 0x504D55,
+	SBI_EXT_DBCN = 0x4442434E,
 
 	/* Experimentals extensions must lie within this range */
 	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
 /* Flags defined for counter stop function */
 #define SBI_PMU_STOP_FLAG_RESET (1 << 0)
 
+enum sbi_ext_dbcn_fid {
+	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
+	SBI_EXT_DBCN_CONSOLE_READ = 1,
+	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
+};
+
 #define SBI_SPEC_VERSION_DEFAULT	0x1
 #define SBI_SPEC_VERSION_MAJOR_SHIFT	24
 #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Atish Patra <atishp@atishpatra.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
	linux-serial@vger.kernel.org, kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org, Conor Dooley <conor@kernel.org>,
	kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH 1/6] RISC-V: Add defines for SBI debug console extension
Date: Tue, 10 Oct 2023 22:34:58 +0530	[thread overview]
Message-ID: <20231010170503.657189-2-apatel@ventanamicro.com> (raw)
In-Reply-To: <20231010170503.657189-1-apatel@ventanamicro.com>

We add SBI debug console extension related defines/enum to the
asm/sbi.h header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 arch/riscv/include/asm/sbi.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 5b4a1bf5f439..12dfda6bb924 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
 	SBI_EXT_HSM = 0x48534D,
 	SBI_EXT_SRST = 0x53525354,
 	SBI_EXT_PMU = 0x504D55,
+	SBI_EXT_DBCN = 0x4442434E,
 
 	/* Experimentals extensions must lie within this range */
 	SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
 /* Flags defined for counter stop function */
 #define SBI_PMU_STOP_FLAG_RESET (1 << 0)
 
+enum sbi_ext_dbcn_fid {
+	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
+	SBI_EXT_DBCN_CONSOLE_READ = 1,
+	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
+};
+
 #define SBI_SPEC_VERSION_DEFAULT	0x1
 #define SBI_SPEC_VERSION_MAJOR_SHIFT	24
 #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
-- 
2.34.1


  reply	other threads:[~2023-10-10 17:04 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-10 17:04 [PATCH 0/6] RISC-V SBI debug console extension support Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel [this message]
2023-10-10 17:04   ` [PATCH 1/6] RISC-V: Add defines for SBI debug console extension Anup Patel
2023-10-10 17:04   ` Anup Patel
2023-10-10 17:04   ` Anup Patel
2023-10-10 17:04 ` [PATCH 2/6] RISC-V: KVM: Change the SBI specification version to v2.0 Anup Patel
2023-10-10 17:04   ` Anup Patel
2023-10-10 17:04   ` Anup Patel
2023-10-10 17:04   ` Anup Patel
2023-10-10 17:13   ` Greg Kroah-Hartman
2023-10-10 17:13     ` Greg Kroah-Hartman
2023-10-10 17:13     ` Greg Kroah-Hartman
2023-10-10 17:13     ` Greg Kroah-Hartman
2023-10-11  6:19     ` Anup Patel
2023-10-11  6:19       ` Anup Patel
2023-10-11  6:19       ` Anup Patel
2023-10-11  6:19       ` Anup Patel
2023-10-11  7:27       ` Greg Kroah-Hartman
2023-10-11  7:27         ` Greg Kroah-Hartman
2023-10-11  7:27         ` Greg Kroah-Hartman
2023-10-11  7:27         ` Greg Kroah-Hartman
2023-10-11 11:02         ` Anup Patel
2023-10-11 11:02           ` Anup Patel
2023-10-11 11:02           ` Anup Patel
2023-10-11 11:02           ` Anup Patel
2023-10-11 15:26           ` Greg Kroah-Hartman
2023-10-11 15:26             ` Greg Kroah-Hartman
2023-10-11 15:26             ` Greg Kroah-Hartman
2023-10-11 15:26             ` Greg Kroah-Hartman
2023-10-11 15:38             ` Anup Patel
2023-10-11 15:38               ` Anup Patel
2023-10-11 15:38               ` Anup Patel
2023-10-11 15:38               ` Anup Patel
2023-10-10 17:05 ` [PATCH 3/6] RISC-V: KVM: Forward SBI DBCN extension to user-space Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:15   ` Greg Kroah-Hartman
2023-10-10 17:15     ` Greg Kroah-Hartman
2023-10-10 17:15     ` Greg Kroah-Hartman
2023-10-10 17:15     ` Greg Kroah-Hartman
2023-10-11  6:32     ` Anup Patel
2023-10-11  6:32       ` Anup Patel
2023-10-11  6:32       ` Anup Patel
2023-10-11  6:32       ` Anup Patel
2023-10-11  7:25       ` Greg Kroah-Hartman
2023-10-11  7:25         ` Greg Kroah-Hartman
2023-10-11  7:25         ` Greg Kroah-Hartman
2023-10-11  7:25         ` Greg Kroah-Hartman
2023-10-11 10:54         ` Anup Patel
2023-10-11 10:54           ` Anup Patel
2023-10-11 10:54           ` Anup Patel
2023-10-11 10:54           ` Anup Patel
2023-10-10 17:05 ` [PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:16   ` Greg Kroah-Hartman
2023-10-10 17:16     ` Greg Kroah-Hartman
2023-10-10 17:16     ` Greg Kroah-Hartman
2023-10-10 17:16     ` Greg Kroah-Hartman
2023-10-11  5:52     ` Anup Patel
2023-10-11  5:52       ` Anup Patel
2023-10-11  5:52       ` Anup Patel
2023-10-11  5:52       ` Anup Patel
2023-10-10 17:05 ` [PATCH 5/6] tty: Add SBI debug console support to HVC SBI driver Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:12   ` Greg Kroah-Hartman
2023-10-10 17:12     ` Greg Kroah-Hartman
2023-10-10 17:12     ` Greg Kroah-Hartman
2023-10-10 17:12     ` Greg Kroah-Hartman
2023-10-11  5:51     ` Anup Patel
2023-10-11  5:51       ` Anup Patel
2023-10-11  5:51       ` Anup Patel
2023-10-11  5:51       ` Anup Patel
2023-10-10 17:05 ` [PATCH 6/6] RISC-V: Enable SBI based earlycon support Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:05   ` Anup Patel
2023-10-10 17:05   ` Anup Patel

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