From: Anup Patel <apatel@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon
Date: Tue, 10 Oct 2023 22:35:01 +0530 [thread overview]
Message-ID: <20231010170503.657189-5-apatel@ventanamicro.com> (raw)
In-Reply-To: <20231010170503.657189-1-apatel@ventanamicro.com>
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 35 ++++++++++++++++++++++---
2 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index bdc568a4ab66..cec46091a716 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..b1da34e8d8cd 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -10,22 +10,49 @@
#include <linux/serial_core.h>
#include <asm/sbi.h>
+#ifdef CONFIG_RISCV_SBI_V01
static void sbi_putc(struct uart_port *port, unsigned char c)
{
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+#endif
+
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ phys_addr_t pa = __pa(s);
+
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+#ifdef CONFIG_32BIT
+ n, pa, (u64)pa >> 32,
+#else
+ n, pa, 0,
+#endif
+ 0, 0, 0);
+}
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0))
+ device->con->write = sbi_dbcn_console_write;
+ else
+#ifdef CONFIG_RISCV_SBI_V01
+ device->con->write = sbi_0_1_console_write;
+#else
+ ret = -ENODEV;
+#endif
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Atish Patra <atishp@atishpatra.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Andrew Jones <ajones@ventanamicro.com>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon
Date: Tue, 10 Oct 2023 22:35:01 +0530 [thread overview]
Message-ID: <20231010170503.657189-5-apatel@ventanamicro.com> (raw)
In-Reply-To: <20231010170503.657189-1-apatel@ventanamicro.com>
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 35 ++++++++++++++++++++++---
2 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index bdc568a4ab66..cec46091a716 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..b1da34e8d8cd 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -10,22 +10,49 @@
#include <linux/serial_core.h>
#include <asm/sbi.h>
+#ifdef CONFIG_RISCV_SBI_V01
static void sbi_putc(struct uart_port *port, unsigned char c)
{
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+#endif
+
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ phys_addr_t pa = __pa(s);
+
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+#ifdef CONFIG_32BIT
+ n, pa, (u64)pa >> 32,
+#else
+ n, pa, 0,
+#endif
+ 0, 0, 0);
+}
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0))
+ device->con->write = sbi_dbcn_console_write;
+ else
+#ifdef CONFIG_RISCV_SBI_V01
+ device->con->write = sbi_0_1_console_write;
+#else
+ ret = -ENODEV;
+#endif
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Atish Patra <atishp@atishpatra.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Andrew Jones <ajones@ventanamicro.com>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon
Date: Tue, 10 Oct 2023 22:35:01 +0530 [thread overview]
Message-ID: <20231010170503.657189-5-apatel@ventanamicro.com> (raw)
In-Reply-To: <20231010170503.657189-1-apatel@ventanamicro.com>
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 35 ++++++++++++++++++++++---
2 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index bdc568a4ab66..cec46091a716 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..b1da34e8d8cd 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -10,22 +10,49 @@
#include <linux/serial_core.h>
#include <asm/sbi.h>
+#ifdef CONFIG_RISCV_SBI_V01
static void sbi_putc(struct uart_port *port, unsigned char c)
{
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+#endif
+
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ phys_addr_t pa = __pa(s);
+
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+#ifdef CONFIG_32BIT
+ n, pa, (u64)pa >> 32,
+#else
+ n, pa, 0,
+#endif
+ 0, 0, 0);
+}
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0))
+ device->con->write = sbi_dbcn_console_write;
+ else
+#ifdef CONFIG_RISCV_SBI_V01
+ device->con->write = sbi_0_1_console_write;
+#else
+ ret = -ENODEV;
+#endif
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Atish Patra <atishp@atishpatra.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
linux-serial@vger.kernel.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, Conor Dooley <conor@kernel.org>,
kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org,
Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon
Date: Tue, 10 Oct 2023 22:35:01 +0530 [thread overview]
Message-ID: <20231010170503.657189-5-apatel@ventanamicro.com> (raw)
In-Reply-To: <20231010170503.657189-1-apatel@ventanamicro.com>
We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 35 ++++++++++++++++++++++---
2 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index bdc568a4ab66..cec46091a716 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..b1da34e8d8cd 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -10,22 +10,49 @@
#include <linux/serial_core.h>
#include <asm/sbi.h>
+#ifdef CONFIG_RISCV_SBI_V01
static void sbi_putc(struct uart_port *port, unsigned char c)
{
sbi_console_putchar(c);
}
-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
+#endif
+
+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ phys_addr_t pa = __pa(s);
+
+ sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
+#ifdef CONFIG_32BIT
+ n, pa, (u64)pa >> 32,
+#else
+ n, pa, 0,
+#endif
+ 0, 0, 0);
+}
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
+ (sbi_probe_extension(SBI_EXT_DBCN) > 0))
+ device->con->write = sbi_dbcn_console_write;
+ else
+#ifdef CONFIG_RISCV_SBI_V01
+ device->con->write = sbi_0_1_console_write;
+#else
+ ret = -ENODEV;
+#endif
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1
next prev parent reply other threads:[~2023-10-10 17:05 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-10 17:04 [PATCH 0/6] RISC-V SBI debug console extension support Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` [PATCH 1/6] RISC-V: Add defines for SBI debug console extension Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` [PATCH 2/6] RISC-V: KVM: Change the SBI specification version to v2.0 Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:04 ` Anup Patel
2023-10-10 17:13 ` Greg Kroah-Hartman
2023-10-10 17:13 ` Greg Kroah-Hartman
2023-10-10 17:13 ` Greg Kroah-Hartman
2023-10-10 17:13 ` Greg Kroah-Hartman
2023-10-11 6:19 ` Anup Patel
2023-10-11 6:19 ` Anup Patel
2023-10-11 6:19 ` Anup Patel
2023-10-11 6:19 ` Anup Patel
2023-10-11 7:27 ` Greg Kroah-Hartman
2023-10-11 7:27 ` Greg Kroah-Hartman
2023-10-11 7:27 ` Greg Kroah-Hartman
2023-10-11 7:27 ` Greg Kroah-Hartman
2023-10-11 11:02 ` Anup Patel
2023-10-11 11:02 ` Anup Patel
2023-10-11 11:02 ` Anup Patel
2023-10-11 11:02 ` Anup Patel
2023-10-11 15:26 ` Greg Kroah-Hartman
2023-10-11 15:26 ` Greg Kroah-Hartman
2023-10-11 15:26 ` Greg Kroah-Hartman
2023-10-11 15:26 ` Greg Kroah-Hartman
2023-10-11 15:38 ` Anup Patel
2023-10-11 15:38 ` Anup Patel
2023-10-11 15:38 ` Anup Patel
2023-10-11 15:38 ` Anup Patel
2023-10-10 17:05 ` [PATCH 3/6] RISC-V: KVM: Forward SBI DBCN extension to user-space Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:15 ` Greg Kroah-Hartman
2023-10-10 17:15 ` Greg Kroah-Hartman
2023-10-10 17:15 ` Greg Kroah-Hartman
2023-10-10 17:15 ` Greg Kroah-Hartman
2023-10-11 6:32 ` Anup Patel
2023-10-11 6:32 ` Anup Patel
2023-10-11 6:32 ` Anup Patel
2023-10-11 6:32 ` Anup Patel
2023-10-11 7:25 ` Greg Kroah-Hartman
2023-10-11 7:25 ` Greg Kroah-Hartman
2023-10-11 7:25 ` Greg Kroah-Hartman
2023-10-11 7:25 ` Greg Kroah-Hartman
2023-10-11 10:54 ` Anup Patel
2023-10-11 10:54 ` Anup Patel
2023-10-11 10:54 ` Anup Patel
2023-10-11 10:54 ` Anup Patel
2023-10-10 17:05 ` Anup Patel [this message]
2023-10-10 17:05 ` [PATCH 4/6] tty/serial: Add RISC-V SBI debug console based earlycon Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:16 ` Greg Kroah-Hartman
2023-10-10 17:16 ` Greg Kroah-Hartman
2023-10-10 17:16 ` Greg Kroah-Hartman
2023-10-10 17:16 ` Greg Kroah-Hartman
2023-10-11 5:52 ` Anup Patel
2023-10-11 5:52 ` Anup Patel
2023-10-11 5:52 ` Anup Patel
2023-10-11 5:52 ` Anup Patel
2023-10-10 17:05 ` [PATCH 5/6] tty: Add SBI debug console support to HVC SBI driver Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:12 ` Greg Kroah-Hartman
2023-10-10 17:12 ` Greg Kroah-Hartman
2023-10-10 17:12 ` Greg Kroah-Hartman
2023-10-10 17:12 ` Greg Kroah-Hartman
2023-10-11 5:51 ` Anup Patel
2023-10-11 5:51 ` Anup Patel
2023-10-11 5:51 ` Anup Patel
2023-10-11 5:51 ` Anup Patel
2023-10-10 17:05 ` [PATCH 6/6] RISC-V: Enable SBI based earlycon support Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:05 ` Anup Patel
2023-10-10 17:05 ` Anup Patel
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