All of lore.kernel.org
 help / color / mirror / Atom feed
From: "David E. Box" <david.e.box@linux.intel.com>
To: linux-kernel@vger.kernel.org,
	platform-driver-x86@vger.kernel.org,
	ilpo.jarvinen@linux.intel.com, rajvi.jingar@linux.intel.com
Subject: [PATCH V6 13/20] platform/x86/intel/pmc: Cleanup SSRAM discovery
Date: Wed, 29 Nov 2023 14:21:25 -0800	[thread overview]
Message-ID: <20231129222132.2331261-14-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20231129222132.2331261-1-david.e.box@linux.intel.com>

Clean up the code handling SSRAM discovery. Handle all resource allocation
and cleanup in pmc_core_ssram_get_pmc(). Return the error status from this
function but only fail the init if we fail to discover the primary PMC.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
V6 - Drops patch adding cleanup helpers for iounmap() and ioport_unmap()
     to io.h until s390 build issue is resolved. Add pmc_core specific
     DEFINE_FREE helper for iounmap() for now.

V5 - Use single function to handle SSRAM discovery of all PMCs.

V4 - Add checking the return value from pmc_core_sram_init() to mtl.c
   - Use iounmap cleanup from io.h

V3 - New patch split from previous PATCH 2
   - Update changelog
   - Use cleanup.h to cleanup ioremap

V2 - no change

 drivers/platform/x86/intel/pmc/core_ssram.c | 62 +++++++++++----------
 1 file changed, 33 insertions(+), 29 deletions(-)

diff --git a/drivers/platform/x86/intel/pmc/core_ssram.c b/drivers/platform/x86/intel/pmc/core_ssram.c
index 815950713e25..c1b984255571 100644
--- a/drivers/platform/x86/intel/pmc/core_ssram.c
+++ b/drivers/platform/x86/intel/pmc/core_ssram.c
@@ -8,6 +8,7 @@
  *
  */
 
+#include <linux/cleanup.h>
 #include <linux/pci.h>
 #include <linux/io-64-nonatomic-lo-hi.h>
 
@@ -21,6 +22,8 @@
 #define SSRAM_IOE_OFFSET	0x68
 #define SSRAM_DEVID_OFFSET	0x70
 
+DEFINE_FREE(pmc_core_iounmap, void __iomem *, iounmap(_T));
+
 static const struct pmc_reg_map *pmc_core_find_regmap(struct pmc_info *list, u16 devid)
 {
 	for (; list->map; ++list)
@@ -65,44 +68,49 @@ pmc_core_pmc_add(struct pmc_dev *pmcdev, u64 pwrm_base,
 	return 0;
 }
 
-static void
-pmc_core_ssram_get_pmc(struct pmc_dev *pmcdev, void __iomem *ssram, u32 offset,
-		       int pmc_idx)
+static int
+pmc_core_ssram_get_pmc(struct pmc_dev *pmcdev, int pmc_idx, u32 offset)
 {
-	u64 pwrm_base;
+	struct pci_dev *ssram_pcidev = pmcdev->ssram_pcidev;
+	void __iomem __free(pmc_core_iounmap) *tmp_ssram = NULL;
+	void __iomem __free(pmc_core_iounmap) *ssram = NULL;
+	const struct pmc_reg_map *map;
+	u64 ssram_base, pwrm_base;
 	u16 devid;
 
-	if (pmc_idx != PMC_IDX_SOC) {
-		u64 ssram_base = get_base(ssram, offset);
+	if (!pmcdev->regmap_list)
+		return -ENOENT;
 
-		if (!ssram_base)
-			return;
+	ssram_base = ssram_pcidev->resource[0].start;
+	tmp_ssram = ioremap(ssram_base, SSRAM_HDR_SIZE);
 
+	if (pmc_idx != PMC_IDX_MAIN) {
+		/*
+		 * The secondary PMC BARS (which are behind hidden PCI devices)
+		 * are read from fixed offsets in MMIO of the primary PMC BAR.
+		 */
+		ssram_base = get_base(tmp_ssram, offset);
 		ssram = ioremap(ssram_base, SSRAM_HDR_SIZE);
 		if (!ssram)
-			return;
+			return -ENOMEM;
+
+	} else {
+		ssram = no_free_ptr(tmp_ssram);
 	}
 
 	pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET);
 	devid = readw(ssram + SSRAM_DEVID_OFFSET);
 
-	if (pmcdev->regmap_list) {
-		const struct pmc_reg_map *map;
+	map = pmc_core_find_regmap(pmcdev->regmap_list, devid);
+	if (!map)
+		return -ENODEV;
 
-		map = pmc_core_find_regmap(pmcdev->regmap_list, devid);
-		if (map)
-			pmc_core_pmc_add(pmcdev, pwrm_base, map, pmc_idx);
-	}
-
-	if (pmc_idx != PMC_IDX_SOC)
-		iounmap(ssram);
+	return pmc_core_pmc_add(pmcdev, pwrm_base, map, PMC_IDX_MAIN);
 }
 
 int pmc_core_ssram_init(struct pmc_dev *pmcdev)
 {
-	void __iomem *ssram;
 	struct pci_dev *pcidev;
-	u64 ssram_base;
 	int ret;
 
 	pcidev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(20, 2));
@@ -113,18 +121,14 @@ int pmc_core_ssram_init(struct pmc_dev *pmcdev)
 	if (ret)
 		goto release_dev;
 
-	ssram_base = pcidev->resource[0].start;
-	ssram = ioremap(ssram_base, SSRAM_HDR_SIZE);
-	if (!ssram)
-		goto disable_dev;
-
 	pmcdev->ssram_pcidev = pcidev;
 
-	pmc_core_ssram_get_pmc(pmcdev, ssram, 0, PMC_IDX_SOC);
-	pmc_core_ssram_get_pmc(pmcdev, ssram, SSRAM_IOE_OFFSET, PMC_IDX_IOE);
-	pmc_core_ssram_get_pmc(pmcdev, ssram, SSRAM_PCH_OFFSET, PMC_IDX_PCH);
+	ret = pmc_core_ssram_get_pmc(pmcdev, PMC_IDX_MAIN, 0);
+	if (ret)
+		goto disable_dev;
 
-	iounmap(ssram);
+	pmc_core_ssram_get_pmc(pmcdev, PMC_IDX_IOE, SSRAM_IOE_OFFSET);
+	pmc_core_ssram_get_pmc(pmcdev, PMC_IDX_PCH, SSRAM_PCH_OFFSET);
 
 	return 0;
 
-- 
2.34.1


  parent reply	other threads:[~2023-11-29 22:21 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-29 22:21 [PATCH V6 00/20] intel_pmc: Add telemetry API to read counters David E. Box
2023-11-29 22:21 ` [PATCH V6 01/20] platform/x86/intel/vsec: Fix xa_alloc memory leak David E. Box
2023-11-30 11:02   ` Ilpo Järvinen
2023-12-04 13:51     ` Hans de Goede
2023-12-04 19:57       ` David E. Box
2023-12-04 20:13         ` Hans de Goede
2023-11-29 22:21 ` [PATCH V6 02/20] platform/x86/intel/vsec: Remove unnecessary return David E. Box
2023-11-30 11:03   ` Ilpo Järvinen
2023-11-29 22:21 ` [PATCH V6 03/20] platform/x86/intel/vsec: Move structures to header David E. Box
2023-11-29 22:21 ` [PATCH V6 04/20] platform/x86/intel/vsec: remove platform_info from vsec device structure David E. Box
2023-11-29 22:21 ` [PATCH V6 05/20] platform/x86/intel/vsec: Use cleanup.h David E. Box
2023-11-29 22:21 ` [PATCH V6 06/20] platform/x86/intel/vsec: Assign auxdev parent by argument David E. Box
2023-11-29 22:21 ` [PATCH V6 07/20] platform/x86/intel/vsec: Add intel_vsec_register David E. Box
2023-11-30 11:23   ` Ilpo Järvinen
2023-11-29 22:21 ` [PATCH V6 08/20] platform/x86/intel/vsec: Add base address field David E. Box
2023-11-29 22:21 ` [PATCH V6 09/20] platform/x86/intel/pmt: Add header to struct intel_pmt_entry David E. Box
2023-11-29 22:21 ` [PATCH V6 10/20] platform/x86/intel/pmt: telemetry: Export API to read telemetry David E. Box
2023-11-29 22:21 ` [PATCH V6 11/20] platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform init David E. Box
2023-11-29 22:21 ` [PATCH V6 12/20] platform/x86/intel/pmc: Allow pmc_core_ssram_init to fail David E. Box
2023-11-29 22:21 ` David E. Box [this message]
2023-11-29 22:21 ` [PATCH V6 14/20] platform/x86/intel/pmc/mtl: Use return value from pmc_core_ssram_init() David E. Box
2023-11-29 22:21 ` [PATCH V6 15/20] platform/x86/intel/pmc: Find and register PMC telemetry entries David E. Box
2023-11-29 22:21 ` [PATCH V6 16/20] platform/x86/intel/pmc: Display LPM requirements for multiple PMCs David E. Box
2023-11-29 22:21 ` [PATCH V6 17/20] platform/x86/intel/pmc: Retrieve LPM information using Intel PMT David E. Box
2023-11-29 22:21 ` [PATCH V6 18/20] platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-P David E. Box
2023-11-29 22:21 ` [PATCH V6 19/20] platform/x86/intel/pmc: Add debug attribute for Die C6 counter David E. Box
2023-11-29 22:21 ` [PATCH V6 20/20] platform/x86/intel/pmc: Show Die C6 counter on Meteor Lake David E. Box
2023-12-04 13:55 ` [PATCH V6 00/20] intel_pmc: Add telemetry API to read counters Hans de Goede

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231129222132.2331261-14-david.e.box@linux.intel.com \
    --to=david.e.box@linux.intel.com \
    --cc=ilpo.jarvinen@linux.intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=platform-driver-x86@vger.kernel.org \
    --cc=rajvi.jingar@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.