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From: Deepak Gupta <debug@rivosinc.com>
To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	llvm@lists.linux.dev
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, nathan@kernel.org,
	ndesaulniers@google.com, morbo@google.com,
	justinstitt@google.com, andy.chiu@sifive.com, debug@rivosinc.com,
	hankuan.chen@sifive.com, guoren@kernel.org,
	greentime.hu@sifive.com, samitolvanen@google.com,
	cleger@rivosinc.com, apatel@ventanamicro.com,
	ajones@ventanamicro.com, conor.dooley@microchip.com,
	mchitale@ventanamicro.com, dbarboza@ventanamicro.com,
	waylingii@gmail.com, sameo@rivosinc.com, alexghiti@rivosinc.com,
	akpm@linux-foundation.org, shikemeng@huaweicloud.com,
	rppt@kernel.org, charlie@rivosinc.com, xiao.w.wang@intel.com,
	willy@infradead.org, jszhang@kernel.org, leobras@redhat.com,
	songshuaishuai@tinylab.org, haxel@fzi.de,
	samuel.holland@sifive.com, namcaov@gmail.com, bjorn@rivosinc.com,
	cuiyunhui@bytedance.com, wangkefeng.wang@huawei.com,
	falcon@tinylab.org, viro@zeniv.linux.org.uk, bhe@redhat.com,
	chenjiahao16@huawei.com, hca@linux.ibm.com, arnd@arndb.de,
	kent.overstreet@linux.dev, boqun.feng@gmail.com, oleg@redhat.com,
	paulmck@kernel.org, broonie@kernel.org,
	rick.p.edgecombe@intel.com
Subject: [RFC PATCH 02/12] riscv: add landing pad for asm routines.
Date: Mon,  8 Apr 2024 23:10:33 -0700	[thread overview]
Message-ID: <20240409061043.3269676-3-debug@rivosinc.com> (raw)
In-Reply-To: <20240409061043.3269676-1-debug@rivosinc.com>

SYM_* macros are used to define assembly routines. In this patch series,
re-define those macros in risc-v arch specific include file to include
a landing pad instruction at the beginning. This is done only when the
compiler flag for landing pad is enabled (i.e. __riscv_zicfilp).

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
 arch/riscv/include/asm/linkage.h | 42 ++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/riscv/include/asm/linkage.h b/arch/riscv/include/asm/linkage.h
index 9e88ba23cd2b..bb43ae7dadeb 100644
--- a/arch/riscv/include/asm/linkage.h
+++ b/arch/riscv/include/asm/linkage.h
@@ -6,7 +6,49 @@
 #ifndef _ASM_RISCV_LINKAGE_H
 #define _ASM_RISCV_LINKAGE_H
 
+#ifdef __ASSEMBLY__
+#include <asm/assembler.h>
+#endif
+
 #define __ALIGN		.balign 4
 #define __ALIGN_STR	".balign 4"
 
+#ifdef __riscv_zicfilp
+/*
+ * A landing pad instruction is needed at start of asm routines
+ * re-define macros for asm routines to have a landing pad at
+ * the beginning of function. Currently use label value of 0x1.
+ * Eventually, label should be calculated as a hash over function
+ * signature.
+ */
+#define SYM_FUNC_START(name)				\
+	SYM_START(name, SYM_L_GLOBAL, SYM_A_ALIGN)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_NOALIGN(name)			\
+	SYM_START(name, SYM_L_GLOBAL, SYM_A_NONE)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_LOCAL(name)			\
+	SYM_START(name, SYM_L_LOCAL, SYM_A_ALIGN)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_LOCAL_NOALIGN(name)		\
+	SYM_START(name, SYM_L_LOCAL, SYM_A_NONE)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_WEAK(name)			\
+	SYM_START(name, SYM_L_WEAK, SYM_A_ALIGN)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_WEAK_NOALIGN(name)		\
+	SYM_START(name, SYM_L_WEAK, SYM_A_NONE)		\
+	lpad 0x1;
+
+#define SYM_TYPED_FUNC_START(name)				\
+	SYM_TYPED_START(name, SYM_L_GLOBAL, SYM_A_ALIGN)	\
+	lpad 0x1;
+
+#endif
+
 #endif /* _ASM_RISCV_LINKAGE_H */
-- 
2.43.2


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WARNING: multiple messages have this Message-ID (diff)
From: Deepak Gupta <debug@rivosinc.com>
To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	llvm@lists.linux.dev
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, nathan@kernel.org,
	ndesaulniers@google.com, morbo@google.com,
	justinstitt@google.com, andy.chiu@sifive.com, debug@rivosinc.com,
	hankuan.chen@sifive.com, guoren@kernel.org,
	greentime.hu@sifive.com, samitolvanen@google.com,
	cleger@rivosinc.com, apatel@ventanamicro.com,
	ajones@ventanamicro.com, conor.dooley@microchip.com,
	mchitale@ventanamicro.com, dbarboza@ventanamicro.com,
	waylingii@gmail.com, sameo@rivosinc.com, alexghiti@rivosinc.com,
	akpm@linux-foundation.org, shikemeng@huaweicloud.com,
	rppt@kernel.org, charlie@rivosinc.com, xiao.w.wang@intel.com,
	willy@infradead.org, jszhang@kernel.org, leobras@redhat.com,
	songshuaishuai@tinylab.org, haxel@fzi.de,
	samuel.holland@sifive.com, namcaov@gmail.com, bjorn@rivosinc.com,
	cuiyunhui@bytedance.com, wangkefeng.wang@huawei.com,
	falcon@tinylab.org, viro@zeniv.linux.org.uk, bhe@redhat.com,
	chenjiahao16@huawei.com, hca@linux.ibm.com, arnd@arndb.de,
	kent.overstreet@linux.dev, boqun.feng@gmail.com, oleg@redhat.com,
	paulmck@kernel.org, broonie@kernel.org,
	rick.p.edgecombe@intel.com
Subject: [RFC PATCH 02/12] riscv: add landing pad for asm routines.
Date: Mon,  8 Apr 2024 23:10:33 -0700	[thread overview]
Message-ID: <20240409061043.3269676-3-debug@rivosinc.com> (raw)
In-Reply-To: <20240409061043.3269676-1-debug@rivosinc.com>

SYM_* macros are used to define assembly routines. In this patch series,
re-define those macros in risc-v arch specific include file to include
a landing pad instruction at the beginning. This is done only when the
compiler flag for landing pad is enabled (i.e. __riscv_zicfilp).

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
 arch/riscv/include/asm/linkage.h | 42 ++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/riscv/include/asm/linkage.h b/arch/riscv/include/asm/linkage.h
index 9e88ba23cd2b..bb43ae7dadeb 100644
--- a/arch/riscv/include/asm/linkage.h
+++ b/arch/riscv/include/asm/linkage.h
@@ -6,7 +6,49 @@
 #ifndef _ASM_RISCV_LINKAGE_H
 #define _ASM_RISCV_LINKAGE_H
 
+#ifdef __ASSEMBLY__
+#include <asm/assembler.h>
+#endif
+
 #define __ALIGN		.balign 4
 #define __ALIGN_STR	".balign 4"
 
+#ifdef __riscv_zicfilp
+/*
+ * A landing pad instruction is needed at start of asm routines
+ * re-define macros for asm routines to have a landing pad at
+ * the beginning of function. Currently use label value of 0x1.
+ * Eventually, label should be calculated as a hash over function
+ * signature.
+ */
+#define SYM_FUNC_START(name)				\
+	SYM_START(name, SYM_L_GLOBAL, SYM_A_ALIGN)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_NOALIGN(name)			\
+	SYM_START(name, SYM_L_GLOBAL, SYM_A_NONE)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_LOCAL(name)			\
+	SYM_START(name, SYM_L_LOCAL, SYM_A_ALIGN)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_LOCAL_NOALIGN(name)		\
+	SYM_START(name, SYM_L_LOCAL, SYM_A_NONE)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_WEAK(name)			\
+	SYM_START(name, SYM_L_WEAK, SYM_A_ALIGN)	\
+	lpad 0x1;
+
+#define SYM_FUNC_START_WEAK_NOALIGN(name)		\
+	SYM_START(name, SYM_L_WEAK, SYM_A_NONE)		\
+	lpad 0x1;
+
+#define SYM_TYPED_FUNC_START(name)				\
+	SYM_TYPED_START(name, SYM_L_GLOBAL, SYM_A_ALIGN)	\
+	lpad 0x1;
+
+#endif
+
 #endif /* _ASM_RISCV_LINKAGE_H */
-- 
2.43.2


  parent reply	other threads:[~2024-04-09  6:12 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-09  6:10 [RFC PATCH v1] riscv kernel control flow integrity Deepak Gupta
2024-04-09  6:10 ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 01/12] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-09  6:10 ` Deepak Gupta [this message]
2024-04-09  6:10   ` [RFC PATCH 02/12] riscv: add landing pad for asm routines Deepak Gupta
2024-04-11 17:15   ` Sami Tolvanen
2024-04-11 17:15     ` Sami Tolvanen
2024-04-11 17:53     ` Deepak Gupta
2024-04-11 17:53       ` Deepak Gupta
2024-04-11 18:33       ` Sami Tolvanen
2024-04-11 18:33         ` Sami Tolvanen
2024-04-09  6:10 ` [RFC PATCH 03/12] riscv: after saving expected landing pad (elp), clear elp state Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 04/12] riscv: update asm call sites with label setup Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 05/12] riscv: fix certain indirect jumps for kernel cfi Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 06/12] scs: place init shadow stack in .shadowstack section Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 07/12] riscv/mm: prepare shadow stack for init task for kernel cfi Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-05-12 20:12   ` Alexandre Ghiti
2024-05-12 20:12     ` Alexandre Ghiti
2024-05-13 18:59     ` Deepak Gupta
2024-05-13 18:59       ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 08/12] riscv: dynamic (zicfiss) shadow call stack support Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-11 17:05   ` Sami Tolvanen
2024-04-11 17:05     ` Sami Tolvanen
2024-04-11 17:30     ` Deepak Gupta
2024-04-11 17:30       ` Deepak Gupta
2024-04-11 17:47       ` Sami Tolvanen
2024-04-11 17:47         ` Sami Tolvanen
2024-04-09  6:10 ` [RFC PATCH 09/12] scs: kernel shadow stack with hardware assistance Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 10/12] riscv/traps: Introduce software check exception Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 11/12] riscv: Kconfig & Makefile for riscv kernel control flow integrity Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta
2024-04-09  6:10 ` [RFC PATCH 12/12] riscv: enable kernel shadow stack and landing pad enforcement Deepak Gupta
2024-04-09  6:10   ` Deepak Gupta

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