From: Deepak Gupta <debug@rivosinc.com>
To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
llvm@lists.linux.dev
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, nathan@kernel.org,
ndesaulniers@google.com, morbo@google.com,
justinstitt@google.com, andy.chiu@sifive.com, debug@rivosinc.com,
hankuan.chen@sifive.com, guoren@kernel.org,
greentime.hu@sifive.com, samitolvanen@google.com,
cleger@rivosinc.com, apatel@ventanamicro.com,
ajones@ventanamicro.com, conor.dooley@microchip.com,
mchitale@ventanamicro.com, dbarboza@ventanamicro.com,
waylingii@gmail.com, sameo@rivosinc.com, alexghiti@rivosinc.com,
akpm@linux-foundation.org, shikemeng@huaweicloud.com,
rppt@kernel.org, charlie@rivosinc.com, xiao.w.wang@intel.com,
willy@infradead.org, jszhang@kernel.org, leobras@redhat.com,
songshuaishuai@tinylab.org, haxel@fzi.de,
samuel.holland@sifive.com, namcaov@gmail.com, bjorn@rivosinc.com,
cuiyunhui@bytedance.com, wangkefeng.wang@huawei.com,
falcon@tinylab.org, viro@zeniv.linux.org.uk, bhe@redhat.com,
chenjiahao16@huawei.com, hca@linux.ibm.com, arnd@arndb.de,
kent.overstreet@linux.dev, boqun.feng@gmail.com, oleg@redhat.com,
paulmck@kernel.org, broonie@kernel.org,
rick.p.edgecombe@intel.com
Subject: [RFC PATCH 08/12] riscv: dynamic (zicfiss) shadow call stack support
Date: Mon, 8 Apr 2024 23:10:39 -0700 [thread overview]
Message-ID: <20240409061043.3269676-9-debug@rivosinc.com> (raw)
In-Reply-To: <20240409061043.3269676-1-debug@rivosinc.com>
Adding support for dynamic shadow call stack on riscv. zicfiss ISA extn.
enables protection for shadow stack against stray writes. This patch
enables scs_* macros to use zicfiss shadow stack pointer (CSR_SSP) instead
of relying on `gp`.
Since zicfiss based shadow stack needs to have correct encoding set in PTE
init shadow stack can't be established too early. It has to be setup after
`setup_vm` is called. Thus `scs_load_init_stack` is noped out if
CONFIG_DYNAMIC_SCS is selected.
Adds `arch_scs_store` that can be used in generic scs magic store routine.
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
arch/riscv/include/asm/asm.h | 2 +-
arch/riscv/include/asm/scs.h | 47 +++++++++++++++++++++++++++++-------
arch/riscv/kernel/entry.S | 14 +++++------
arch/riscv/kernel/head.S | 4 +--
4 files changed, 48 insertions(+), 19 deletions(-)
diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index 776354895b81..0304978ea4e4 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -109,7 +109,7 @@
REG_L \dst, 0(\dst)
.endm
-#ifdef CONFIG_SHADOW_CALL_STACK
+#if defined(CONFIG_SHADOW_CALL_STACK) && !defined(CONFIG_DYNAMIC_SCS)
/* gp is used as the shadow call stack pointer instead */
.macro load_global_pointer
.endm
diff --git a/arch/riscv/include/asm/scs.h b/arch/riscv/include/asm/scs.h
index 0e45db78b24b..14ef539922c2 100644
--- a/arch/riscv/include/asm/scs.h
+++ b/arch/riscv/include/asm/scs.h
@@ -9,46 +9,75 @@
/* Load init_shadow_call_stack to gp. */
.macro scs_load_init_stack
+#ifndef CONFIG_DYNAMIC_SCS
la gp, init_shadow_call_stack
XIP_FIXUP_OFFSET gp
+#endif
.endm
/* Load the per-CPU IRQ shadow call stack to gp. */
-.macro scs_load_irq_stack tmp
+.macro scs_load_irq_stack tmp tmp1
+#ifdef CONFIG_DYNAMIC_SCS
+ load_per_cpu \tmp1, irq_shadow_call_stack_ptr, \tmp
+ li \tmp, 4096
+ add \tmp, \tmp, \tmp1
+ csrw CSR_SSP, \tmp
+#else
load_per_cpu gp, irq_shadow_call_stack_ptr, \tmp
+#endif
.endm
/* Load task_scs_sp(current) to gp. */
-.macro scs_load_current
+.macro scs_load_current tmp
+#ifdef CONFIG_DYNAMIC_SCS
+ REG_L \tmp, TASK_TI_SCS_SP(tp)
+ csrw CSR_SSP, \tmp
+#else
REG_L gp, TASK_TI_SCS_SP(tp)
+#endif
.endm
/* Load task_scs_sp(current) to gp, but only if tp has changed. */
-.macro scs_load_current_if_task_changed prev
+.macro scs_load_current_if_task_changed prev tmp
beq \prev, tp, _skip_scs
- scs_load_current
+ scs_load_current \tmp
_skip_scs:
.endm
/* Save gp to task_scs_sp(current). */
-.macro scs_save_current
+.macro scs_save_current tmp
+#ifdef CONFIG_DYNAMIC_SCS
+ csrr \tmp, CSR_SSP
+ REG_S \tmp, TASK_TI_SCS_SP(tp)
+#else
REG_S gp, TASK_TI_SCS_SP(tp)
+#endif
.endm
#else /* CONFIG_SHADOW_CALL_STACK */
.macro scs_load_init_stack
.endm
-.macro scs_load_irq_stack tmp
+.macro scs_load_irq_stack tmp tmp1
.endm
-.macro scs_load_current
+.macro scs_load_current tmp
.endm
-.macro scs_load_current_if_task_changed prev
+.macro scs_load_current_if_task_changed prev tmp
.endm
-.macro scs_save_current
+.macro scs_save_current tmp
.endm
#endif /* CONFIG_SHADOW_CALL_STACK */
#endif /* __ASSEMBLY__ */
+#ifdef CONFIG_DYNAMIC_SCS
+#define arch_scs_store(ss_addr, magic_val) \
+ asm volatile ("ssamoswap.d %0, %2, %1" \
+ : "=r" (magic_val), "+A" (*ss_addr) \
+ : "r" (magic_val) \
+ : "memory")
+#else
+#define arch_scs_store(ss_addr, magic_val)
+#endif
+
#endif /* _ASM_SCS_H */
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index a35050a3e0ea..0262b46ab064 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -81,7 +81,7 @@ SYM_CODE_START(handle_exception)
load_global_pointer
/* Load the kernel shadow call stack pointer if coming from userspace */
- scs_load_current_if_task_changed s5
+ scs_load_current_if_task_changed s5 t0
#ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE
move a0, sp
@@ -135,7 +135,7 @@ SYM_CODE_START_NOALIGN(ret_from_exception)
REG_S s0, TASK_TI_KERNEL_SP(tp)
/* Save the kernel shadow call stack pointer */
- scs_save_current
+ scs_save_current t0
/*
* Save TP into the scratch register , so we can find the kernel data
@@ -252,8 +252,8 @@ SYM_FUNC_START(call_on_irq_stack)
addi s0, sp, STACKFRAME_SIZE_ON_STACK
/* Switch to the per-CPU shadow call stack */
- scs_save_current
- scs_load_irq_stack t0
+ scs_save_current t0
+ scs_load_irq_stack t0 t1
/* Switch to the per-CPU IRQ stack and call the handler */
load_per_cpu t0, irq_stack_ptr, t1
@@ -263,7 +263,7 @@ SYM_FUNC_START(call_on_irq_stack)
jalr a1
/* Switch back to the thread shadow call stack */
- scs_load_current
+ scs_load_current t0
/* Switch back to the thread stack and restore ra and s0 */
addi sp, s0, -STACKFRAME_SIZE_ON_STACK
@@ -305,7 +305,7 @@ SYM_FUNC_START(__switch_to)
REG_S s10, TASK_THREAD_S10_RA(a3)
REG_S s11, TASK_THREAD_S11_RA(a3)
/* Save the kernel shadow call stack pointer */
- scs_save_current
+ scs_save_current t0
/* Restore context from next->thread */
REG_L ra, TASK_THREAD_RA_RA(a4)
REG_L sp, TASK_THREAD_SP_RA(a4)
@@ -324,7 +324,7 @@ SYM_FUNC_START(__switch_to)
/* The offset of thread_info in task_struct is zero. */
move tp, a1
/* Switch to the next shadow call stack */
- scs_load_current
+ scs_load_current t0
ret
SYM_FUNC_END(__switch_to)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 6c311517c3b5..bc248c137c90 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -164,7 +164,7 @@ secondary_start_sbi:
call relocate_enable_mmu
#endif
call .Lsetup_trap_vector
- scs_load_current
+ scs_load_current t0
lui t2, 0x1
tail smp_callin
#endif /* CONFIG_SMP */
@@ -313,7 +313,7 @@ SYM_CODE_START(_start_kernel)
la tp, init_task
la sp, init_thread_union + THREAD_SIZE
addi sp, sp, -PT_SIZE_ON_STACK
- scs_load_current
+ scs_load_current t0
#ifdef CONFIG_KASAN
call kasan_early_init
--
2.43.2
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WARNING: multiple messages have this Message-ID (diff)
From: Deepak Gupta <debug@rivosinc.com>
To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
llvm@lists.linux.dev
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, nathan@kernel.org,
ndesaulniers@google.com, morbo@google.com,
justinstitt@google.com, andy.chiu@sifive.com, debug@rivosinc.com,
hankuan.chen@sifive.com, guoren@kernel.org,
greentime.hu@sifive.com, samitolvanen@google.com,
cleger@rivosinc.com, apatel@ventanamicro.com,
ajones@ventanamicro.com, conor.dooley@microchip.com,
mchitale@ventanamicro.com, dbarboza@ventanamicro.com,
waylingii@gmail.com, sameo@rivosinc.com, alexghiti@rivosinc.com,
akpm@linux-foundation.org, shikemeng@huaweicloud.com,
rppt@kernel.org, charlie@rivosinc.com, xiao.w.wang@intel.com,
willy@infradead.org, jszhang@kernel.org, leobras@redhat.com,
songshuaishuai@tinylab.org, haxel@fzi.de,
samuel.holland@sifive.com, namcaov@gmail.com, bjorn@rivosinc.com,
cuiyunhui@bytedance.com, wangkefeng.wang@huawei.com,
falcon@tinylab.org, viro@zeniv.linux.org.uk, bhe@redhat.com,
chenjiahao16@huawei.com, hca@linux.ibm.com, arnd@arndb.de,
kent.overstreet@linux.dev, boqun.feng@gmail.com, oleg@redhat.com,
paulmck@kernel.org, broonie@kernel.org,
rick.p.edgecombe@intel.com
Subject: [RFC PATCH 08/12] riscv: dynamic (zicfiss) shadow call stack support
Date: Mon, 8 Apr 2024 23:10:39 -0700 [thread overview]
Message-ID: <20240409061043.3269676-9-debug@rivosinc.com> (raw)
In-Reply-To: <20240409061043.3269676-1-debug@rivosinc.com>
Adding support for dynamic shadow call stack on riscv. zicfiss ISA extn.
enables protection for shadow stack against stray writes. This patch
enables scs_* macros to use zicfiss shadow stack pointer (CSR_SSP) instead
of relying on `gp`.
Since zicfiss based shadow stack needs to have correct encoding set in PTE
init shadow stack can't be established too early. It has to be setup after
`setup_vm` is called. Thus `scs_load_init_stack` is noped out if
CONFIG_DYNAMIC_SCS is selected.
Adds `arch_scs_store` that can be used in generic scs magic store routine.
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
arch/riscv/include/asm/asm.h | 2 +-
arch/riscv/include/asm/scs.h | 47 +++++++++++++++++++++++++++++-------
arch/riscv/kernel/entry.S | 14 +++++------
arch/riscv/kernel/head.S | 4 +--
4 files changed, 48 insertions(+), 19 deletions(-)
diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index 776354895b81..0304978ea4e4 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -109,7 +109,7 @@
REG_L \dst, 0(\dst)
.endm
-#ifdef CONFIG_SHADOW_CALL_STACK
+#if defined(CONFIG_SHADOW_CALL_STACK) && !defined(CONFIG_DYNAMIC_SCS)
/* gp is used as the shadow call stack pointer instead */
.macro load_global_pointer
.endm
diff --git a/arch/riscv/include/asm/scs.h b/arch/riscv/include/asm/scs.h
index 0e45db78b24b..14ef539922c2 100644
--- a/arch/riscv/include/asm/scs.h
+++ b/arch/riscv/include/asm/scs.h
@@ -9,46 +9,75 @@
/* Load init_shadow_call_stack to gp. */
.macro scs_load_init_stack
+#ifndef CONFIG_DYNAMIC_SCS
la gp, init_shadow_call_stack
XIP_FIXUP_OFFSET gp
+#endif
.endm
/* Load the per-CPU IRQ shadow call stack to gp. */
-.macro scs_load_irq_stack tmp
+.macro scs_load_irq_stack tmp tmp1
+#ifdef CONFIG_DYNAMIC_SCS
+ load_per_cpu \tmp1, irq_shadow_call_stack_ptr, \tmp
+ li \tmp, 4096
+ add \tmp, \tmp, \tmp1
+ csrw CSR_SSP, \tmp
+#else
load_per_cpu gp, irq_shadow_call_stack_ptr, \tmp
+#endif
.endm
/* Load task_scs_sp(current) to gp. */
-.macro scs_load_current
+.macro scs_load_current tmp
+#ifdef CONFIG_DYNAMIC_SCS
+ REG_L \tmp, TASK_TI_SCS_SP(tp)
+ csrw CSR_SSP, \tmp
+#else
REG_L gp, TASK_TI_SCS_SP(tp)
+#endif
.endm
/* Load task_scs_sp(current) to gp, but only if tp has changed. */
-.macro scs_load_current_if_task_changed prev
+.macro scs_load_current_if_task_changed prev tmp
beq \prev, tp, _skip_scs
- scs_load_current
+ scs_load_current \tmp
_skip_scs:
.endm
/* Save gp to task_scs_sp(current). */
-.macro scs_save_current
+.macro scs_save_current tmp
+#ifdef CONFIG_DYNAMIC_SCS
+ csrr \tmp, CSR_SSP
+ REG_S \tmp, TASK_TI_SCS_SP(tp)
+#else
REG_S gp, TASK_TI_SCS_SP(tp)
+#endif
.endm
#else /* CONFIG_SHADOW_CALL_STACK */
.macro scs_load_init_stack
.endm
-.macro scs_load_irq_stack tmp
+.macro scs_load_irq_stack tmp tmp1
.endm
-.macro scs_load_current
+.macro scs_load_current tmp
.endm
-.macro scs_load_current_if_task_changed prev
+.macro scs_load_current_if_task_changed prev tmp
.endm
-.macro scs_save_current
+.macro scs_save_current tmp
.endm
#endif /* CONFIG_SHADOW_CALL_STACK */
#endif /* __ASSEMBLY__ */
+#ifdef CONFIG_DYNAMIC_SCS
+#define arch_scs_store(ss_addr, magic_val) \
+ asm volatile ("ssamoswap.d %0, %2, %1" \
+ : "=r" (magic_val), "+A" (*ss_addr) \
+ : "r" (magic_val) \
+ : "memory")
+#else
+#define arch_scs_store(ss_addr, magic_val)
+#endif
+
#endif /* _ASM_SCS_H */
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index a35050a3e0ea..0262b46ab064 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -81,7 +81,7 @@ SYM_CODE_START(handle_exception)
load_global_pointer
/* Load the kernel shadow call stack pointer if coming from userspace */
- scs_load_current_if_task_changed s5
+ scs_load_current_if_task_changed s5 t0
#ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE
move a0, sp
@@ -135,7 +135,7 @@ SYM_CODE_START_NOALIGN(ret_from_exception)
REG_S s0, TASK_TI_KERNEL_SP(tp)
/* Save the kernel shadow call stack pointer */
- scs_save_current
+ scs_save_current t0
/*
* Save TP into the scratch register , so we can find the kernel data
@@ -252,8 +252,8 @@ SYM_FUNC_START(call_on_irq_stack)
addi s0, sp, STACKFRAME_SIZE_ON_STACK
/* Switch to the per-CPU shadow call stack */
- scs_save_current
- scs_load_irq_stack t0
+ scs_save_current t0
+ scs_load_irq_stack t0 t1
/* Switch to the per-CPU IRQ stack and call the handler */
load_per_cpu t0, irq_stack_ptr, t1
@@ -263,7 +263,7 @@ SYM_FUNC_START(call_on_irq_stack)
jalr a1
/* Switch back to the thread shadow call stack */
- scs_load_current
+ scs_load_current t0
/* Switch back to the thread stack and restore ra and s0 */
addi sp, s0, -STACKFRAME_SIZE_ON_STACK
@@ -305,7 +305,7 @@ SYM_FUNC_START(__switch_to)
REG_S s10, TASK_THREAD_S10_RA(a3)
REG_S s11, TASK_THREAD_S11_RA(a3)
/* Save the kernel shadow call stack pointer */
- scs_save_current
+ scs_save_current t0
/* Restore context from next->thread */
REG_L ra, TASK_THREAD_RA_RA(a4)
REG_L sp, TASK_THREAD_SP_RA(a4)
@@ -324,7 +324,7 @@ SYM_FUNC_START(__switch_to)
/* The offset of thread_info in task_struct is zero. */
move tp, a1
/* Switch to the next shadow call stack */
- scs_load_current
+ scs_load_current t0
ret
SYM_FUNC_END(__switch_to)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 6c311517c3b5..bc248c137c90 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -164,7 +164,7 @@ secondary_start_sbi:
call relocate_enable_mmu
#endif
call .Lsetup_trap_vector
- scs_load_current
+ scs_load_current t0
lui t2, 0x1
tail smp_callin
#endif /* CONFIG_SMP */
@@ -313,7 +313,7 @@ SYM_CODE_START(_start_kernel)
la tp, init_task
la sp, init_thread_union + THREAD_SIZE
addi sp, sp, -PT_SIZE_ON_STACK
- scs_load_current
+ scs_load_current t0
#ifdef CONFIG_KASAN
call kasan_early_init
--
2.43.2
next prev parent reply other threads:[~2024-04-09 6:12 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-09 6:10 [RFC PATCH v1] riscv kernel control flow integrity Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 01/12] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 02/12] riscv: add landing pad for asm routines Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-11 17:15 ` Sami Tolvanen
2024-04-11 17:15 ` Sami Tolvanen
2024-04-11 17:53 ` Deepak Gupta
2024-04-11 17:53 ` Deepak Gupta
2024-04-11 18:33 ` Sami Tolvanen
2024-04-11 18:33 ` Sami Tolvanen
2024-04-09 6:10 ` [RFC PATCH 03/12] riscv: after saving expected landing pad (elp), clear elp state Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 04/12] riscv: update asm call sites with label setup Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 05/12] riscv: fix certain indirect jumps for kernel cfi Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 06/12] scs: place init shadow stack in .shadowstack section Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 07/12] riscv/mm: prepare shadow stack for init task for kernel cfi Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-05-12 20:12 ` Alexandre Ghiti
2024-05-12 20:12 ` Alexandre Ghiti
2024-05-13 18:59 ` Deepak Gupta
2024-05-13 18:59 ` Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta [this message]
2024-04-09 6:10 ` [RFC PATCH 08/12] riscv: dynamic (zicfiss) shadow call stack support Deepak Gupta
2024-04-11 17:05 ` Sami Tolvanen
2024-04-11 17:05 ` Sami Tolvanen
2024-04-11 17:30 ` Deepak Gupta
2024-04-11 17:30 ` Deepak Gupta
2024-04-11 17:47 ` Sami Tolvanen
2024-04-11 17:47 ` Sami Tolvanen
2024-04-09 6:10 ` [RFC PATCH 09/12] scs: kernel shadow stack with hardware assistance Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 10/12] riscv/traps: Introduce software check exception Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 11/12] riscv: Kconfig & Makefile for riscv kernel control flow integrity Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
2024-04-09 6:10 ` [RFC PATCH 12/12] riscv: enable kernel shadow stack and landing pad enforcement Deepak Gupta
2024-04-09 6:10 ` Deepak Gupta
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