From: James Raphael Tiovalen <jamestiotio@gmail.com>
To: kvm-riscv@lists.infradead.org
Subject: [kvm-unit-tests PATCH v6 1/5] riscv: Extend exception handling support for interrupts
Date: Tue, 30 Jul 2024 14:18:16 +0800 [thread overview]
Message-ID: <20240730061821.43811-2-jamestiotio@gmail.com> (raw)
In-Reply-To: <20240730061821.43811-1-jamestiotio@gmail.com>
From: Andrew Jones <andrew.jones@linux.dev>
Add install_irq_handler() to enable tests to install interrupt handlers.
Also add local_irq_enable() and local_irq_disable() to respectively
enable and disable IRQs via the sstatus.SIE bit.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
---
lib/riscv/asm/csr.h | 2 ++
lib/riscv/asm/processor.h | 13 +++++++++++++
lib/riscv/processor.c | 27 +++++++++++++++++++++++----
3 files changed, 38 insertions(+), 4 deletions(-)
diff --git a/lib/riscv/asm/csr.h b/lib/riscv/asm/csr.h
index 52608512..d6909d93 100644
--- a/lib/riscv/asm/csr.h
+++ b/lib/riscv/asm/csr.h
@@ -11,6 +11,8 @@
#define CSR_STVAL 0x143
#define CSR_SATP 0x180
+#define SR_SIE _AC(0x00000002, UL)
+
/* Exception cause high bit - is an interrupt if set */
#define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1))
diff --git a/lib/riscv/asm/processor.h b/lib/riscv/asm/processor.h
index 32c499d0..6451adb5 100644
--- a/lib/riscv/asm/processor.h
+++ b/lib/riscv/asm/processor.h
@@ -5,6 +5,7 @@
#include <asm/ptrace.h>
#define EXCEPTION_CAUSE_MAX 16
+#define INTERRUPT_CAUSE_MAX 16
typedef void (*exception_fn)(struct pt_regs *);
@@ -13,6 +14,7 @@ struct thread_info {
unsigned long hartid;
unsigned long isa[1];
exception_fn exception_handlers[EXCEPTION_CAUSE_MAX];
+ exception_fn interrupt_handlers[INTERRUPT_CAUSE_MAX];
};
static inline struct thread_info *current_thread_info(void)
@@ -20,7 +22,18 @@ static inline struct thread_info *current_thread_info(void)
return (struct thread_info *)csr_read(CSR_SSCRATCH);
}
+static inline void local_irq_enable(void)
+{
+ csr_set(CSR_SSTATUS, SR_SIE);
+}
+
+static inline void local_irq_disable(void)
+{
+ csr_clear(CSR_SSTATUS, SR_SIE);
+}
+
void install_exception_handler(unsigned long cause, void (*handler)(struct pt_regs *));
+void install_irq_handler(unsigned long cause, void (*handler)(struct pt_regs *));
void do_handle_exception(struct pt_regs *regs);
void thread_info_init(void);
diff --git a/lib/riscv/processor.c b/lib/riscv/processor.c
index ece7cbff..0dffadc7 100644
--- a/lib/riscv/processor.c
+++ b/lib/riscv/processor.c
@@ -36,10 +36,21 @@ void do_handle_exception(struct pt_regs *regs)
{
struct thread_info *info = current_thread_info();
- assert(regs->cause < EXCEPTION_CAUSE_MAX);
- if (info->exception_handlers[regs->cause]) {
- info->exception_handlers[regs->cause](regs);
- return;
+ if (regs->cause & CAUSE_IRQ_FLAG) {
+ unsigned long irq_cause = regs->cause & ~CAUSE_IRQ_FLAG;
+
+ assert(irq_cause < INTERRUPT_CAUSE_MAX);
+ if (info->interrupt_handlers[irq_cause]) {
+ info->interrupt_handlers[irq_cause](regs);
+ return;
+ }
+ } else {
+ assert(regs->cause < EXCEPTION_CAUSE_MAX);
+
+ if (info->exception_handlers[regs->cause]) {
+ info->exception_handlers[regs->cause](regs);
+ return;
+ }
}
show_regs(regs);
@@ -47,6 +58,14 @@ void do_handle_exception(struct pt_regs *regs)
abort();
}
+void install_irq_handler(unsigned long cause, void (*handler)(struct pt_regs *))
+{
+ struct thread_info *info = current_thread_info();
+
+ assert(cause < INTERRUPT_CAUSE_MAX);
+ info->interrupt_handlers[cause] = handler;
+}
+
void install_exception_handler(unsigned long cause, void (*handler)(struct pt_regs *))
{
struct thread_info *info = current_thread_info();
--
2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: James Raphael Tiovalen <jamestiotio@gmail.com>
To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Cc: andrew.jones@linux.dev, atishp@rivosinc.com,
cade.richard@berkeley.edu,
James Raphael Tiovalen <jamestiotio@gmail.com>
Subject: [kvm-unit-tests PATCH v6 1/5] riscv: Extend exception handling support for interrupts
Date: Tue, 30 Jul 2024 14:18:16 +0800 [thread overview]
Message-ID: <20240730061821.43811-2-jamestiotio@gmail.com> (raw)
In-Reply-To: <20240730061821.43811-1-jamestiotio@gmail.com>
From: Andrew Jones <andrew.jones@linux.dev>
Add install_irq_handler() to enable tests to install interrupt handlers.
Also add local_irq_enable() and local_irq_disable() to respectively
enable and disable IRQs via the sstatus.SIE bit.
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
---
lib/riscv/asm/csr.h | 2 ++
lib/riscv/asm/processor.h | 13 +++++++++++++
lib/riscv/processor.c | 27 +++++++++++++++++++++++----
3 files changed, 38 insertions(+), 4 deletions(-)
diff --git a/lib/riscv/asm/csr.h b/lib/riscv/asm/csr.h
index 52608512..d6909d93 100644
--- a/lib/riscv/asm/csr.h
+++ b/lib/riscv/asm/csr.h
@@ -11,6 +11,8 @@
#define CSR_STVAL 0x143
#define CSR_SATP 0x180
+#define SR_SIE _AC(0x00000002, UL)
+
/* Exception cause high bit - is an interrupt if set */
#define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1))
diff --git a/lib/riscv/asm/processor.h b/lib/riscv/asm/processor.h
index 32c499d0..6451adb5 100644
--- a/lib/riscv/asm/processor.h
+++ b/lib/riscv/asm/processor.h
@@ -5,6 +5,7 @@
#include <asm/ptrace.h>
#define EXCEPTION_CAUSE_MAX 16
+#define INTERRUPT_CAUSE_MAX 16
typedef void (*exception_fn)(struct pt_regs *);
@@ -13,6 +14,7 @@ struct thread_info {
unsigned long hartid;
unsigned long isa[1];
exception_fn exception_handlers[EXCEPTION_CAUSE_MAX];
+ exception_fn interrupt_handlers[INTERRUPT_CAUSE_MAX];
};
static inline struct thread_info *current_thread_info(void)
@@ -20,7 +22,18 @@ static inline struct thread_info *current_thread_info(void)
return (struct thread_info *)csr_read(CSR_SSCRATCH);
}
+static inline void local_irq_enable(void)
+{
+ csr_set(CSR_SSTATUS, SR_SIE);
+}
+
+static inline void local_irq_disable(void)
+{
+ csr_clear(CSR_SSTATUS, SR_SIE);
+}
+
void install_exception_handler(unsigned long cause, void (*handler)(struct pt_regs *));
+void install_irq_handler(unsigned long cause, void (*handler)(struct pt_regs *));
void do_handle_exception(struct pt_regs *regs);
void thread_info_init(void);
diff --git a/lib/riscv/processor.c b/lib/riscv/processor.c
index ece7cbff..0dffadc7 100644
--- a/lib/riscv/processor.c
+++ b/lib/riscv/processor.c
@@ -36,10 +36,21 @@ void do_handle_exception(struct pt_regs *regs)
{
struct thread_info *info = current_thread_info();
- assert(regs->cause < EXCEPTION_CAUSE_MAX);
- if (info->exception_handlers[regs->cause]) {
- info->exception_handlers[regs->cause](regs);
- return;
+ if (regs->cause & CAUSE_IRQ_FLAG) {
+ unsigned long irq_cause = regs->cause & ~CAUSE_IRQ_FLAG;
+
+ assert(irq_cause < INTERRUPT_CAUSE_MAX);
+ if (info->interrupt_handlers[irq_cause]) {
+ info->interrupt_handlers[irq_cause](regs);
+ return;
+ }
+ } else {
+ assert(regs->cause < EXCEPTION_CAUSE_MAX);
+
+ if (info->exception_handlers[regs->cause]) {
+ info->exception_handlers[regs->cause](regs);
+ return;
+ }
}
show_regs(regs);
@@ -47,6 +58,14 @@ void do_handle_exception(struct pt_regs *regs)
abort();
}
+void install_irq_handler(unsigned long cause, void (*handler)(struct pt_regs *))
+{
+ struct thread_info *info = current_thread_info();
+
+ assert(cause < INTERRUPT_CAUSE_MAX);
+ info->interrupt_handlers[cause] = handler;
+}
+
void install_exception_handler(unsigned long cause, void (*handler)(struct pt_regs *))
{
struct thread_info *info = current_thread_info();
--
2.43.0
next prev parent reply other threads:[~2024-07-30 6:18 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-30 6:18 [kvm-unit-tests PATCH v6 0/5] riscv: sbi: Add support to test timer extension James Raphael Tiovalen
2024-07-30 6:18 ` James Raphael Tiovalen
2024-07-30 6:18 ` James Raphael Tiovalen [this message]
2024-07-30 6:18 ` [kvm-unit-tests PATCH v6 1/5] riscv: Extend exception handling support for interrupts James Raphael Tiovalen
2024-07-30 6:18 ` [kvm-unit-tests PATCH v6 2/5] riscv: Update exception cause list James Raphael Tiovalen
2024-07-30 6:18 ` James Raphael Tiovalen
2024-07-30 6:18 ` [kvm-unit-tests PATCH v6 3/5] riscv: Add method to probe for SBI extensions James Raphael Tiovalen
2024-07-30 6:18 ` James Raphael Tiovalen
2024-07-30 6:18 ` [kvm-unit-tests PATCH v6 4/5] riscv: Add some delay and timer routines James Raphael Tiovalen
2024-07-30 6:18 ` James Raphael Tiovalen
2024-07-30 6:18 ` [kvm-unit-tests PATCH v6 5/5] riscv: sbi: Add test for timer extension James Raphael Tiovalen
2024-07-30 6:18 ` James Raphael Tiovalen
2024-08-02 8:36 ` Andrew Jones
2024-08-02 8:36 ` Andrew Jones
2024-08-02 12:23 ` James R T
2024-08-02 12:23 ` James R T
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240730061821.43811-2-jamestiotio@gmail.com \
--to=jamestiotio@gmail.com \
--cc=kvm-riscv@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.