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From: Nicholas Piggin <npiggin@gmail.com>
To: Gerd Hoffmann <kraxel@redhat.com>
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
	qemu-devel@nongnu.org, "Kevin Wolf" <kwolf@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Fabiano Rosas" <farosas@suse.de>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Phil Dennis-Jordan" <phil@philjordan.eu>,
	"Bernhard Beschow" <shentey@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v4 10/22] hw/usb/hcd-xhci-pci: Add TI TUSB73X0 XHCI controller model
Date: Fri,  2 May 2025 13:30:34 +1000	[thread overview]
Message-ID: <20250502033047.102465-11-npiggin@gmail.com> (raw)
In-Reply-To: <20250502033047.102465-1-npiggin@gmail.com>

The TI TUSB73X0 controller has some interesting differences from NEC,
notably a separate BAR for MSIX, and PM capabilities. The spec is freely
available without sign-up.

This controller is accepted by IBM Power proprietary firmware and
software (when the subsystem IDs are set to Power servers, which is not
done here). IBM code is picky about device support, so the NEC device
can not be used.

xhci qtests are enabled for this device.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 include/hw/pci/pci_ids.h        |  1 +
 include/hw/usb/xhci.h           |  1 +
 hw/usb/hcd-xhci-ti.c            | 77 +++++++++++++++++++++++++++++++++
 tests/qtest/usb-hcd-xhci-test.c |  3 ++
 hw/usb/Kconfig                  |  5 +++
 hw/usb/meson.build              |  1 +
 6 files changed, 88 insertions(+)
 create mode 100644 hw/usb/hcd-xhci-ti.c

diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
index 33e2898be95..99fe751703f 100644
--- a/include/hw/pci/pci_ids.h
+++ b/include/hw/pci/pci_ids.h
@@ -182,6 +182,7 @@
 #define PCI_VENDOR_ID_HP                 0x103c
 
 #define PCI_VENDOR_ID_TI                 0x104c
+#define PCI_DEVICE_ID_TI_TUSB73X0        0x8241
 
 #define PCI_VENDOR_ID_MOTOROLA           0x1057
 #define PCI_DEVICE_ID_MOTOROLA_MPC106    0x0002
diff --git a/include/hw/usb/xhci.h b/include/hw/usb/xhci.h
index 5c90e1373e5..203ec1fca32 100644
--- a/include/hw/usb/xhci.h
+++ b/include/hw/usb/xhci.h
@@ -3,6 +3,7 @@
 
 #define TYPE_XHCI "base-xhci"
 #define TYPE_NEC_XHCI "nec-usb-xhci"
+#define TYPE_TI_XHCI "ti-usb-xhci"
 #define TYPE_QEMU_XHCI "qemu-xhci"
 #define TYPE_XHCI_SYSBUS "sysbus-xhci"
 
diff --git a/hw/usb/hcd-xhci-ti.c b/hw/usb/hcd-xhci-ti.c
new file mode 100644
index 00000000000..b7bb71c62e8
--- /dev/null
+++ b/hw/usb/hcd-xhci-ti.c
@@ -0,0 +1,77 @@
+/*
+ * USB xHCI TI TUSB73X0 controller emulation
+ * Datasheet https://www.ti.com/product/TUSB7340
+ *
+ * Copyright (c) 2025 IBM Corporation
+ * Derived from hcd-xhci-nec.c, copyright accordingly.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "hw/usb.h"
+#include "qemu/module.h"
+#include "hw/pci/pci.h"
+#include "hw/qdev-properties.h"
+
+#include "hcd-xhci-pci.h"
+
+OBJECT_DECLARE_SIMPLE_TYPE(XHCITiState, TI_XHCI)
+
+struct XHCITiState {
+    XHCIPciState parent_obj;
+
+    uint32_t intrs;
+    uint32_t slots;
+};
+
+static const Property ti_xhci_properties[] = {
+    DEFINE_PROP_UINT32("intrs", XHCITiState, intrs, 8),
+    DEFINE_PROP_UINT32("slots", XHCITiState, slots, XHCI_MAXSLOTS),
+};
+
+static void ti_xhci_instance_init(Object *obj)
+{
+    XHCIPciState *pci = XHCI_PCI(obj);
+    XHCITiState *ti = TI_XHCI(obj);
+
+    pci->xhci.numintrs = ti->intrs;
+    pci->xhci.numslots = ti->slots;
+
+    /* Taken from datasheet */
+    pci->cache_line_size = 0x0;
+    pci->pm_cap_off = 0x40;
+    pci->pcie_cap_off = 0x70;
+    pci->msi_cap_off = 0x48;
+    pci->msix_cap_off = 0xc0;
+    pci->msix_bar_nr = 0x2;
+    pci->msix_bar_size = 0x800000;
+    pci->msix_table_off = 0x0;
+    pci->msix_pba_off = 0x1000;
+}
+
+static void ti_xhci_class_init(ObjectClass *klass, const void *data)
+{
+    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    device_class_set_props(dc, ti_xhci_properties);
+    k->vendor_id    = PCI_VENDOR_ID_TI;
+    k->device_id    = PCI_DEVICE_ID_TI_TUSB73X0;
+    k->revision     = 0x02;
+}
+
+static const TypeInfo ti_xhci_info = {
+    .name          = TYPE_TI_XHCI,
+    .parent        = TYPE_XHCI_PCI,
+    .instance_size = sizeof(XHCITiState),
+    .instance_init = ti_xhci_instance_init,
+    .class_init    = ti_xhci_class_init,
+};
+
+static void ti_xhci_register_types(void)
+{
+    type_register_static(&ti_xhci_info);
+}
+
+type_init(ti_xhci_register_types)
diff --git a/tests/qtest/usb-hcd-xhci-test.c b/tests/qtest/usb-hcd-xhci-test.c
index 2eecc8d9f26..428200d9e41 100644
--- a/tests/qtest/usb-hcd-xhci-test.c
+++ b/tests/qtest/usb-hcd-xhci-test.c
@@ -71,6 +71,8 @@ typedef struct XHCIQState {
                       PCI_VENDOR_ID_REDHAT)
 #define XHCI_NEC_ID (PCI_DEVICE_ID_NEC_UPD720200 << 16 | \
                      PCI_VENDOR_ID_NEC)
+#define XHCI_TI_ID  (PCI_DEVICE_ID_TI_TUSB73X0 << 16 | \
+                     PCI_VENDOR_ID_TI)
 
 /**
  * Locate, verify, and return a handle to the XHCI device.
@@ -932,6 +934,7 @@ int main(int argc, char **argv)
     TestData td[] = {
         { .device = "qemu-xhci", .fingerprint = XHCI_QEMU_ID, },
         { .device = "nec-usb-xhci", .fingerprint = XHCI_NEC_ID, },
+        { .device = "ti-usb-xhci", .fingerprint = XHCI_TI_ID, },
     };
 
     g_test_init(&argc, &argv, NULL);
diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig
index 69c663be52f..00d82a97211 100644
--- a/hw/usb/Kconfig
+++ b/hw/usb/Kconfig
@@ -49,6 +49,11 @@ config USB_XHCI_NEC
     default y if PCI_DEVICES
     select USB_XHCI_PCI
 
+config USB_XHCI_TI
+    bool
+    default y if PCI_DEVICES
+    select USB_XHCI_PCI
+
 config USB_XHCI_SYSBUS
     bool
     select USB_XHCI
diff --git a/hw/usb/meson.build b/hw/usb/meson.build
index 17360a5b5a4..375fa420be6 100644
--- a/hw/usb/meson.build
+++ b/hw/usb/meson.build
@@ -23,6 +23,7 @@ system_ss.add(when: 'CONFIG_USB_XHCI', if_true: files('hcd-xhci.c'))
 system_ss.add(when: 'CONFIG_USB_XHCI_PCI', if_true: files('hcd-xhci-pci.c'))
 system_ss.add(when: 'CONFIG_USB_XHCI_SYSBUS', if_true: files('hcd-xhci-sysbus.c'))
 system_ss.add(when: 'CONFIG_USB_XHCI_NEC', if_true: files('hcd-xhci-nec.c'))
+system_ss.add(when: 'CONFIG_USB_XHCI_TI', if_true: files('hcd-xhci-ti.c'))
 system_ss.add(when: 'CONFIG_USB_DWC2', if_true: files('hcd-dwc2.c'))
 system_ss.add(when: 'CONFIG_USB_DWC3', if_true: files('hcd-dwc3.c'))
 system_ss.add(when: 'CONFIG_USB_CHIPIDEA', if_true: files('chipidea.c'))
-- 
2.47.1



  parent reply	other threads:[~2025-05-02  3:32 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-02  3:30 [PATCH v4 00/22] usb/xhci and usb/msd improvements and tests Nicholas Piggin
2025-05-02  3:30 ` [PATCH v4 01/22] hw/usb/xhci: Move HCD constants to a header and add register constants Nicholas Piggin
2025-05-12 12:25   ` Peter Maydell
2025-05-02  3:30 ` [PATCH v4 02/22] hw/usb/xhci: Rename and move HCD register region constants to header Nicholas Piggin
2025-05-12 12:29   ` Peter Maydell
2025-05-02  3:30 ` [PATCH v4 03/22] tests/qtest/xhci: test the qemu-xhci device Nicholas Piggin
2025-05-19 13:54   ` Fabiano Rosas
2025-05-02  3:30 ` [PATCH v4 04/22] tests/qtest/xhci: Add controller and device setup and ring tests Nicholas Piggin
2025-05-19 14:03   ` Fabiano Rosas
2025-05-02  3:30 ` [PATCH v4 05/22] tests/qtest/xhci: Add basic USB Mass Storage tests Nicholas Piggin
2025-05-19 14:44   ` Fabiano Rosas
2025-05-02  3:30 ` [PATCH v4 06/22] hw/usb/xhci: Support TR NOOP commands Nicholas Piggin
2025-05-12 13:06   ` Peter Maydell
2025-05-02  3:30 ` [PATCH v4 07/22] tests/qtest/xhci: add a test for " Nicholas Piggin
2025-05-19 14:54   ` Fabiano Rosas
2025-05-02  3:30 ` [PATCH v4 08/22] tests/qtest/usb-hcd-xhci: Deliver msix interrupts Nicholas Piggin
2025-05-02  8:24   ` Philippe Mathieu-Daudé
2025-05-05  1:05     ` Nicholas Piggin
2025-05-02  3:30 ` [PATCH v4 09/22] hw/usb/hcd-xhci-pci: Make PCI device more configurable Nicholas Piggin
2025-05-12 13:12   ` Peter Maydell
2025-05-02  3:30 ` Nicholas Piggin [this message]
2025-05-12 13:15   ` [PATCH v4 10/22] hw/usb/hcd-xhci-pci: Add TI TUSB73X0 XHCI controller model Peter Maydell
2025-05-02  3:30 ` [PATCH v4 11/22] usb/msd: Split in and out packet handling Nicholas Piggin
2025-05-05  9:22   ` Kevin Wolf
2025-05-02  3:30 ` [PATCH v4 12/22] usb/msd: Ensure packet structure layout is correct Nicholas Piggin
2025-05-05  9:30   ` Kevin Wolf
2025-05-02  3:30 ` [PATCH v4 13/22] usb/msd: Improved handling of mass storage reset Nicholas Piggin
2025-05-02  3:30 ` [PATCH v4 14/22] usb/msd: Improve packet validation error logging Nicholas Piggin
2025-05-05 10:26   ` Kevin Wolf
2025-05-02  3:30 ` [PATCH v4 15/22] usb/msd: Allow CBW packet size greater than 31 Nicholas Piggin
2025-05-05 10:50   ` Kevin Wolf
2025-05-02  3:30 ` [PATCH v4 16/22] usb/msd: Split async packet tracking into data and csw Nicholas Piggin
2025-05-05 13:05   ` Kevin Wolf
2025-05-05 14:04     ` Kevin Wolf
2025-05-02  3:30 ` [PATCH v4 17/22] usb/msd: Add some additional assertions Nicholas Piggin
2025-05-02  3:30 ` [PATCH v4 18/22] usb/msd: Rename mode to cbw_state, and tweak names Nicholas Piggin
2025-05-02  3:30 ` [PATCH v4 19/22] usb/msd: Add NODATA CBW state Nicholas Piggin
2025-05-02  3:30 ` [PATCH v4 20/22] usb/msd: Permit a DATA-IN or CSW packet before CBW packet Nicholas Piggin
2025-05-02  3:30 ` [PATCH v4 21/22] tests/qtest/xhci: Test USB Mass Storage relaxed CSW order Nicholas Piggin
2025-05-19 15:03   ` Fabiano Rosas
2025-05-02  3:30 ` [PATCH v4 22/22] usb/msd: Add more tracing Nicholas Piggin
2025-05-05  2:03 ` [PATCH v4 00/22] usb/xhci and usb/msd improvements and tests Nicholas Piggin
2025-05-05  9:02   ` Kevin Wolf
2025-05-12 13:20     ` Peter Maydell
2025-05-12 15:33       ` Fabiano Rosas

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