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From: Alex Elder <elder@riscstar.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	mturquette@baylibre.com, sboyd@kernel.org,
	p.zabel@pengutronix.de, paul.walmsley@sifive.com,
	palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
	dlan@gentoo.org
Cc: heylenay@4d2.org, inochiama@outlook.com, guodong@riscstar.com,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	spacemit@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v9 6/6] riscv: dts: spacemit: add reset support for the K1 SoC
Date: Mon, 12 May 2025 13:32:11 -0500	[thread overview]
Message-ID: <20250512183212.3465963-7-elder@riscstar.com> (raw)
In-Reply-To: <20250512183212.3465963-1-elder@riscstar.com>

Define syscon nodes for the RCPU, RCPU2, and APBC2 SpacemiT CCUS, which
currently support resets but not clocks in the SpacemiT K1.

Signed-off-by: Alex Elder <elder@riscstar.com>
---
 arch/riscv/boot/dts/spacemit/k1.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index c0f8c5fca975d..de403bda2b878 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -346,6 +346,18 @@ soc {
 		dma-noncoherent;
 		ranges;
 
+		syscon_rcpu: system-controller@c0880000 {
+			compatible = "spacemit,k1-syscon-rcpu";
+			reg = <0x0 0xc0880000 0x0 0x2048>;
+			#reset-cells = <1>;
+		};
+
+		syscon_rcpu2: system-controller@c0888000 {
+			compatible = "spacemit,k1-syscon-rcpu2";
+			reg = <0x0 0xc0888000 0x0 0x28>;
+			#reset-cells = <1>;
+		};
+
 		syscon_apbc: system-controller@d4015000 {
 			compatible = "spacemit,k1-syscon-apbc";
 			reg = <0x0 0xd4015000 0x0 0x1000>;
@@ -553,6 +565,12 @@ clint: timer@e4000000 {
 					      <&cpu7_intc 3>, <&cpu7_intc 7>;
 		};
 
+		syscon_apbc2: system-controller@f0610000 {
+			compatible = "spacemit,k1-syscon-apbc2";
+			reg = <0x0 0xf0610000 0x0 0x20>;
+			#reset-cells = <1>;
+		};
+
 		sec_uart1: serial@f0612000 {
 			compatible = "spacemit,k1-uart", "intel,xscale-uart";
 			reg = <0x0 0xf0612000 0x0 0x100>;
-- 
2.45.2


WARNING: multiple messages have this Message-ID (diff)
From: Alex Elder <elder@riscstar.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	mturquette@baylibre.com, sboyd@kernel.org,
	p.zabel@pengutronix.de, paul.walmsley@sifive.com,
	palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
	dlan@gentoo.org
Cc: heylenay@4d2.org, inochiama@outlook.com, guodong@riscstar.com,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	spacemit@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v9 6/6] riscv: dts: spacemit: add reset support for the K1 SoC
Date: Mon, 12 May 2025 13:32:11 -0500	[thread overview]
Message-ID: <20250512183212.3465963-7-elder@riscstar.com> (raw)
In-Reply-To: <20250512183212.3465963-1-elder@riscstar.com>

Define syscon nodes for the RCPU, RCPU2, and APBC2 SpacemiT CCUS, which
currently support resets but not clocks in the SpacemiT K1.

Signed-off-by: Alex Elder <elder@riscstar.com>
---
 arch/riscv/boot/dts/spacemit/k1.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index c0f8c5fca975d..de403bda2b878 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -346,6 +346,18 @@ soc {
 		dma-noncoherent;
 		ranges;
 
+		syscon_rcpu: system-controller@c0880000 {
+			compatible = "spacemit,k1-syscon-rcpu";
+			reg = <0x0 0xc0880000 0x0 0x2048>;
+			#reset-cells = <1>;
+		};
+
+		syscon_rcpu2: system-controller@c0888000 {
+			compatible = "spacemit,k1-syscon-rcpu2";
+			reg = <0x0 0xc0888000 0x0 0x28>;
+			#reset-cells = <1>;
+		};
+
 		syscon_apbc: system-controller@d4015000 {
 			compatible = "spacemit,k1-syscon-apbc";
 			reg = <0x0 0xd4015000 0x0 0x1000>;
@@ -553,6 +565,12 @@ clint: timer@e4000000 {
 					      <&cpu7_intc 3>, <&cpu7_intc 7>;
 		};
 
+		syscon_apbc2: system-controller@f0610000 {
+			compatible = "spacemit,k1-syscon-apbc2";
+			reg = <0x0 0xf0610000 0x0 0x20>;
+			#reset-cells = <1>;
+		};
+
 		sec_uart1: serial@f0612000 {
 			compatible = "spacemit,k1-uart", "intel,xscale-uart";
 			reg = <0x0 0xf0612000 0x0 0x100>;
-- 
2.45.2


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  parent reply	other threads:[~2025-05-12 18:32 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-12 18:32 [PATCH v9 0/6] reset: spacemit: add K1 reset support Alex Elder
2025-05-12 18:32 ` Alex Elder
2025-05-12 18:32 ` [PATCH v9 1/6] dt-bindings: soc: spacemit: define spacemit,k1-ccu resets Alex Elder
2025-05-12 18:32   ` Alex Elder
2025-05-12 18:32 ` [PATCH v9 2/6] soc: spacemit: create a header for clock/reset registers Alex Elder
2025-05-12 18:32   ` Alex Elder
2025-05-13  5:02   ` Haylen Chu
2025-05-13  5:02     ` Haylen Chu
2025-05-12 18:32 ` [PATCH v9 3/6] clk: spacemit: set up reset auxiliary devices Alex Elder
2025-05-12 18:32   ` Alex Elder
2025-05-13  5:01   ` Haylen Chu
2025-05-13  5:01     ` Haylen Chu
2025-05-12 18:32 ` [PATCH v9 4/6] reset: spacemit: add support for SpacemiT CCU resets Alex Elder
2025-05-12 18:32   ` Alex Elder
2025-05-13  9:21   ` Philipp Zabel
2025-05-13  9:21     ` Philipp Zabel
2025-05-13 12:24     ` Alex Elder
2025-05-13 12:24       ` Alex Elder
2025-05-12 18:32 ` [PATCH v9 5/6] reset: spacemit: define three more CCUs Alex Elder
2025-05-12 18:32   ` Alex Elder
2025-05-13  9:21   ` Philipp Zabel
2025-05-13  9:21     ` Philipp Zabel
2025-05-13 20:12     ` Yixun Lan
2025-05-13 20:12       ` Yixun Lan
2025-05-13 20:36       ` Alex Elder
2025-05-13 20:36         ` Alex Elder
2025-05-12 18:32 ` Alex Elder [this message]
2025-05-12 18:32   ` [PATCH v9 6/6] riscv: dts: spacemit: add reset support for the K1 SoC Alex Elder
2025-05-13 20:28 ` [PATCH v9 0/6] reset: spacemit: add K1 reset support Yixun Lan
2025-05-13 20:28   ` Yixun Lan

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