From: Ard Biesheuvel <ardb+git@google.com>
To: linux-kernel@vger.kernel.org
Cc: linux-efi@vger.kernel.org, x86@kernel.org,
Ard Biesheuvel <ardb@kernel.org>, Borislav Petkov <bp@alien8.de>,
Ingo Molnar <mingo@kernel.org>,
Dionna Amalie Glaze <dionnaglaze@google.com>,
Kevin Loughlin <kevinloughlin@google.com>,
Tom Lendacky <thomas.lendacky@amd.com>
Subject: [RFT PATCH v3 12/21] x86/sev: Unify SEV-SNP hypervisor feature check
Date: Mon, 12 May 2025 21:08:47 +0200 [thread overview]
Message-ID: <20250512190834.332684-35-ardb+git@google.com> (raw)
In-Reply-To: <20250512190834.332684-23-ardb+git@google.com>
From: Ard Biesheuvel <ardb@kernel.org>
The decompressor and the core kernel both check the hypervisor feature
mask exposed by the hypervisor, but test it in slightly different ways.
This disparity seems unintentional, and simply a result of the fact that
the decompressor and the core kernel evolve differently over time when
it comes to setting up the SEV-SNP execution context.
So move the HV feature check into a helper function and call that
instead. For the core kernel, move the check to an earlier boot stage,
right after the point where it is established that the guest is
executing in SEV-SNP mode.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/x86/boot/compressed/sev.c | 19 +----------
arch/x86/boot/startup/sev-shared.c | 33 +++++++++++++++-----
arch/x86/boot/startup/sme.c | 2 ++
arch/x86/coco/sev/core.c | 11 -------
arch/x86/include/asm/sev-internal.h | 2 +-
arch/x86/include/asm/sev.h | 2 ++
6 files changed, 32 insertions(+), 37 deletions(-)
diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c
index 68fc3d179bbe..4b7a99b2f822 100644
--- a/arch/x86/boot/compressed/sev.c
+++ b/arch/x86/boot/compressed/sev.c
@@ -397,24 +397,7 @@ void sev_enable(struct boot_params *bp)
sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_PROT_UNSUPPORTED);
}
- /*
- * SNP is supported in v2 of the GHCB spec which mandates support for HV
- * features.
- */
- if (sev_status & MSR_AMD64_SEV_SNP_ENABLED) {
- u64 hv_features;
-
- hv_features = get_hv_features();
- if (!(hv_features & GHCB_HV_FT_SNP))
- sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);
-
- /*
- * Running at VMPL0 is required unless an SVSM is present and
- * the hypervisor supports the required SVSM GHCB events.
- */
- if (snp_vmpl > 0 && !(hv_features & GHCB_HV_FT_SNP_MULTI_VMPL))
- sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_NOT_VMPL0);
- }
+ snp_check_hv_features();
if (snp && !(sev_status & MSR_AMD64_SEV_SNP_ENABLED))
error("SEV-SNP supported indicated by CC blob, but not SEV status MSR.");
diff --git a/arch/x86/boot/startup/sev-shared.c b/arch/x86/boot/startup/sev-shared.c
index 70ad9a0aa023..560985ef8df6 100644
--- a/arch/x86/boot/startup/sev-shared.c
+++ b/arch/x86/boot/startup/sev-shared.c
@@ -66,16 +66,10 @@ sev_es_terminate(unsigned int set, unsigned int reason)
asm volatile("hlt\n" : : : "memory");
}
-/*
- * The hypervisor features are available from GHCB version 2 onward.
- */
-u64 get_hv_features(void)
+static u64 __head get_hv_features(void)
{
u64 val;
- if (ghcb_version < 2)
- return 0;
-
sev_es_wr_ghcb_msr(GHCB_MSR_HV_FT_REQ);
VMGEXIT();
@@ -86,6 +80,31 @@ u64 get_hv_features(void)
return GHCB_MSR_HV_FT_RESP_VAL(val);
}
+u64 __head snp_check_hv_features(void)
+{
+ /*
+ * SNP is supported in v2 of the GHCB spec which mandates support for HV
+ * features.
+ */
+ if (sev_status & MSR_AMD64_SEV_SNP_ENABLED) {
+ u64 hv_features;
+
+ hv_features = get_hv_features();
+ if (!(hv_features & GHCB_HV_FT_SNP))
+ sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);
+
+ /*
+ * Running at VMPL0 is required unless an SVSM is present and
+ * the hypervisor supports the required SVSM GHCB events.
+ */
+ if (snp_vmpl > 0 && !(hv_features & GHCB_HV_FT_SNP_MULTI_VMPL))
+ sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_NOT_VMPL0);
+
+ return hv_features;
+ }
+ return 0;
+}
+
int svsm_perform_msr_protocol(struct svsm_call *call)
{
u8 pending = 0;
diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c
index 753cd2094080..0ae04e333f51 100644
--- a/arch/x86/boot/startup/sme.c
+++ b/arch/x86/boot/startup/sme.c
@@ -533,6 +533,8 @@ void __head sme_enable(struct boot_params *bp)
if (snp_en ^ !!(msr & MSR_AMD64_SEV_SNP_ENABLED))
snp_abort();
+ sev_hv_features = snp_check_hv_features();
+
/* Check if memory encryption is enabled */
if (feature_mask == AMD_SME_BIT) {
if (!(bp->hdr.xloadflags & XLF_MEM_ENCRYPTION))
diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
index fa7fdd11a45b..fc4f6f188d42 100644
--- a/arch/x86/coco/sev/core.c
+++ b/arch/x86/coco/sev/core.c
@@ -1264,17 +1264,6 @@ void __init sev_es_init_vc_handling(void)
if (!sev_es_check_cpu_features())
panic("SEV-ES CPU Features missing");
- /*
- * SNP is supported in v2 of the GHCB spec which mandates support for HV
- * features.
- */
- if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) {
- sev_hv_features = get_hv_features();
-
- if (!(sev_hv_features & GHCB_HV_FT_SNP))
- sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);
- }
-
/* Initialize per-cpu GHCB pages */
for_each_possible_cpu(cpu) {
alloc_runtime_data(cpu);
diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h
index 3690994275dd..7ad8faf5e88b 100644
--- a/arch/x86/include/asm/sev-internal.h
+++ b/arch/x86/include/asm/sev-internal.h
@@ -81,6 +81,6 @@ static __always_inline void sev_es_wr_ghcb_msr(u64 val)
native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
}
-u64 get_hv_features(void);
+void check_hv_features(void);
const struct snp_cpuid_table *snp_cpuid_get_table(void);
diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h
index ae2502253bd3..17b03a1f5694 100644
--- a/arch/x86/include/asm/sev.h
+++ b/arch/x86/include/asm/sev.h
@@ -418,6 +418,7 @@ struct svsm_call {
#ifdef CONFIG_AMD_MEM_ENCRYPT
extern u8 snp_vmpl;
+extern u64 sev_hv_features;
extern void __sev_es_ist_enter(struct pt_regs *regs);
extern void __sev_es_ist_exit(void);
@@ -495,6 +496,7 @@ void snp_set_memory_private(unsigned long vaddr, unsigned long npages);
void snp_set_wakeup_secondary_cpu(void);
bool snp_init(struct boot_params *bp);
void __noreturn snp_abort(void);
+u64 snp_check_hv_features(void);
void snp_dmi_setup(void);
int snp_issue_svsm_attest_req(u64 call_id, struct svsm_call *call, struct svsm_attest_call *input);
void snp_accept_memory(phys_addr_t start, phys_addr_t end);
--
2.49.0.1045.g170613ef41-goog
next prev parent reply other threads:[~2025-05-12 19:11 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-12 19:08 [RFT PATCH v3 00/21] x86: strict separation of startup code Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 01/21] x86/sev: Separate MSR and GHCB based snp_cpuid() via a callback Ard Biesheuvel
2025-05-15 7:22 ` Ingo Molnar
2025-05-15 10:24 ` Ard Biesheuvel
2025-05-15 15:18 ` Ingo Molnar
2025-05-15 11:10 ` Borislav Petkov
2025-05-15 14:22 ` Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 02/21] x86/sev: Use MSR protocol for remapping SVSM calling area Ard Biesheuvel
2025-05-15 16:43 ` Borislav Petkov
2025-05-12 19:08 ` [RFT PATCH v3 03/21] x86/sev: Use MSR protocol only for early SVSM PVALIDATE call Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 04/21] x86/sev: Run RMPADJUST on SVSM calling area page to test VMPL Ard Biesheuvel
2025-05-20 9:44 ` Borislav Petkov
2025-05-12 19:08 ` [RFT PATCH v3 05/21] x86/sev: Move GHCB page based HV communication out of startup code Ard Biesheuvel
2025-05-20 11:38 ` Borislav Petkov
2025-05-20 11:49 ` Ard Biesheuvel
2025-05-20 13:58 ` Borislav Petkov
2025-05-12 19:08 ` [RFT PATCH v3 06/21] x86/sev: Avoid global variable to store virtual address of SVSM area Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 07/21] x86/sev: Move MSR save/restore out of early page state change helper Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 08/21] x86/sev: Share implementation of MSR-based page state change Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 09/21] x86/sev: Pass SVSM calling area down to early page state change API Ard Biesheuvel
2025-05-13 13:55 ` Ard Biesheuvel
2025-05-13 13:58 ` Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 10/21] x86/sev: Use boot SVSM CA for all startup and init code Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 11/21] x86/boot: Drop redundant RMPADJUST in SEV SVSM presence check Ard Biesheuvel
2025-05-12 19:08 ` Ard Biesheuvel [this message]
2025-05-30 11:16 ` [RFT PATCH v3 12/21] x86/sev: Unify SEV-SNP hypervisor feature check Borislav Petkov
2025-05-30 14:28 ` Ard Biesheuvel
2025-05-30 16:08 ` Borislav Petkov
2025-05-30 16:12 ` Ard Biesheuvel
2025-05-30 16:55 ` Borislav Petkov
2025-05-12 19:08 ` [RFT PATCH v3 13/21] x86/sev: Provide PIC aliases for SEV related data objects Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 14/21] x86/boot: Provide PIC aliases for 5-level paging related constants Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 15/21] x86/sev: Move __sev_[get|put]_ghcb() into separate noinstr object Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 16/21] x86/sev: Export startup routines for later use Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 17/21] x86/boot: Create a confined code area for startup code Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 18/21] x86/boot: Move startup code out of __head section Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 19/21] x86/boot: Disallow absolute symbol references in startup code Ard Biesheuvel
2025-05-12 19:08 ` [RFT PATCH v3 20/21] x86/boot: Revert "Reject absolute references in .head.text" Ard Biesheuvel
2025-06-01 9:39 ` Borislav Petkov
2025-05-12 19:08 ` [RFT PATCH v3 21/21] x86/boot: Get rid of the .head.text section Ard Biesheuvel
2025-05-12 19:17 ` [RFT PATCH v3 00/21] x86: strict separation of startup code Borislav Petkov
2025-05-13 10:02 ` Ingo Molnar
2025-05-13 10:12 ` Borislav Petkov
2025-05-13 11:22 ` Ingo Molnar
2025-05-13 14:16 ` Borislav Petkov
2025-05-13 15:01 ` Ard Biesheuvel
2025-05-13 16:44 ` Borislav Petkov
2025-05-13 21:31 ` Ard Biesheuvel
2025-05-14 6:32 ` Ingo Molnar
2025-05-14 7:41 ` Ard Biesheuvel
2025-05-15 7:17 ` Ingo Molnar
2025-05-14 6:20 ` Ingo Molnar
2025-05-14 8:17 ` Borislav Petkov
2025-05-14 8:21 ` Borislav Petkov
2025-05-14 9:54 ` Thomas Gleixner
2025-05-14 17:21 ` Borislav Petkov
2025-05-14 17:37 ` Ard Biesheuvel
2025-05-14 18:53 ` Borislav Petkov
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