All of lore.kernel.org
 help / color / mirror / Atom feed
From: Sasha Levin <sashal@kernel.org>
To: stable@vger.kernel.org
Cc: Pu Lehui <pulehui@huaweicloud.com>, Sasha Levin <sashal@kernel.org>
Subject: Re: [PATCH 5.10 01/14] arm64: insn: Add barrier encodings
Date: Sun,  8 Jun 2025 22:34:53 -0400	[thread overview]
Message-ID: <20250608174318-cc0f1a2fe73c685f@stable.kernel.org> (raw)
In-Reply-To: <20250607152521.2828291-2-pulehui@huaweicloud.com>

[ Sasha's backport helper bot ]

Hi,

✅ All tests passed successfully. No issues detected.
No action required from the submitter.

The upstream commit SHA1 provided is correct: d4b217330d7e0320084ff04c8491964f1f68980a

WARNING: Author mismatch between patch and upstream commit:
Backport author: Pu Lehui<pulehui@huaweicloud.com>
Commit author: Julien Thierry<jthierry@redhat.com>

Status in newer kernel trees:
6.15.y | Present (exact SHA1)
6.14.y | Present (exact SHA1)
6.12.y | Present (exact SHA1)
6.6.y | Present (exact SHA1)
6.1.y | Present (exact SHA1)
5.15.y | Present (exact SHA1)

Note: The patch differs from the upstream commit:
---
1:  d4b217330d7e0 ! 1:  ba32b33ce84dd arm64: insn: Add barrier encodings
    @@ Metadata
      ## Commit message ##
         arm64: insn: Add barrier encodings
     
    +    [ Upstream commit d4b217330d7e0320084ff04c8491964f1f68980a ]
    +
         Create necessary functions to encode/decode aarch64 barrier
         instructions.
     
    @@ Commit message
         Link: https://lore.kernel.org/r/20210303170536.1838032-7-jthierry@redhat.com
         [will: Don't reject DSB #4]
         Signed-off-by: Will Deacon <will@kernel.org>
    +    Signed-off-by: Pu Lehui <pulehui@huawei.com>
     
      ## arch/arm64/include/asm/insn.h ##
     @@ arch/arm64/include/asm/insn.h: __AARCH64_INSN_FUNCS(eret_auth,	0xFFFFFBFF, 0xD69F0BFF)
    @@ arch/arm64/include/asm/insn.h: static inline bool aarch64_insn_is_adr_adrp(u32 i
     +	       aarch64_insn_is_pssbb(insn);
     +}
     +
    + int aarch64_insn_read(void *addr, u32 *insnp);
    + int aarch64_insn_write(void *addr, u32 insn);
      enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
    - bool aarch64_insn_uses_literal(u32 insn);
    - bool aarch64_insn_is_branch(u32 insn);
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-5.10.y       |  Success    |  Success   |

  reply	other threads:[~2025-06-09  2:34 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-07 15:25 [PATCH 5.10 00/14] backport for CVE-2025-37948 and CVE-2025-37963 Pu Lehui
2025-06-07 15:25 ` [PATCH 5.10 01/14] arm64: insn: Add barrier encodings Pu Lehui
2025-06-09  2:34   ` Sasha Levin [this message]
2025-06-07 15:25 ` [PATCH 5.10 02/14] arm64: move AARCH64_BREAK_FAULT into insn-def.h Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 03/14] arm64: insn: add encoders for atomic operations Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 04/14] arm64: insn: Add support for encoding DSB Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 05/14] arm64: proton-pack: Expose whether the platform is mitigated by firmware Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 06/14] arm64: errata: Assume that unknown CPUs _are_ vulnerable to Spectre BHB Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 07/14] arm64: errata: Add KRYO 2XX/3XX/4XX silver cores to Spectre BHB safe list Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 08/14] arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 09/14] arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 10/14] arm64: proton-pack: Expose whether the branchy loop k value Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 11/14] arm64: spectre: increase parameters that can be used to turn off bhb mitigation individually Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 12/14] arm64: bpf: Add BHB mitigation to the epilogue for cBPF programs Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 13/14] arm64: bpf: Only mitigate cBPF programs loaded by unprivileged users Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 14/14] arm64: proton-pack: Add new CPUs 'k' values for branch mitigation Pu Lehui
2025-06-09  2:34   ` Sasha Levin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250608174318-cc0f1a2fe73c685f@stable.kernel.org \
    --to=sashal@kernel.org \
    --cc=pulehui@huaweicloud.com \
    --cc=stable@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.