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From: Sasha Levin <sashal@kernel.org>
To: stable@vger.kernel.org
Cc: Pu Lehui <pulehui@huaweicloud.com>, Sasha Levin <sashal@kernel.org>
Subject: Re: [PATCH 5.10 02/14] arm64: move AARCH64_BREAK_FAULT into insn-def.h
Date: Sun,  8 Jun 2025 22:34:18 -0400	[thread overview]
Message-ID: <20250608180205-091e3538a750c9e1@stable.kernel.org> (raw)
In-Reply-To: <20250607152521.2828291-3-pulehui@huaweicloud.com>

[ Sasha's backport helper bot ]

Hi,

✅ All tests passed successfully. No issues detected.
No action required from the submitter.

The upstream commit SHA1 provided is correct: 97e58e395e9c074fd096dad13c54e9f4112cf71d

WARNING: Author mismatch between patch and upstream commit:
Backport author: Pu Lehui<pulehui@huaweicloud.com>
Commit author: Hou Tao<houtao1@huawei.com>

Status in newer kernel trees:
6.15.y | Present (exact SHA1)
6.14.y | Present (exact SHA1)
6.12.y | Present (exact SHA1)
6.6.y | Present (exact SHA1)
6.1.y | Present (exact SHA1)
5.15.y | Not found

Note: The patch differs from the upstream commit:
---
1:  97e58e395e9c0 ! 1:  8387fc9ea68d2 arm64: move AARCH64_BREAK_FAULT into insn-def.h
    @@ Metadata
      ## Commit message ##
         arm64: move AARCH64_BREAK_FAULT into insn-def.h
     
    +    [ Upstream commit 97e58e395e9c074fd096dad13c54e9f4112cf71d ]
    +
         If CONFIG_ARM64_LSE_ATOMICS is off, encoders for LSE-related instructions
         can return AARCH64_BREAK_FAULT directly in insn.h. In order to access
         AARCH64_BREAK_FAULT in insn.h, we can not include debug-monitors.h in
    @@ Commit message
         Signed-off-by: Hou Tao <houtao1@huawei.com>
         Link: https://lore.kernel.org/r/20220217072232.1186625-2-houtao1@huawei.com
         Signed-off-by: Will Deacon <will@kernel.org>
    +    Conflicts:
    +            arch/arm64/include/asm/insn.h
    +    [not exist insn-def.h file, move to insn.h]
    +    Signed-off-by: Pu Lehui <pulehui@huawei.com>
     
      ## arch/arm64/include/asm/debug-monitors.h ##
     @@
    @@ arch/arm64/include/asm/debug-monitors.h
      	(AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5))
      
     
    - ## arch/arm64/include/asm/insn-def.h ##
    + ## arch/arm64/include/asm/insn.h ##
     @@
    - #ifndef __ASM_INSN_DEF_H
    - #define __ASM_INSN_DEF_H
    - 
    -+#include <asm/brk-imm.h>
    -+
      /* A64 instructions are always 32 bits. */
      #define	AARCH64_INSN_SIZE		4
      
    @@ arch/arm64/include/asm/insn-def.h
     + * BRK instruction encoding
     + * The #imm16 value should be placed at bits[20:5] within BRK ins
     + */
    -+#define AARCH64_BREAK_MON	0xd4200000
    ++#define AARCH64_BREAK_MON      0xd4200000
     +
     +/*
     + * BRK instruction for provoking a fault on purpose
     + * Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
     + */
    -+#define AARCH64_BREAK_FAULT	(AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
    ++#define AARCH64_BREAK_FAULT    (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
     +
    - #endif /* __ASM_INSN_DEF_H */
    + #ifndef __ASSEMBLY__
    + /*
    +  * ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
---

Results of testing on various branches:

| Branch                    | Patch Apply | Build Test |
|---------------------------|-------------|------------|
| stable/linux-5.15.y       |  Success    |  Success   |

  reply	other threads:[~2025-06-09  2:34 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-07 15:25 [PATCH 5.10 00/14] backport for CVE-2025-37948 and CVE-2025-37963 Pu Lehui
2025-06-07 15:25 ` [PATCH 5.10 01/14] arm64: insn: Add barrier encodings Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 02/14] arm64: move AARCH64_BREAK_FAULT into insn-def.h Pu Lehui
2025-06-09  2:34   ` Sasha Levin [this message]
2025-06-07 15:25 ` [PATCH 5.10 03/14] arm64: insn: add encoders for atomic operations Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 04/14] arm64: insn: Add support for encoding DSB Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 05/14] arm64: proton-pack: Expose whether the platform is mitigated by firmware Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 06/14] arm64: errata: Assume that unknown CPUs _are_ vulnerable to Spectre BHB Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 07/14] arm64: errata: Add KRYO 2XX/3XX/4XX silver cores to Spectre BHB safe list Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 08/14] arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 09/14] arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 10/14] arm64: proton-pack: Expose whether the branchy loop k value Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 11/14] arm64: spectre: increase parameters that can be used to turn off bhb mitigation individually Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 12/14] arm64: bpf: Add BHB mitigation to the epilogue for cBPF programs Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 13/14] arm64: bpf: Only mitigate cBPF programs loaded by unprivileged users Pu Lehui
2025-06-09  2:34   ` Sasha Levin
2025-06-07 15:25 ` [PATCH 5.10 14/14] arm64: proton-pack: Add new CPUs 'k' values for branch mitigation Pu Lehui
2025-06-09  2:34   ` Sasha Levin

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