From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
<nabihestefan@google.com>, <wuhaotsh@google.com>,
<titusr@google.com>
Subject: [PATCH v2 13/14] tests/functional/arm/test_aspeed_ast2600: add PCIe enumeration test
Date: Thu, 11 Sep 2025 15:24:37 +0800 [thread overview]
Message-ID: <20250911072452.314553-14-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250911072452.314553-1-jamin_lin@aspeedtech.com>
Extend the AST2600 functional tests with a PCIe enumeration check.
This patch introduces a new helper "do_ast2600_pcie_test()" that runs
"lspci" on the emulated system and verifies the presence of the expected
PCIe devices:
- 80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600
- 80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/functional/arm/test_aspeed_ast2600.py | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/tests/functional/arm/test_aspeed_ast2600.py b/tests/functional/arm/test_aspeed_ast2600.py
index 129695ca4e..f97fbbaa11 100755
--- a/tests/functional/arm/test_aspeed_ast2600.py
+++ b/tests/functional/arm/test_aspeed_ast2600.py
@@ -101,6 +101,14 @@ def test_arm_ast2600_evb_buildroot_tpm(self):
'https://github.com/AspeedTech-BMC/openbmc/releases/download/v09.07/ast2600-default-obmc.tar.gz',
'cb6c08595bcbba1672ce716b068ba4e48eda1ed9abe78a07b30392ba2278feba')
+ def do_ast2600_pcie_test(self):
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 80:00.0',
+ '80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600')
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 80:08.0',
+ '80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge')
+
def test_arm_ast2600_evb_sdk(self):
self.set_machine('ast2600-evb')
@@ -136,5 +144,7 @@ def test_arm_ast2600_evb_sdk(self):
exec_command_and_wait_for_pattern(self,
'/sbin/hwclock -f /dev/rtc1', year)
+ self.do_ast2600_pcie_test()
+
if __name__ == '__main__':
AspeedTest.main()
--
2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
<nabihestefan@google.com>, <wuhaotsh@google.com>,
<titusr@google.com>
Subject: [PATCH v2 13/14] tests/functional/arm/test_aspeed_ast2600: add PCIe enumeration test
Date: Thu, 11 Sep 2025 15:24:37 +0800 [thread overview]
Message-ID: <20250911072452.314553-14-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250911072452.314553-1-jamin_lin@aspeedtech.com>
Extend the AST2600 functional tests with a PCIe enumeration check.
This patch introduces a new helper "do_ast2600_pcie_test()" that runs
"lspci" on the emulated system and verifies the presence of the expected
PCIe devices:
- 80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600
- 80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/functional/arm/test_aspeed_ast2600.py | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/tests/functional/arm/test_aspeed_ast2600.py b/tests/functional/arm/test_aspeed_ast2600.py
index 129695ca4e..f97fbbaa11 100755
--- a/tests/functional/arm/test_aspeed_ast2600.py
+++ b/tests/functional/arm/test_aspeed_ast2600.py
@@ -101,6 +101,14 @@ def test_arm_ast2600_evb_buildroot_tpm(self):
'https://github.com/AspeedTech-BMC/openbmc/releases/download/v09.07/ast2600-default-obmc.tar.gz',
'cb6c08595bcbba1672ce716b068ba4e48eda1ed9abe78a07b30392ba2278feba')
+ def do_ast2600_pcie_test(self):
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 80:00.0',
+ '80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600')
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 80:08.0',
+ '80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge')
+
def test_arm_ast2600_evb_sdk(self):
self.set_machine('ast2600-evb')
@@ -136,5 +144,7 @@ def test_arm_ast2600_evb_sdk(self):
exec_command_and_wait_for_pattern(self,
'/sbin/hwclock -f /dev/rtc1', year)
+ self.do_ast2600_pcie_test()
+
if __name__ == '__main__':
AspeedTest.main()
--
2.43.0
next prev parent reply other threads:[~2025-09-11 7:28 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 7:24 [PATCH v2 00/14] Support PCIe RC to AST2600 and AST2700 Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 01/14] hw/pci/pci_ids Add PCI vendor ID for ASPEED Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 02/14] hw/pci-host/aspeed: Add AST2600 PCIe PHY model Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 9:20 ` [SPAM] " Cédric Le Goater
2025-09-16 5:32 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 03/14] hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 16:51 ` [SPAM] " Cédric Le Goater
2025-09-17 1:45 ` Jamin Lin
2025-09-17 9:05 ` Jamin Lin
2025-09-17 10:21 ` Cédric Le Goater
2025-09-11 7:24 ` [PATCH v2 04/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Device support Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 16:53 ` [SPAM] " Cédric Le Goater
2025-09-16 2:42 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 05/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 16:54 ` [SPAM] " Cédric Le Goater
2025-09-16 2:51 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 06/14] hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 07/14] hw/arm/aspeed: Wire up PCIe devices in SoC model Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 17:14 ` [SPAM] " Cédric Le Goater
2025-09-11 7:24 ` [PATCH v2 08/14] hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only) Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 17:19 ` [SPAM] " Cédric Le Goater
2025-09-16 3:41 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 09/14] hw/pci-host/aspeed: Add AST2700 PCIe PHY Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 10/14] hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 17:23 ` [SPAM] " Cédric Le Goater
2025-09-17 1:48 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 11/14] hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST2700 Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 12/14] hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700 Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via [this message]
2025-09-11 7:24 ` [PATCH v2 13/14] tests/functional/arm/test_aspeed_ast2600: add PCIe enumeration test Jamin Lin via
2025-09-15 17:21 ` [SPAM] " Cédric Le Goater
2025-09-16 7:30 ` Jamin Lin
2025-09-16 7:41 ` Cédric Le Goater
2025-09-16 7:44 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 14/14] tests/functional/aarch64/aspeed_ast2700: " Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
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