From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
nabihestefan@google.com, wuhaotsh@google.com, titusr@google.com,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v2 01/14] hw/pci/pci_ids Add PCI vendor ID for ASPEED
Date: Thu, 11 Sep 2025 15:24:25 +0800 [thread overview]
Message-ID: <20250911072452.314553-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250911072452.314553-1-jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/pci/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
index 33e2898be9..16034aaa2c 100644
--- a/include/hw/pci/pci_ids.h
+++ b/include/hw/pci/pci_ids.h
@@ -291,4 +291,6 @@
#define PCI_VENDOR_ID_NVIDIA 0x10de
+#define PCI_VENDOR_ID_ASPEED 0x1A03
+
#endif
--
2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
nabihestefan@google.com, wuhaotsh@google.com, titusr@google.com,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v2 01/14] hw/pci/pci_ids Add PCI vendor ID for ASPEED
Date: Thu, 11 Sep 2025 15:24:25 +0800 [thread overview]
Message-ID: <20250911072452.314553-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250911072452.314553-1-jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/pci/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
index 33e2898be9..16034aaa2c 100644
--- a/include/hw/pci/pci_ids.h
+++ b/include/hw/pci/pci_ids.h
@@ -291,4 +291,6 @@
#define PCI_VENDOR_ID_NVIDIA 0x10de
+#define PCI_VENDOR_ID_ASPEED 0x1A03
+
#endif
--
2.43.0
next prev parent reply other threads:[~2025-09-11 7:34 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 7:24 [PATCH v2 00/14] Support PCIe RC to AST2600 and AST2700 Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via [this message]
2025-09-11 7:24 ` [PATCH v2 01/14] hw/pci/pci_ids Add PCI vendor ID for ASPEED Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 02/14] hw/pci-host/aspeed: Add AST2600 PCIe PHY model Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 9:20 ` [SPAM] " Cédric Le Goater
2025-09-16 5:32 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 03/14] hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 16:51 ` [SPAM] " Cédric Le Goater
2025-09-17 1:45 ` Jamin Lin
2025-09-17 9:05 ` Jamin Lin
2025-09-17 10:21 ` Cédric Le Goater
2025-09-11 7:24 ` [PATCH v2 04/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Device support Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 16:53 ` [SPAM] " Cédric Le Goater
2025-09-16 2:42 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 05/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 16:54 ` [SPAM] " Cédric Le Goater
2025-09-16 2:51 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 06/14] hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 07/14] hw/arm/aspeed: Wire up PCIe devices in SoC model Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 17:14 ` [SPAM] " Cédric Le Goater
2025-09-11 7:24 ` [PATCH v2 08/14] hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only) Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 17:19 ` [SPAM] " Cédric Le Goater
2025-09-16 3:41 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 09/14] hw/pci-host/aspeed: Add AST2700 PCIe PHY Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 10/14] hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 17:23 ` [SPAM] " Cédric Le Goater
2025-09-17 1:48 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 11/14] hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST2700 Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 12/14] hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700 Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 13/14] tests/functional/arm/test_aspeed_ast2600: add PCIe enumeration test Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
2025-09-15 17:21 ` [SPAM] " Cédric Le Goater
2025-09-16 7:30 ` Jamin Lin
2025-09-16 7:41 ` Cédric Le Goater
2025-09-16 7:44 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 14/14] tests/functional/aarch64/aspeed_ast2700: " Jamin Lin via
2025-09-11 7:24 ` Jamin Lin via
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