From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Andy Shevchenko <andriy.shevchenko@intel.com>
Cc: "Nuno Sá" <noname.nuno@gmail.com>,
nuno.sa@analog.com, linux-iio@vger.kernel.org,
"Michael Hennerich" <Michael.Hennerich@analog.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Andy Shevchenko" <andy@kernel.org>
Subject: Re: [PATCH v3 02/10] iio: dac: ad5446: Use DMA safe buffer for transfers
Date: Fri, 31 Oct 2025 15:50:14 +0000 [thread overview]
Message-ID: <20251031155014.000018c7@huawei.com> (raw)
In-Reply-To: <aQTQtUUQpWY_L5q1@smile.fi.intel.com>
On Fri, 31 Oct 2025 17:07:33 +0200
Andy Shevchenko <andriy.shevchenko@intel.com> wrote:
> On Fri, Oct 31, 2025 at 03:00:07PM +0000, Nuno Sá wrote:
> > On Fri, 2025-10-31 at 15:36 +0200, Andy Shevchenko wrote:
> > > On Fri, Oct 31, 2025 at 12:31:23PM +0000, Nuno Sá via B4 Relay wrote:
>
> ...
>
> > > > + union {
> > > > + __be16 d16;
> > > > + u8 d24[3];
> > >
> > > Why not __be32 d24; ? Yes, it will require explicit size to be provided, but at
> > > least it will look consistent with the above. OR u8 d16[2]; ? But then it becomes
> > > simply a u8 buf[3] __aligned...;
> >
> > Because I'm just keeping put_unaligned_be24() as before. In fact I'm just keeping the
> > same type. Sure we could do __be32 and the cpu_to_be32() with a proper shift but
> > I'm already doing way too much than I signed up for when sending v1 :)
>
> I think no shift would be needed.
Using a __be32 to me implies things we don't want to imply. In particular
if it's read in to &d24 then if interpreted as a __be32 it would be 256x
too big (I'd not do this for le24 either though which doesn't need the shift)
The u8 [3] makes no such implication.
So I'd prefer sticking to storing be24 in a 3 byte location.
(just picking out this one bit to reply to).
next prev parent reply other threads:[~2025-10-31 15:50 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-31 12:31 [PATCH v3 00/10] iio: dac: ad5446: Refactor and add support for AD5542 Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-10-31 12:31 ` [PATCH v3 01/10] dt-bindings: iio: dac: Document AD5446 and similar devices Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-11-02 9:18 ` Krzysztof Kozlowski
2025-11-03 10:35 ` Nuno Sá
2025-10-31 12:31 ` [PATCH v3 02/10] iio: dac: ad5446: Use DMA safe buffer for transfers Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-10-31 13:36 ` Andy Shevchenko
2025-10-31 15:00 ` Nuno Sá
2025-10-31 15:07 ` Andy Shevchenko
2025-10-31 15:50 ` Jonathan Cameron [this message]
2025-11-03 10:43 ` Nuno Sá
2025-10-31 12:31 ` [PATCH v3 03/10] iio: dac: ad5446: Don't ignore missing regulator Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-10-31 13:40 ` Andy Shevchenko
2025-10-31 13:43 ` Andy Shevchenko
2025-10-31 12:31 ` [PATCH v3 04/10] iio: dac: ad5446: Move to single chip_info structures Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-10-31 13:47 ` Andy Shevchenko
2025-10-31 15:05 ` Nuno Sá
2025-10-31 15:08 ` Andy Shevchenko
2025-10-31 12:31 ` [PATCH v3 05/10] iio: dac: ad5456: Add missing DT compatibles Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-10-31 12:31 ` [PATCH v3 06/10] iio: dac: ad5446: Separate I2C/SPI into different drivers Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-11-01 16:46 ` Jonathan Cameron
2025-11-03 7:39 ` Andy Shevchenko
2025-11-03 10:40 ` Nuno Sá
2025-11-03 19:30 ` Andy Shevchenko
2025-11-04 7:44 ` Nuno Sá
2025-11-04 14:00 ` Jonathan Cameron
2025-10-31 12:31 ` [PATCH v3 07/10] iio: dac: ad5446: Make use of devm_mutex_init() Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-10-31 12:31 ` [PATCH v3 08/10] iio: dac: ad5446: Make use of the cleanup helpers Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-10-31 12:31 ` [PATCH v3 09/10] iio: dac: ad5446: Fix coding style issues Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
2025-11-01 16:51 ` Jonathan Cameron
2025-11-03 10:44 ` Nuno Sá
2025-10-31 12:31 ` [PATCH v3 10/10] iio: dac: ad5446: Add AD5542 to the spi id table Nuno Sá
2025-10-31 12:31 ` Nuno Sá via B4 Relay
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