From: Dave Airlie <airlied@gmail.com>
To: dri-devel@lists.freedesktop.org
Subject: [PATCH 2/2] amd/dc: add frl bits to the registers
Date: Fri, 14 Nov 2025 13:53:38 +1000 [thread overview]
Message-ID: <20251114035338.15144-2-airlied@gmail.com> (raw)
In-Reply-To: <20251114035338.15144-1-airlied@gmail.com>
From: Dave Airlie <airlied@redhat.com>
document the same bits as added to the main headers.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
.../gpu/drm/amd/display/dc/dc_hdmi_types.h | 30 +++++++++++++++++--
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hdmi_types.h b/drivers/gpu/drm/amd/display/dc/dc_hdmi_types.h
index b015e80672ec..693129b987ac 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_hdmi_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hdmi_types.h
@@ -77,11 +77,24 @@ union hdmi_scdc_update_read_data {
uint8_t STATUS_UPDATE:1;
uint8_t CED_UPDATE:1;
uint8_t RR_TEST:1;
- uint8_t RESERVED:5;
+ uint8_t RESERVED0:1;
+ uint8_t FRL_START:1;
+ uint8_t FLT_UPDATE:1;
+ uint8_t RESERVED:2;
uint8_t RESERVED2:8;
} fields;
};
+union hdmi_scdc_config_data {
+ uint8_t byte[2];
+ struct {
+ uint8_t RR_ENABLE:1;
+ uint8_t RESERVED:7;
+ uint8_t FRL_RATE:4;
+ uint8_t FFE_LEVELS:4;
+ } fields;
+};
+
union hdmi_scdc_status_flags_data {
uint8_t byte;
struct {
@@ -89,7 +102,20 @@ union hdmi_scdc_status_flags_data {
uint8_t CH0_LOCKED:1;
uint8_t CH1_LOCKED:1;
uint8_t CH2_LOCKED:1;
- uint8_t RESERVED:4;
+ uint8_t LANE3_LOCKED:1;
+ uint8_t RESERVED:1;
+ uint8_t FLT_READY:1;
+ uint8_t RESERVED2:1;
+ } fields;
+};
+
+union hdmi_scdc_lane_status_data {
+ uint8_t byte[2];
+ struct {
+ uint8_t ltp_0:4;
+ uint8_t ltp_1:4;
+ uint8_t ltp_2:4;
+ uint8_t ltp_3:4;
} fields;
};
--
2.51.1
next prev parent reply other threads:[~2025-11-14 3:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-14 3:53 [PATCH 1/2] drm/scdc: add frl config/status registers to scdc header Dave Airlie
2025-11-14 3:53 ` Dave Airlie [this message]
2025-11-21 14:31 ` [PATCH 2/2] amd/dc: add frl bits to the registers Derek Foreman
2025-11-21 14:31 ` [PATCH 1/2] drm/scdc: add frl config/status registers to scdc header Derek Foreman
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