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From: Manali Shukla <manali.shukla@amd.com>
To: <seanjc@google.com>, <pbonzini@redhat.com>
Cc: <mingo@redhat.com>, <bp@alien8.de>, <dave.hansen@linux.intel.com>,
	<kvm@vger.kernel.org>, <x86@kernel.org>, <santosh.shukla@amd.com>,
	<nikunj.dadhania@amd.com>, <Naveen.Rao@amd.com>,
	<dapeng1.mi@linux.intel.com>, <manali.shukla@amd.com>
Subject: [PATCH v1 6/9] KVM: Add KVM_GET_LAPIC2 and KVM_SET_LAPIC2 for extended APIC
Date: Wed, 4 Feb 2026 07:44:49 +0000	[thread overview]
Message-ID: <20260204074452.55453-7-manali.shukla@amd.com> (raw)
In-Reply-To: <20260204074452.55453-1-manali.shukla@amd.com>

Add KVM_GET_LAPIC2 and KVM_SET_LAPIC2 ioctls to save and restore APIC
state using a 4KB buffer (kvm_lapic_state2).  The larger buffer allows
saving additional APIC registers beyond the standard APIC registers
supported by the existing 1KB KVM_GET/SET_LAPIC ioctls.

The 4KB buffer size matches the LAPIC2 capability, which enables the
full APIC register page including extended APIC registers for AMD
processors.

KVM_GET/SET_LAPIC continue to work as before for backward compatibility.
Document the new ioctls in Documentation/virt/kvm/api.rst.

Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Manali Shukla <manali.shukla@amd.com>
---
 Documentation/virt/kvm/api.rst  | 45 +++++++++++++++++++++++++
 arch/x86/include/uapi/asm/kvm.h |  5 +++
 arch/x86/kvm/x86.c              | 59 +++++++++++++++++++++++++++++++++
 include/uapi/linux/kvm.h        |  2 ++
 4 files changed, 111 insertions(+)

diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index 71b4d24f009a..c49cf3104b2c 100644
--- a/Documentation/virt/kvm/api.rst
+++ b/Documentation/virt/kvm/api.rst
@@ -6517,6 +6517,51 @@ the capability to be present.
 
 `flags` must currently be zero.
 
+4.144 KVM_GET_LAPIC2
+----------------------
+
+:Capability: KVM_CAP_LAPIC2
+:Architectures: x86
+:Type: vcpu ioctl
+:Parameters: struct kvm_lapic_state2 (out)
+:Returns: 0 on success, negative on failure
+
+Reads the extended Local APIC registers, including both the standard APIC
+register space (offsets 0h-3FFh) and the extended APIC register space (offsets
+400h-500h and beyond).
+
+This ioctl is similar to KVM_GET_LAPIC but operates on a 4KB APIC
+register space that includes extended LVT registers available on AMD processors
+with the ExtApicSpace feature.
+
+::
+
+  #define KVM_APIC_EXT_REG_SIZE 0x1000
+  struct kvm_lapic_state2 {
+      char regs[KVM_APIC_EXT_REG_SIZE];
+  };
+
+4.145 KVM_SET_LAPIC2
+----------------------
+
+:Capability: KVM_CAP_LAPIC2
+:Architectures: x86
+:Type: vcpu ioctl
+:Parameters: struct kvm_lapic_state2 (in)
+:Returns: 0 on success, negative on failure
+
+Sets the extended Local APIC registers, including both the standard APIC
+register space and the extended APIC register space.
+
+This ioctl is similar to KVM_SET_LAPIC but operates on a 4KB APIC register space
+that includes extended LVT registers for AMD processors.
+
+::
+
+  #define KVM_APIC_EXT_REG_SIZE 0x1000
+  struct kvm_lapic_stat2 {
+      char regs[KVM_APIC_EXT_REG_SIZE];
+  };
 
 .. _kvm_run:
 
diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h
index 7ceff6583652..516d4a0be25a 100644
--- a/arch/x86/include/uapi/asm/kvm.h
+++ b/arch/x86/include/uapi/asm/kvm.h
@@ -129,6 +129,11 @@ struct kvm_lapic_state {
 	char regs[KVM_APIC_REG_SIZE];
 };
 
+#define KVM_APIC_EXT_REG_SIZE 0x1000
+struct kvm_lapic_state2 {
+	char regs[KVM_APIC_EXT_REG_SIZE];
+};
+
 struct kvm_segment {
 	__u64 base;
 	__u32 limit;
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 669c894f1061..ccd16bdff56a 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -5331,6 +5331,17 @@ static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
 	return kvm_apic_get_state(vcpu, s->regs, sizeof(*s));
 }
 
+static int kvm_vcpu_ioctl_get_lapic2(struct kvm_vcpu *vcpu,
+				    struct kvm_lapic_state2 *s)
+{
+	if (vcpu->arch.apic->guest_apic_protected)
+		return -EINVAL;
+
+	kvm_x86_call(sync_pir_to_irr)(vcpu);
+
+	return kvm_apic_get_state(vcpu, s->regs, sizeof(*s));
+}
+
 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
 				    struct kvm_lapic_state *s)
 {
@@ -5347,6 +5358,22 @@ static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
 	return 0;
 }
 
+static int kvm_vcpu_ioctl_set_lapic2(struct kvm_vcpu *vcpu,
+				    struct kvm_lapic_state2 *s)
+{
+	int r;
+
+	if (vcpu->arch.apic->guest_apic_protected)
+		return -EINVAL;
+
+	r = kvm_apic_set_state(vcpu, s->regs, sizeof(*s));
+	if (r)
+		return r;
+	update_cr8_intercept(vcpu);
+
+	return 0;
+}
+
 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
 {
 	/*
@@ -6203,6 +6230,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
 	union {
 		struct kvm_sregs2 *sregs2;
 		struct kvm_lapic_state *lapic;
+		struct kvm_lapic_state2 *lapic2;
 		struct kvm_xsave *xsave;
 		struct kvm_xcrs *xcrs;
 		void *buffer;
@@ -6243,6 +6271,37 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
 		r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
 		break;
 	}
+	case KVM_GET_LAPIC2: {
+		r = -EINVAL;
+		if (!lapic_in_kernel(vcpu))
+			goto out;
+		u.lapic2 = kzalloc(sizeof(struct kvm_lapic_state2), GFP_KERNEL);
+
+		r = -ENOMEM;
+		if (!u.lapic2)
+			goto out;
+		r = kvm_vcpu_ioctl_get_lapic2(vcpu, u.lapic2);
+		if (r)
+			goto out;
+		r = -EFAULT;
+		if (copy_to_user(argp, u.lapic2, sizeof(struct kvm_lapic_state2)))
+			goto out;
+		r = 0;
+		break;
+	}
+	case KVM_SET_LAPIC2: {
+		r = -EINVAL;
+		if (!lapic_in_kernel(vcpu))
+			goto out;
+		u.lapic2 = memdup_user(argp, sizeof(*u.lapic2));
+		if (IS_ERR(u.lapic2)) {
+			r = PTR_ERR(u.lapic2);
+			goto out_nofree;
+		}
+
+		r = kvm_vcpu_ioctl_set_lapic2(vcpu, u.lapic2);
+		break;
+	}
 	case KVM_INTERRUPT: {
 		struct kvm_interrupt irq;
 
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index cb27eeb09bdb..f45d313e30ae 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1339,6 +1339,8 @@ struct kvm_vfio_spapr_tce {
 #define KVM_SET_FPU               _IOW(KVMIO,  0x8d, struct kvm_fpu)
 #define KVM_GET_LAPIC             _IOR(KVMIO,  0x8e, struct kvm_lapic_state)
 #define KVM_SET_LAPIC             _IOW(KVMIO,  0x8f, struct kvm_lapic_state)
+#define KVM_GET_LAPIC2            _IOR(KVMIO,  0x8e, struct kvm_lapic_state2)
+#define KVM_SET_LAPIC2            _IOW(KVMIO,  0x8f, struct kvm_lapic_state2)
 #define KVM_SET_CPUID2            _IOW(KVMIO,  0x90, struct kvm_cpuid2)
 #define KVM_GET_CPUID2            _IOWR(KVMIO, 0x91, struct kvm_cpuid2)
 /* Available with KVM_CAP_VAPIC */
-- 
2.43.0


  parent reply	other threads:[~2026-02-04  7:45 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-04  7:44 [PATCH v1 0/9] KVM: x86: Add support for AMD Extended APIC registers Manali Shukla
2026-02-04  7:44 ` [PATCH v1 1/9] KVM: x86: Refactor APIC register mask handling to support extended " Manali Shukla
2026-05-14 12:48   ` Naveen N Rao
2026-02-04  7:44 ` [PATCH v1 2/9] x86/apic: Add helper to get maximum number of Extended LVT registers Manali Shukla
2026-05-06 11:22   ` Borislav Petkov
2026-05-14 12:50   ` Naveen N Rao
2026-02-04  7:44 ` [PATCH v1 3/9] KVM: SVM: Set kvm_caps.has_extapic when CPU supports Extended APIC Manali Shukla
2026-05-14 12:58   ` Naveen N Rao
2026-02-04  7:44 ` [PATCH v1 4/9] KVM: x86: Introduce KVM_CAP_LAPIC2 for 4KB APIC register space support Manali Shukla
2026-05-14 13:08   ` Naveen N Rao
2026-02-04  7:44 ` [PATCH v1 5/9] KVM: x86: Refactor APIC state get/set to accept variable-sized buffers Manali Shukla
2026-05-14 14:20   ` Naveen N Rao
2026-02-04  7:44 ` Manali Shukla [this message]
2026-03-16 13:00   ` [PATCH v1 6/9] KVM: Add KVM_GET_LAPIC2 and KVM_SET_LAPIC2 for extended APIC Nikunj A. Dadhania
2026-03-23 11:15     ` Manali Shukla
2026-05-14 14:36       ` Naveen N Rao
2026-05-14 14:41   ` Naveen N Rao
2026-02-04  7:44 ` [PATCH v1 7/9] KVM: x86: Emulate Extended LVT registers for AMD guests Manali Shukla
2026-05-14 14:48   ` Naveen N Rao
2026-02-04  7:44 ` [PATCH v1 8/9] x86/cpufeatures: Add CPUID feature bit for Extended LVT AVIC acceleration Manali Shukla
2026-02-04  7:44 ` [PATCH v1 9/9] KVM: SVM: Add AVIC support for extended LVT MSRs Manali Shukla
2026-05-14 15:10   ` Naveen N Rao
2026-03-10  6:17 ` [PATCH v1 0/9] KVM: x86: Add support for AMD Extended APIC registers Manali Shukla
2026-04-27  4:34   ` Shukla, Manali

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