From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
"Alistair Francis" <alistair@alistair23.me>,
"Kevin Wolf" <kwolf@redhat.com>,
"Hanna Reitz" <hreitz@redhat.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:Block layer core" <qemu-block@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v4 00/21] Add SSP/TSP power control and DRAM remap support for AST2700
Date: Fri, 17 Apr 2026 03:28:38 +0000 [thread overview]
Message-ID: <20260417032837.2664122-1-jamin_lin@aspeedtech.com> (raw)
This series improves AST2700 platform support by aligning SSP/TSP
power and reset behavior with hardware, and enabling DRAM remapping
required for proper firmware boot flow.
v1:
1. The changes move DRAM/SDMC initialization earlier to support memory
aliasing, add DRAM aliases for SSP/TSP SDRAM remap, and implement
SSP/TSP reset, power-on, and remap controls via SCU registers.
2. With these updates, SSP and TSP can be booted via PSP and load their
binaries from DRAM. Functional tests and documentation are updated
accordingly.
v2:
Fix "make check" failure caused by both AST2700 and AST1700 realizing the same
TYPE_AST2700_SCU model.
v3:
1. Drop "Move DRAM and SDMC initialization earlier to support memory aliasing"
2. Support SPI/FMC FIFO Mode
3. Add unimplemented devices
v4:
1. Introduce Aspeed2700SCU subclass and separate from generic SCU.
2. Add separate reset handler for AST2700 SCUIO
3. Add AST2700 SCUIO RNG control and data registers
4. Share single SCUIO instance across PSP, SSP, and TSP
5. Fix AST2700 FC hardware strap settings
Jamin Lin (21):
hw/misc/aspeed_scu: Introduce Aspeed2700SCU subclass and separate from
generic SCU
hw/misc/aspeed_scu: Add separate reset handler for AST2700 SCUIO
hw/arm/ast27x0: Start SSP in powered-off state to match hardware
behavior
hw/arm/ast27x0: Start TSP in powered-off state to match hardware
behavior
hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap
hw/arm/ast27x0: Add DRAM alias for TSP SDRAM remap
hw/misc/aspeed_scu: Implement SSP reset and power-on control via SCU
registers
hw/misc/aspeed_scu: Implement TSP reset and power-on control via SCU
registers
hw/misc/aspeed_scu: Add SCU support for SSP SDRAM remap
hw/misc/aspeed_scu: Add SCU support for TSP SDRAM remap
hw/arm/ast27x0: Share FMC controller with SSP and TSP
hw/arm/aspeed_ast27x0: Add unimplemented Privilege Controller MMIO
regions for SSP/TSP
hw/arm/aspeed_ast27x0: Add unimplemented OTP controller MMIO regions
for SSP/TSP
hw/block/m25p80: Implement volatile status register write enable for
Winbond
hw/ssi/aspeed_smc: Add Data FIFO-based flash access support for
AST2700
hw/misc/aspeed_scu: Drop noisy unhandled read logs for AST2700
SCU/SCUIO
hw/misc/aspeed_scu: Add AST2700 SCUIO RNG control and data registers
hw/arm/ast27x0: Share single SCUIO instance across PSP, SSP, and TSP
hw/arm/aspeed_ast27x0-fc: Fix hardware strap settings
tests/functional/aarch64/test_aspeed_ast2700fc: Boot SSP/TSP via PSP
and load binaries from DRAM
docs: Add support vbootrom and update Manual boot for ast2700fc
docs/system/arm/aspeed.rst | 42 ++-
include/hw/arm/aspeed_ast1700.h | 2 +-
include/hw/arm/aspeed_coprocessor.h | 13 +-
include/hw/arm/aspeed_soc.h | 4 +
include/hw/misc/aspeed_scu.h | 10 +
include/hw/ssi/aspeed_smc.h | 3 +-
hw/arm/aspeed_ast27x0-fc.c | 22 +-
hw/arm/aspeed_ast27x0-ssp.c | 67 +++-
hw/arm/aspeed_ast27x0-tsp.c | 64 +++-
hw/arm/aspeed_ast27x0.c | 22 +-
hw/arm/aspeed_coprocessor_common.c | 2 -
hw/block/m25p80.c | 36 +-
hw/misc/aspeed_scu.c | 324 +++++++++++++++++-
hw/ssi/aspeed_smc.c | 113 +++++-
.../aarch64/test_aspeed_ast2700fc.py | 29 +-
15 files changed, 672 insertions(+), 81 deletions(-)
--
2.43.0
next reply other threads:[~2026-04-17 3:32 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-17 3:28 Jamin Lin [this message]
2026-04-17 3:28 ` [PATCH v4 01/21] hw/misc/aspeed_scu: Introduce Aspeed2700SCU subclass and separate from generic SCU Jamin Lin
2026-06-01 17:05 ` Cédric Le Goater
2026-04-17 3:28 ` [PATCH v4 02/21] hw/misc/aspeed_scu: Add separate reset handler for AST2700 SCUIO Jamin Lin
2026-04-17 3:28 ` [PATCH v4 03/21] hw/arm/ast27x0: Start SSP in powered-off state to match hardware behavior Jamin Lin
2026-04-17 3:28 ` [PATCH v4 04/21] hw/arm/ast27x0: Start TSP " Jamin Lin
2026-04-17 3:28 ` [PATCH v4 05/21] hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap Jamin Lin
2026-06-01 17:07 ` Cédric Le Goater
2026-04-17 3:28 ` [PATCH v4 06/21] hw/arm/ast27x0: Add DRAM alias for TSP " Jamin Lin
2026-04-17 3:28 ` [PATCH v4 07/21] hw/misc/aspeed_scu: Implement SSP reset and power-on control via SCU registers Jamin Lin
2026-04-17 3:28 ` [PATCH v4 08/21] hw/misc/aspeed_scu: Implement TSP " Jamin Lin
2026-04-17 3:28 ` [PATCH v4 09/21] hw/misc/aspeed_scu: Add SCU support for SSP SDRAM remap Jamin Lin
2026-06-01 17:28 ` Cédric Le Goater
2026-04-17 3:28 ` [PATCH v4 10/21] hw/misc/aspeed_scu: Add SCU support for TSP " Jamin Lin
2026-04-17 3:28 ` [PATCH v4 11/21] hw/arm/ast27x0: Share FMC controller with SSP and TSP Jamin Lin
2026-06-01 17:18 ` Cédric Le Goater
2026-04-17 3:28 ` [PATCH v4 12/21] hw/arm/aspeed_ast27x0: Add unimplemented Privilege Controller MMIO regions for SSP/TSP Jamin Lin
2026-06-01 17:19 ` Cédric Le Goater
2026-04-17 3:28 ` [PATCH v4 13/21] hw/arm/aspeed_ast27x0: Add unimplemented OTP controller " Jamin Lin
2026-06-01 17:19 ` Cédric Le Goater
2026-04-17 3:28 ` [PATCH v4 14/21] hw/block/m25p80: Implement volatile status register write enable for Winbond Jamin Lin
2026-06-01 17:31 ` Cédric Le Goater
2026-04-17 3:28 ` [PATCH v4 15/21] hw/ssi/aspeed_smc: Add Data FIFO-based flash access support for AST2700 Jamin Lin
2026-04-17 3:28 ` [PATCH v4 16/21] hw/misc/aspeed_scu: Drop noisy unhandled read logs for AST2700 SCU/SCUIO Jamin Lin
2026-06-01 17:20 ` Cédric Le Goater
2026-04-17 3:29 ` [PATCH v4 17/21] hw/misc/aspeed_scu: Add AST2700 SCUIO RNG control and data registers Jamin Lin
2026-06-01 17:21 ` Cédric Le Goater
2026-04-17 3:29 ` [PATCH v4 18/21] hw/arm/ast27x0: Share single SCUIO instance across PSP, SSP, and TSP Jamin Lin
2026-06-01 17:23 ` Cédric Le Goater
2026-04-17 3:29 ` [PATCH v4 19/21] hw/arm/aspeed_ast27x0-fc: Fix hardware strap settings Jamin Lin
2026-06-01 17:23 ` Cédric Le Goater
2026-04-17 3:29 ` [PATCH v4 20/21] tests/functional/aarch64/test_aspeed_ast2700fc: Boot SSP/TSP via PSP and load binaries from DRAM Jamin Lin
2026-04-17 3:29 ` [PATCH v4 21/21] docs: Add support vbootrom and update Manual boot for ast2700fc Jamin Lin
2026-05-21 6:42 ` [PATCH v4 00/21] Add SSP/TSP power control and DRAM remap support for AST2700 Cédric Le Goater
2026-05-21 6:47 ` Jamin Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260417032837.2664122-1-jamin_lin@aspeedtech.com \
--to=jamin_lin@aspeedtech.com \
--cc=alistair@alistair23.me \
--cc=andrew@codeconstruct.com.au \
--cc=clg@kaod.org \
--cc=hreitz@redhat.com \
--cc=joel@jms.id.au \
--cc=kane_chen@aspeedtech.com \
--cc=kwolf@redhat.com \
--cc=leetroy@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=pierrick.bouvier@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-block@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=steven_lee@aspeedtech.com \
--cc=troy_lee@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.