All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Mohamed Mediouni <mohamed@unpredictable.fr>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Phil Dennis-Jordan <phil@philjordan.eu>,
	Roman Bolshakov <rbolshakov@ddn.com>,
	Pierrick Bouvier <pierrick.bouvier@linaro.org>,
	Pedro Barbuda <pbarbuda@microsoft.com>,
	Wei Liu <wei.liu@kernel.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH v2 00/38] WHPX x86 updates for QEMU 11.1
Date: Mon, 20 Apr 2026 12:42:10 +0200	[thread overview]
Message-ID: <20260420104248.86702-1-mohamed@unpredictable.fr> (raw)

This rolls over my previous series posted earlier in this mailing list.
..and adds some more.

Git tree: https://github.com/mediouni-m/qemu whpx-i386-202604-4

Some highlights:
1
- user-mode x2APIC emulation (kernel-irqchip=off) for better
performance when it has to be used.
- CPU model emulation on both Windows 10 and 11
- configurable behavior for unknown MSRs and adding a way
to trap on GPFs raised by Hyper-V on MSR acccess
- when -M hyperv=off, report the hypervisor as VMware for
guests to use either the VMware CPUID leaf or the vmport
interface to get the TSC and APIC frequencies.

If the vmware CPUID frequency leaf is disabled, then KVM
is reported.
- xsave save/restore support
- Pause the VM to be able to inspect state on a fatal fault
instead of just exiting
- adding emulation of an oddball idle MSR used by Windows
when kernel-irqchip=off.
- disable kernel-irqchip and Hyper-V enlightenments for
isapc
- for Windows 10, change the default to an emulated x2APIC
(kernel-irqchip=off). The recommended way to use the Hyper-V
LAPIC is not to use -M kernel-irqchip=on, but -M pic=off.

And as the last commit, a documentation update.

Bug reports and patches are welcome.

However, due to reasons, I'll probably step aside
from this all for a bit so don't expect immediate replies.

v1->v2:

- Build fixup for macOS and OpenBSD
- a bit of cleanup

Magnus Kulke (1):
  target/i386: add de/compaction to xsave_helper

Mohamed Mediouni (37):
  target/i386: emulate: include name of unhandled instruction
  whpx: i386: x2apic emulation
  whpx: i386: wire up feature probing
  whpx: i386: disable TbFlushHypercalls for emulated LAPIC
  whpx: i386: enable x2apic by default for user-mode LAPIC
  whpx: i386: reintroduce enlightenments for Windows 10
  whpx: i386: introduce proper cpuid support
  whpx: i386: kernel-irqchip=off fixes
  whpx: i386: use WHvX64RegisterCr8 only when kernel-irqchip=off
  whpx: i386: disable kernel-irqchip on Windows 10 when PIC enabled
  whpx: i386: IO port fast path cleanup
  whpx: i386: disable enlightenments and LAPIC for isapc
  whpx: i386: interrupt priority support
  hw/intc: apic: disallow APIC reads when disabled
  whpx: i386: fix CPUID[1:EDX].APIC reporting
  whpx: i386: set apicbase value only on success
  whpx: i386: unknown MSR configurability
  whpx: i386: enable GuestIdleReg enlightenment
  whpx: i386: tighten APIC base validity check
  whpx: i386: ignore vpassist when kernel-irqchip=off
  target: i386: HLT type that ignores EFLAGS.IF
  whpx: i386: add HV_X64_MSR_GUEST_IDLE when !kernel-irqchip
  whpx: i386: one more CPUID
  whpx: i386: some x2APIC awareness
  whpx: i386: set WHvX64RegisterInitialApicId
  whpx: i386: Pause VM on fatal exception to be able to inspect state
  target/i386: emulate: use exception_payload for fault address
  whpx: i386: CPU features support for Windows 10
  target/i386: make xsave_buf present unconditionally
  whpx: xsave support
  whpx: i386: set APIC ID only when APIC present
  whpx: i386: update migration blocker message
  whpx: i386: don't increment eip on MSR access raising GPF
  target/i386: emulate, hvf: rdmsr/wrmsr GPF handling
  whpx: i386: add feature to intercept #GP MSR accesses
  whpx: i386: intercept CPUID 0xD too
  whpx: i386: documentation update

 accel/whpx/whpx-common.c           |   78 ++
 docs/system/whpx.rst               |   30 +-
 hw/intc/apic.c                     |    9 +
 include/system/whpx-common.h       |    2 +-
 include/system/whpx-internal.h     |   28 +
 target/arm/whpx/whpx-all.c         |    1 +
 target/i386/cpu.c                  |   25 +-
 target/i386/cpu.h                  |    6 +-
 target/i386/emulate/x86_emu.c      |   14 +-
 target/i386/emulate/x86_emu.h      |    4 +-
 target/i386/emulate/x86_mmu.c      |    3 +-
 target/i386/hvf/hvf.c              |    9 +-
 target/i386/whpx/meson.build       |    1 +
 target/i386/whpx/whpx-all.c        | 1247 ++++++++++++++++++++++------
 target/i386/whpx/whpx-apic.c       |   83 +-
 target/i386/whpx/whpx-cpu-legacy.c |  171 ++++
 target/i386/whpx/whpx-i386.h       |   11 +
 target/i386/xsave_helper.c         |  256 ++++++
 18 files changed, 1696 insertions(+), 282 deletions(-)
 create mode 100644 target/i386/whpx/whpx-cpu-legacy.c
 create mode 100644 target/i386/whpx/whpx-i386.h

-- 
2.50.1 (Apple Git-155)



             reply	other threads:[~2026-04-20 10:46 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-20 10:42 Mohamed Mediouni [this message]
2026-04-20 10:42 ` [PATCH v2 01/38] target/i386: emulate: include name of unhandled instruction Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 02/38] whpx: i386: x2apic emulation Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 03/38] whpx: i386: wire up feature probing Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 04/38] whpx: i386: disable TbFlushHypercalls for emulated LAPIC Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 05/38] whpx: i386: enable x2apic by default for user-mode LAPIC Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 06/38] whpx: i386: reintroduce enlightenments for Windows 10 Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 07/38] whpx: i386: introduce proper cpuid support Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 08/38] whpx: i386: kernel-irqchip=off fixes Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 09/38] whpx: i386: use WHvX64RegisterCr8 only when kernel-irqchip=off Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 10/38] whpx: i386: disable kernel-irqchip on Windows 10 when PIC enabled Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 11/38] whpx: i386: IO port fast path cleanup Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 12/38] whpx: i386: disable enlightenments and LAPIC for isapc Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 13/38] whpx: i386: interrupt priority support Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 14/38] hw/intc: apic: disallow APIC reads when disabled Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 15/38] whpx: i386: fix CPUID[1:EDX].APIC reporting Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 16/38] whpx: i386: set apicbase value only on success Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 17/38] whpx: i386: unknown MSR configurability Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 18/38] whpx: i386: enable GuestIdleReg enlightenment Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 19/38] whpx: i386: tighten APIC base validity check Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 20/38] whpx: i386: ignore vpassist when kernel-irqchip=off Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 21/38] target: i386: HLT type that ignores EFLAGS.IF Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 22/38] whpx: i386: add HV_X64_MSR_GUEST_IDLE when !kernel-irqchip Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 23/38] whpx: i386: one more CPUID Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 24/38] whpx: i386: some x2APIC awareness Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 25/38] whpx: i386: set WHvX64RegisterInitialApicId Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 26/38] whpx: i386: Pause VM on fatal exception to be able to inspect state Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 27/38] target/i386: emulate: use exception_payload for fault address Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 28/38] whpx: i386: CPU features support for Windows 10 Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 29/38] target/i386: make xsave_buf present unconditionally Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 30/38] target/i386: add de/compaction to xsave_helper Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 31/38] whpx: xsave support Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 32/38] whpx: i386: set APIC ID only when APIC present Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 33/38] whpx: i386: update migration blocker message Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 34/38] whpx: i386: don't increment eip on MSR access raising GPF Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 35/38] target/i386: emulate, hvf: rdmsr/wrmsr GPF handling Mohamed Mediouni
2026-04-20 11:27   ` Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 36/38] whpx: i386: add feature to intercept #GP MSR accesses Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 37/38] whpx: i386: intercept CPUID 0xD too Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 38/38] whpx: i386: documentation update Mohamed Mediouni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260420104248.86702-1-mohamed@unpredictable.fr \
    --to=mohamed@unpredictable.fr \
    --cc=mst@redhat.com \
    --cc=pbarbuda@microsoft.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=phil@philjordan.eu \
    --cc=pierrick.bouvier@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=rbolshakov@ddn.com \
    --cc=wei.liu@kernel.org \
    --cc=zhao1.liu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.